, if this will work, it is
>> probably a better solution.
>>
>
> That was my suggestion. Then you can ensure from the reset controller
> driver that this is done exactly once, either from the sgpio driver or
> from the switchdev driver. IIRC, the sgpio from the other SoCs a
tch.
>> - STP state, VLAN support, host/bridge port mode, Forwarding DB, and
>> configuration and statistics via ethtool.
>>
>> More support will be added at a later stage.
>>
>> The Sparx5 Switch chip register model can be browsed here:
>> Link: https://microchip-ung.github.io/sparx-5_reginfo/reginfo_sparx-5.html
>
> Out of curiosity, what tool was used to generate the register
> information page? It looks really neat and well organized.
Florian,
It is an in-house tool. The input data is in a proprietary XML-like
format.
We're pleased that you like it, we do too. We are also pleased that
being a Microchip entity, we can actually make this kind of information
public.
I'll pass your praise on.
---Lars
--
Lars Povlsen,
Microchip
x5_mc_unsync);
>> +
>> + return 0;
>> +}
>
> This looks suspiciously empty? Don't you need to tell the hardware
> which ports this port is bridges to? Normally you see some code which
> walks all the ports and finds those in the same bridge, and sets a bit
> which allows these ports to talk to each other. Is that code somewhere
> else?
>
This is applied when the STP state is handled - sparx5_update_fwd().
This is pretty much as in the ocelot driver, which can a somewhat
similar switch - and driver - architecture.
> Andrew
Thank you for your comments,
---Lars
--
Lars Povlsen,
Microchip
