On Mon, 2021-02-15 at 21:08 +0100, Heiner Kallweit wrote:
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> On 15.02.2021 17:58, Bjarni Jonasson wrote:
> > The 'coma mode' (configurable through sw or hw) provides an
> > optional feature that may be
On Mon, 2021-02-15 at 18:25 +0100, Heiner Kallweit wrote:
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> On 15.02.2021 17:57, Bjarni Jonasson wrote:
> > At Power-On Reset, transients may cause the LCPLL to lock onto a
> > clock that is momentaril
On Mon, 2021-02-15 at 18:27 +0100, Heiner Kallweit wrote:
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> On 15.02.2021 17:57, Bjarni Jonasson wrote:
> > The current IB serdes calibration algorithm (performed by the
> > onboard 8051)
> > has prove
On Mon, 2021-02-15 at 18:25 +0100, Heiner Kallweit wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you
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> On 15.02.2021 17:57, Bjarni Jonasson wrote:
> > At Power-On Reset, transients may cause the LCPLL to lock onto a
> > clock that is momentaril
On Fri, 2021-02-12 at 10:53 -0800, Jakub Kicinski wrote:
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> On Fri, 12 Feb 2021 15:06:41 +0100 Bjarni Jonasson wrote:
> > At Power-On Reset, transients may cause the LCPLL to lock onto a
> > clock that
On Fri, 2021-02-12 at 16:32 +, Vladimir Oltean wrote:
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> On Fri, Feb 12, 2021 at 03:06:43PM +0100, Bjarni Jonasson wrote:
> > The 'coma mode' (configurable through sw or hw) provides an
> > optional
On Fri, 2021-02-12 at 16:54 +0100, Andrew Lunn wrote:
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> On Fri, Feb 12, 2021 at 03:06:41PM +0100, Bjarni Jonasson wrote:
> > At Power-On Reset, transients may cause the LCPLL to lock onto a
> > clock t
On Fri, 2021-02-12 at 16:20 +0100, Andrew Lunn wrote:
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> On Fri, Feb 12, 2021 at 03:06:41PM +0100, Bjarni Jonasson wrote:
> > +static u32 vsc85xx_csr_read(struct phy_device *phydev,
> > +