Signed-off-by: Alexandru Gagniuc
---
.../devicetree/bindings/net/anarion-gmac.txt | 25 ++
1 file changed, 25 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/anarion-gmac.txt
diff --git a/Documentation/devicetree/bindings/net/anarion-gmac.txt
b
it's much more intuitive to include this in the
glue layer instead.
At this time only RGMII is supported, because it is the only mode
which has been validated hardware-wise.
Signed-off-by: Alexandru Gagniuc
---
Changes since v1:
* Moved documentation for bindings to separate patch
drive
it's much more intuitive to include this in the
glue layer instead.
At this time only RGMII is supported, because it is the only mode
which has been validated hardware-wise.
Signed-off-by: Alexandru Gagniuc
---
.../devicetree/bindings/net/anarion-gmac.txt | 25
drivers/net/e
ternal delay")
Signed-off-by: Alexandru Gagniuc
---
drivers/net/ethernet/ti/cpsw-phy-sel.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/net/ethernet/ti/cpsw-phy-sel.c
b/drivers/net/ethernet/ti/cpsw-phy-sel.c
index ba1e45f..1801364 100644
--- a/drivers/net/ethernet/ti/cp
ation marks clearing this bit as "reserved",
however, according to TI, support for delaying the clock does exist in
the MAC, although it is not officially supported.
We tested this on a board with an RGMII to RGMII link that will not
work unless this bit is cleared.
Signed-off-by: Alexa
vsc824x_config_init().
Tested on custom board with AM3352 SOC and VSC801 PHY.
Signed-off-by: Alexandru Gagniuc
---
Changes since v1:
* Added comment detailing applicability to different RGMII interfaces.
drivers/net/phy/vitesse.c | 34 +-
1 file changed, 33 insertions
vsc824x_config_init().
Tested on custom board with AM3352 SOC and VSC801 PHY.
Signed-off-by: Alexandru Gagniuc
---
drivers/net/phy/vitesse.c | 31 ++-
1 file changed, 30 insertions(+), 1 deletion(-)
diff --git a/drivers/net/phy/vitesse.c b/drivers/net/phy/vitesse.c
index
