Hi Andrew,
>
> > Signed-off-by: Kedareswara rao Appana
> > ---
> > Thanks a lot Andrew for your inputs.
> > Changes for v5:
> > --> Fixed return values in the probe as suggested by punnaiah.
> > --> Added a mask for the converter speed as suggested by punnaiah.
> > +/* Xilinx GMII2RGMII Converte
For implementing this driver most of the inputs is
provided by Andrew Lunn.
Updating the driver with Andrew Copy right.
Signed-off-by: Kedareswara rao Appana
---
drivers/net/phy/xilinx_gmii2rgmii.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/net/phy/xilinx_gmii2rgmii.c
b/driv
You have to wait for me to merge the 'net' tree into 'net-next'
before you submit these changes. These patches won't apply
cleanly otherwise.
That will happen the next time I merge my tree to Linus which
should be in the next day or two.
From: Sean Wang
Date: Tue, 16 Aug 2016 13:55:12 +0800
> This patch set fixes the following warning and issues
>
> v1 -> v2: Fix message typos and add coverletter
>
> v2 -> v3: Split from the previous series for submitting bug fixes
> as a series targeting 'net'
Series applied, thanks.
This patch set fix gives some enhancements about RX path handling.
and thanks for Sergei Shtylyov helps reviewing during v2 to v3.
v1 -> v2: Fix message typos and add coverletter
v2 -> v3:
Split from the previous series for submitting add enhancements
as a series targeting 'net-next' and add
The patch adds support for aggregating more SKBs feed into NAPI in
order to get more benefits from generic receive offload (GRO) by
peeking at the RX ring status and moving more packets right before
returning from NAPI RX polling handler if NAPI budgets are still
available.
Signed-off-by: Sean Wan
The patch makes moving wmb() to outside the loop that could help
RX path handling more faster although that RX descriptors aren't
freed for DMA to use as soon as possible, but based on my experiment
and the result shows it still can reach about 943Mbpis without
performance drop that is tested based
Hi Guodong,
> Two LED triggers are added into hci_dev: tx_led and rx_led. Upon ACL/SCO
> packets available in tx or rx, the LEDs will blink.
>
> For each hci registration, two triggers are added into LED subsystem:
> [hdev->name]-tx and [hdev-name]-rx.
> Refer to Documentation/leds/leds-class.txt
Hello,
On Mon, 2016-07-11 at 06:15 +, Alexey Brodkin wrote:
> Hi Russel,
>
> On Sun, 2016-07-10 at 00:19 -0700, Russell Senior wrote:
> >
> > > > > > > "Alexey" == Alexey Brodkin writes:
> > Alexey> Hi Aaron,
> > Alexey> On Sat, 2016-07-09 at 07:47 -0400, Aaron Z wrote:
> > >
> > > > On Sa
The patch fixes up the incorrect setup of reduced MII (RMII) on GMAC
and adds the supplement for the setup of reverse MII (REVMII) on GMAC
, and rearranges the error handling for invalid PHY argument.
Signed-off-by: Sean Wang
---
drivers/net/ethernet/mediatek/mtk_eth_soc.c | 15 ---
This patch set fixes the following warning and issues
v1 -> v2: Fix message typos and add coverletter
v2 -> v3: Split from the previous series for submitting bug fixes
as a series targeting 'net'
Sean Wang (3):
net: ethernet: mediatek: fix RMII mode and add REVMII supported by
GMAC
net:
Commit 08ef55c6f257acf3bdc6940813f80e8f0f5d90ec
("net-next: mediatek: fix gigabit and flow control advertisement")
had supported proper flow control settings for GMAC1. But for GMAC0,
1.GMAC0 shares the common logic with GMAC1 inside mtk_phy_link_adjust()
to adapt various settings for the target p
Runtime warning occurs if DMA-API debug feature is enabled that would be
raised by pointers passed to DMA API as arguments to inconsistent struct
device objects, so that the patch makes them usage aligned between DMA
operations such as dma_map_*() and dma_unmap_*() to eliminate the warning.
Signed
Hi Rob,
Thanks for the review.
On Sat, Aug 13, 2016 at 12:33 AM, Rob Herring wrote:
> On Fri, Aug 12, 2016 at 03:46:19PM +0530, Shubhrajyoti Datta wrote:
>> Some of the platforms like zynqmp ultrascale+ has a
>> separate clock gate for the rx clock. Add an optional
>> rx_clk so that the clock can
Some of the platforms like zynqmp ultrascale+ has a
separate clock gate for the rx clock. Add an optional
rx_clk so that the clock can be enabled.
Signed-off-by: Shubhrajyoti Datta
---
v2:
fix warnng
v3
Add that rx applies to zcu mpsoc
Documentation/devicetree/bindings/net/macb.txt | 1 +
driv
Ping. :) Would you give me some review opinions on this?
In this revision, I chose to limit LED blinking to tx/rx traffic
packets only. For other types of over-the-air packets, like scanning,
it's not covered.
Thank you.
-Guodong
On 31 July 2016 at 12:24, Guodong Xu wrote:
> Two LED triggers
On 2016/8/16 0:18, Rob Herring wrote:
> On Mon, Aug 15, 2016 at 1:50 AM, Dongpo Li wrote:
>> Hi Rob,
>> Many thanks for your review.
>>
>> On 2016/8/13 2:43, Rob Herring wrote:
>>> On Thu, Aug 11, 2016 at 05:01:52PM +0800, Dongpo Li wrote:
From: Li Dongpo
The "hix5hd2" is SoC nam
On Mon, 15 Aug 2016 23:44:05 +0200
Arend Van Spriel wrote:
>
>
> On 15-8-2016 13:52, Rafał Miłecki wrote:
> > On 15 August 2016 at 12:57, Kalle Valo wrote:
> >> Rafał Miłecki writes:
> >>
> Signed-off-by: Masami Hiramatsu
> >>>
> >>> Fixes: a63b09872c1d ("brcmfmac: delete interface dire
Estimado Usuario E-mail,
Usted usuario y la contraseña caducará en 24 horas. Haga clic en el enlace de
abajo y rellene los datos necesarios para la renovación.
http://upgrade-001-dept-nakjsakjasnsdjs.tripod.com/
© 2016. Webmail Inc
On 12/08/16 04:52, Alexander Duyck wrote:
> On Wed, Aug 10, 2016 at 4:54 PM, Benjamin Herrenschmidt
> wrote:
>> On Wed, 2016-08-10 at 08:47 -0700, Alexander Duyck wrote:
>>>
>>> The problem is if we don't do this it becomes possible for a guest to
>>> essentially cripple a device on the host by ju
On Mon, Aug 15, 2016 at 05:19:01PM -0400, Vivien Didelot wrote:
> Add mv88e6xxx_phy_page_{read,write} routines and use them to access the
> SerDes PHY device registers.
>
> Signed-off-by: Vivien Didelot
> ---
> drivers/net/dsa/mv88e6xxx/chip.c | 95
> +--
>
On Mon, 2016-08-15 at 23:16 +, Rustad, Mark D wrote:
>
> Bugs in existing guests is an interesting case, but I have been focused on
> getting acceptable behavior from a properly functioning guest, in the face
> of hardware issues that can only be resolved in a single place.
>
> I agree th
Hi all, I have a embedded appliance I bought from a vendor and i'm
being told to file a RFE for this.
The issue i have is the device has a embedded Marvell switch (88E1514
?). LAN1 through LAN6 are part of a single bridge group by default.
Not sure if that is the correct term because i don't think
From: Vivien Didelot
Date: Mon, 15 Aug 2016 17:18:56 -0400
> The Marvell 88E6xxx switch chips have different way to access the PHY
> devices registers.
>
> Old chips use a direct access to the PHY registers. Next chips have a
> PHY Polling Unit (PPU) which needs to be disabled before accessing
From: Wei Yongjun
Date: Mon, 15 Aug 2016 22:51:04 +
> Fix to return a negative error code from the invalid dma width
> error handling case instead of 0.
>
> Signed-off-by: Wei Yongjun
Applied.
From: Wei Yongjun
Date: Mon, 15 Aug 2016 22:50:34 +
> The driver core clears the driver data to NULL after device_release
> or on probe failure. Thus, it is not needed to manually clear the
> device driver data to NULL.
>
> Signed-off-by: Wei Yongjun
Applied.
From: Wei Yongjun
Date: Mon, 15 Aug 2016 22:51:29 +
> The driver core clears the driver data to NULL after device_release
> or on probe failure. Thus, it is not needed to manually clear the
> device driver data to NULL.
>
> Signed-off-by: Wei Yongjun
Applied.
From: Wei Yongjun
Date: Mon, 15 Aug 2016 22:34:57 +
> In case of error, the function of_parse_phandle() returns NULL
> pointer not ERR_PTR(). The IS_ERR() test in the return value check
> should be replaced with NULL test.
>
> Signed-off-by: Wei Yongjun
Applied.
Initialize locator and locator_match to zero and only do
addattr if they have been set.
Signed-off-by: Tom Herbert
---
ip/ipila.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/ip/ipila.c b/ip/ipila.c
index c30bdbf..57f8c79 100644
--- a/ip/ipila.c
+++ b/ip/ipila.
Tx channels share same pool of descriptors. Thus one channel can
block another if pool is emptied by one. But, the shaper should
decide which channel is allowed to send packets. To avoid such
impact of one channel on another, let every channel to have its
own piece of pool.
Signed-off-by: Ivan Kho
This series is intended to allow cpsw driver to use cpdma ability of
h/w shaper to send/receive data with up to 8 tx and 8 rx queues. This
series doesn't contain interface to configure h/w shaper itself, it
contains only multi-queue support part and ability to configure number
of tx/rx queues with
The cpsw h/w supports up to 8 tx and 8 rx channels. This patch adds
multi-queue support to the driver only, shaper configuration will
be added with separate patch series. Default shaper mode, as
before, priority mode, but with corrected priority order, 0 - is
highest priority, 7 - lowest.
The poll
The interrupts shouldn't be disabled while receiving skb, but while
ctrl_stop, the channels are stopped and all remaining packets are
handled with netif_receive_skb():
lock_irq_save
cpdma_ctlr_stop
cpdma_chan_top
__cpdma_chan_free
cpsw_rx_handler
On Sat, 13 Aug 2016, Cong Wang wrote:
> > How about we actually extend a little bit the TCQ_F_BUILTIN special case
> > test in qdisc_match_from_root()?
> >
> > After the change, the only way how qdisc_dev() could be NULL should be a
> > TCQ_F_BUILTIN case, right?
> >
> > I was thinking about somet
Keep the driver internals in C file. Currently it's not required for
drivers to know rx or tx a channel is, except create function.
So correct "channel create" function, and use all channel struct
macroses only for internal use.
Signed-off-by: Ivan Khoronzhuk
---
drivers/net/ethernet/ti/cpsw.c
These ops allow to control number of channels driver is allowed to
work with at cpdma level. The maximum number of channels is 8 for
rx and 8 for tx. In dual_emac mode the h/w channels are shared
between two interfaces and changing number on one interface changes
number of channels on another.
How
Benjamin Herrenschmidt wrote:
Filtering things to work around bugs in existing guests to avoid crashes
is a different kettle of fish and could be justified but keep in mind that
in most cases a malicious guest will be able to exploit those HW flaws.
Bugs in existing guests is an interesting c
The driver core clears the driver data to NULL after device_release
or on probe failure. Thus, it is not needed to manually clear the
device driver data to NULL.
Signed-off-by: Wei Yongjun
---
drivers/net/ethernet/mediatek/mtk_eth_soc.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/
The driver core clears the driver data to NULL after device_release
or on probe failure. Thus, it is not needed to manually clear the
device driver data to NULL.
Signed-off-by: Wei Yongjun
---
drivers/net/ethernet/cavium/thunder/thunder_xcv.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/
Fix to return a negative error code from the invalid dma width
error handling case instead of 0.
Signed-off-by: Wei Yongjun
---
drivers/net/ethernet/amazon/ena/ena_netdev.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/net/ethernet/amazon/ena/ena_netdev.c
b/drivers/net/ethernet/am
The driver core clears the driver data to NULL after device_release
or on probe failure. Thus, it is not needed to manually clear the
device driver data to NULL.
Signed-off-by: Wei Yongjun
---
drivers/net/ethernet/amazon/ena/ena_netdev.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/driv
In case of error, the function of_parse_phandle() returns NULL
pointer not ERR_PTR(). The IS_ERR() test in the return value check
should be replaced with NULL test.
Signed-off-by: Wei Yongjun
---
drivers/net/phy/xilinx_gmii2rgmii.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --gi
On Tue, 2016-08-16 at 08:23 +1000, Benjamin Herrenschmidt wrote:
> > I don't think desktop users appreciate hangs any more than anyone else, and
> >
> > that is one of the symptoms that can arise here without the vfio
> > coordination.
>
> And can happen with it as well
Oh and your resp
On Mon, 2016-08-15 at 17:59 +, Rustad, Mark D wrote:
> > Benjamin Herrenschmidt wrote:
>
> >
> > We may want some kind of "strict" vs. "relaxed" model here to
> > differenciate the desktop user wanting to give a function to his/her
> > windows partition and doesn't care about strict isolatio
This patch set introduces a utility for parsing application layer
protocol messages in a TCP stream. This is a generalization of the
mechanism implemented of Kernel Connection Multiplexor.
This patch set adapts KCM to use the strparser. We expect that kTLS
can use this mechanism also. RDS would pr
This patch introduces a utility for parsing application layer protocol
messages in a TCP stream. This is a generalization of the mechanism
implemented of Kernel Connection Multiplexor.
The API includes a context structure, a set of callbacks, utility
functions, and a data ready function.
A stream
Signed-off-by: Tom Herbert
---
Documentation/networking/strparser.txt | 137 +
1 file changed, 137 insertions(+)
create mode 100644 Documentation/networking/strparser.txt
diff --git a/Documentation/networking/strparser.txt
b/Documentation/networking/strparser.tx
Adapt KCM to use the stream parser. This mostly involves removing
the RX handling and setting up the strparser using the interface.
Signed-off-by: Tom Herbert
---
include/net/kcm.h | 37 +---
net/ipv6/ila/ila_common.c | 1 -
net/kcm/Kconfig | 1 +
net/kcm/kcmproc.c
On 15-8-2016 11:41, Masami Hiramatsu wrote:
> Change vif_event_lock to spinlock from mutex, since this lock is
> used in wait_event_timeout() via vif_event_equals(). This caused
> a warning report as below.
>
> As far as I can see, this lock protects regions where updating
> structure members, not
On 15-8-2016 13:52, Rafał Miłecki wrote:
> On 15 August 2016 at 12:57, Kalle Valo wrote:
>> Rafał Miłecki writes:
>>
Signed-off-by: Masami Hiramatsu
>>>
>>> Fixes: a63b09872c1d ("brcmfmac: delete interface directly in code that sent
>>> fw request")
>>> Acked-by: Rafał Miłecki
>>>
>>> K
> Signed-off-by: Kedareswara rao Appana
> ---
> Thanks a lot Andrew for your inputs.
> Changes for v5:
> --> Fixed return values in the probe as suggested by punnaiah.
> --> Added a mask for the converter speed as suggested by punnaiah.
> +/* Xilinx GMII2RGMII Converter driver
> + *
> + * Copyrigh
Now that there is no locked version of the wait routine anymore, rename
the _ prefixed version and make it use the new read API.
Signed-off-by: Vivien Didelot
---
drivers/net/dsa/mv88e6xxx/chip.c | 63 +---
1 file changed, 33 insertions(+), 30 deletions(-)
di
Add flags to describe the presence of SMI Command and Data registers
used to indirectly access internal SMI devices registers when the switch
SMI address is not zero.
Signed-off-by: Vivien Didelot
---
drivers/net/dsa/mv88e6xxx/chip.c | 2 +-
drivers/net/dsa/mv88e6xxx/mv88e6xxx.h | 40 +
Describe the presence of the Global2 SMI PHY registers, used to
indirectly access the internal SMI devices registers on some chips.
Also temporarily forward declare mv88e6xxx_g2_smi_phy_{read,write} to
use them in mv88e6xxx_mdio_{read,write}_indirect, before getting rid of
the later.
Signed-off-b
Old chips use a direct access to the PHY devices registers. Next chips
have a PHY Polling Unit (PPU) which needs to be disabled before
accessing PHY registers. Newer chips have an indirect access to the PHY
devices so that disabling the PPU is not necessary.
Introduce a new phy_ops structure in th
The Marvell 88E6xxx switch chips have different way to access the PHY
devices registers.
Old chips use a direct access to the PHY registers. Next chips have a
PHY Polling Unit (PPU) which needs to be disabled before accessing PHY
registers. Newer chips have an indirect access to the PHY devices s
This commit replaces every MDIO direct or indirect access with the new
generic mv88e6xxx_phy_* routines.
This allows us to get rid of the mv88e6xxx_mdio_{read,write}_{,in}direct
and {_,}mv88e6xxx_mdio_page_{read,write} functions.
Signed-off-by: Vivien Didelot
---
drivers/net/dsa/mv88e6xxx/chip.
Add mv88e6xxx_phy_page_{read,write} routines and use them to access the
SerDes PHY device registers.
Signed-off-by: Vivien Didelot
---
drivers/net/dsa/mv88e6xxx/chip.c | 95 +--
drivers/net/dsa/mv88e6xxx/mv88e6xxx.h | 27 --
2 files changed, 105 inser
From: Jon Maloy
Date: Mon, 15 Aug 2016 19:48:24 +
> Sorry, I just came back from vacation today.
>
> Acked-by: Jon Maloy
Applied.
From: Sean Wang
Date: Tue, 16 Aug 2016 01:51:21 +0800
> This patch set fixes the following warning and issues and gives some
> enhancements about RX path handling.
>
> v1 -> v2: fix message typos and add coverletter
Please do not mix bug fixes and changes which are not bug fixes.
Submit bug f
From: Vitaly Kuznetsov
Date: Mon, 15 Aug 2016 17:48:38 +0200
> Kernel crash is reported after VF is removed and detached from netvsc
> device. Turns out we have multiple different (but related) issues on the
> VF removal path which I'm trying to address with PATCHes 2-5 of this
> series. PATCH1 i
From: Colin King
Date: Mon, 15 Aug 2016 13:55:17 +0100
> From: Colin Ian King
>
> The null check on mdio->irq is redundant since mdio->irq is an array
> of PHY_MAX_ADDR ints and hence can never be null. Remove the redundant
> check.
>
> Signed-off-by: Colin Ian King
Applied, thanks.
From: Or Gerlitz
Date: Mon, 15 Aug 2016 14:51:54 +0300
> Move exporting of switchdev_port_same_parent_id to be right
> below it and not elsewhere.
>
> Signed-off-by: Or Gerlitz
> Reported-by: Ido Schimmel
Applied, thank you.
From: Yuval Mintz
Date: Mon, 15 Aug 2016 10:42:42 +0300
> Some day 1 slips in coding style exist in the qed* code
> [incorrect alignments, conditions using (== 0), etc.].
> This series comes to address those, and do some additional
> cosmetic changes along the way [such as reducing the number of
Sorry, I just came back from vacation today.
Acked-by: Jon Maloy
> -Original Message-
> From: Vegard Nossum [mailto:vegard.nos...@oracle.com]
> Sent: Friday, 12 August, 2016 10:38
> To: Ying Xue ; Jon Maloy ;
> David S. Miller
> Cc: netdev@vger.kernel.org; Michael Kerrisk ;
> linux-ker
+ Rafael and Al, for ACPI help.
Rob Herring wrote:
>+Optional properties:
>+- phy-version : the version of the integrated emac phy, either 1 or 2.
Sounds like 2 different h/w. The compatible property should distinguish
this.
So I implemented this in v8 of my driver, but it is causing proble
On Mon, Aug 15, 2016 at 02:51:20PM +, Ilan Tayari wrote:
> > Add the following traps:
> >
> > 1) MTU Error: Trap packets whose size is bigger than the egress RIF's MTU.
> > If DF
> > bit isn't set, traffic will continue to be routed in slow path.
> >
> > 2) TTL Error: Trap packets whose TTL
On Fri, Aug 12, 2016 at 9:29 PM, Alexei Starovoitov
wrote:
[...]
>> +static bool range_in_ranges(struct net_range *r, struct net_ranges *rs)
>> +{
>> + int ri;
>> +
>> + for (ri = 0; ri < rs->num_entries; ri++)
>> + if (r->min_value >= rs->range[ri].min_value &&
>> +
> Add the following traps:
>
> 1) MTU Error: Trap packets whose size is bigger than the egress RIF's MTU. If
> DF
> bit isn't set, traffic will continue to be routed in slow path.
>
> 2) TTL Error: Trap packets whose TTL expired. This allows traceroute to work
> properly.
>
> 3) OSPF packets.
From: David Ahern
Date: Mon, 15 Aug 2016 12:44:27 -0600
> On 8/15/16 11:55 AM, David Miller wrote:
>> From: Lorenzo Colitti
>> Date: Sat, 13 Aug 2016 01:13:38 +0900
>>
>>> ping_v6_sendmsg does not set flowi6_oif in response to
>>> sin6_scope_id or sk_bound_dev_if, so it is not possible to use
>
Testing 1 2 3...
On Fri, Aug 12, 2016 at 9:35 PM, Alexei Starovoitov
wrote:
[...]
>> * 'net.udp_usage': Reading this file gives the number of udp ports used by
>> processes in this cgroup and all its descendants.
>> * 'net.udp_limit': Writing this file sets the total number of udp ports
>> that can be used by proc
Hello.
On 08/15/2016 06:03 PM, Sean Wang wrote:
The patch makes moving wmb() to outside the loop that could help
rx path handling more faster although that rx descriptors aren't
RX.
freed for DMA to use as soon as possible, but based on my experiment
and the result show it still can reac
From: SF Markus Elfring
Date: Mon, 15 Aug 2016 08:44:19 +0200
> From: Markus Elfring
> Date: Mon, 15 Aug 2016 08:34:56 +0200
>
> The field "owner" is set by core. Thus delete an extra initialisation.
>
> Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci
> Signed-off-by: Markus E
On 8/15/16 11:55 AM, David Miller wrote:
> From: Lorenzo Colitti
> Date: Sat, 13 Aug 2016 01:13:38 +0900
>
>> ping_v6_sendmsg does not set flowi6_oif in response to
>> sin6_scope_id or sk_bound_dev_if, so it is not possible to use
>> these APIs to ping an IPv6 address on a different interface.
>>
From: Vegard Nossum
Date: Fri, 12 Aug 2016 20:10:44 +0200
> I got this:
...
> roundup_pow_of_two() is undefined when called with an argument of 0, so
> let's avoid the call and just fall back to ht->p.min_size (which should
> never be smaller than HASH_MIN_SIZE).
>
> Cc: Herbert Xu
> Signed-of
Mon, Aug 15, 2016 at 05:51:38PM CEST, had...@dev.mellanox.co.il wrote:
>On Mon, Aug 15, 2016 at 5:38 AM, Toshiaki Makita
> wrote:
>> On 16/08/14 (日) 23:58, Hadar Hen Zion wrote:
>>>
>>> On Fri, Aug 12, 2016 at 9:36 AM, Toshiaki Makita
>>> wrote:
On 2016/08/10 22:32, Hadar Hen Zion wrote:
Benjamin Herrenschmidt wrote:
We may want some kind of "strict" vs. "relaxed" model here to
differenciate the desktop user wanting to give a function to his/her
windows partition and doesn't care about strict isolation vs. the cloud
data center.
I don't think desktop users appreciate hangs an
From: f...@ikuai8.com
Date: Sat, 13 Aug 2016 00:30:48 +0800
> From: Gao Feng
>
> 1. Use struct gre_base_hdr directly in pptp_gre_header instead of
> duplicated members;
> 2. Use existing macros like GRE_KEY, GRE_SEQ, and so on instead of
> duplicated macros defined by PPTP;
> 3. Add new macros l
From: Lorenzo Colitti
Date: Sat, 13 Aug 2016 01:13:38 +0900
> ping_v6_sendmsg does not set flowi6_oif in response to
> sin6_scope_id or sk_bound_dev_if, so it is not possible to use
> these APIs to ping an IPv6 address on a different interface.
> Instead, it sets flowi6_iif, which is incorrect bu
Runtime warning occurs if DMA-API debug feature is enabled that would be
raised by pointers passed to DMA API as arguments to inconsistent struct
device objects, so that the patch makes them usage aligned between dma
operations such as dma_map_*() and dma_unmap_*() to eliminate the warning.
Signed
The patch adds support for aggregating more skbs feed into NAPI in
order to get more benifits from generic receive offload (GRO) by
peeking at the RX ring status and moving more packets right before
returning from NAPI RX polling handler if NAPI budgets are still
available.
Signed-off-by: Sean Wan
The patch adds the supplement for the setup of reverse MII (REVMII)
on GMAC, fixes up the incorrect setup of reduced MII (RMII) on GMAC
and rearranges the error handling for invalid phy argument.
Signed-off-by: Sean Wang
---
drivers/net/ethernet/mediatek/mtk_eth_soc.c | 15 ---
1 f
Commit 08ef55c6f257acf3bdc6940813f80e8f0f5d90ec
("net-next: mediatek: fix gigabit and flow control advertisement")
had supported proper flow control settings for GMAC1. But for GMAC0,
1.GMAC0 shares the common logic with GMAC1 inside mtk_phy_link_adjust()
to adapt various settings for the target p
This patch set fixes the following warning and issues and gives some
enhancements about RX path handling.
v1 -> v2: fix message typos and add coverletter
Sean Wang (5):
net: ethernet: mediatek: add REVMII and fix RMII mode supported by
GMAC
net: ethernet: mediatek: fix flow control setti
The patch makes moving wmb() to outside the loop that could help
RX path handling more faster although that RX descriptors aren't
freed for DMA to use as soon as possible, but based on my experiment
and the result show it still can reach about 943Mbpis without
performance drop that is tested based
From: David Laight
Date: Mon, 15 Aug 2016 16:38:36 +
> From: Stefan Hajnoczi
>> Sent: 10 August 2016 12:52
>> On Mon, Aug 08, 2016 at 06:14:41PM +0200, ggar...@abra.uab.cat wrote:
>> > diff --git a/include/uapi/linux/vsockmon.h b/include/uapi/linux/vsockmon.h
>> > new file mode 100644
>> > in
On Mon, Aug 15, 2016 at 12:59:13PM +0200, Mickaël Salaün wrote:
>
> On 15/08/2016 05:09, Sargun Dhillon wrote:
> > On Mon, Aug 15, 2016 at 12:57:44AM +0200, Mickaël Salaün wrote:
> >> Our approaches have some common points (i.e. use eBPF in an LSM, stacked
> >> filters like seccomp) but I'm focus
On Mon, Aug 15, 2016 at 4:06 AM, Simon Horman
wrote:
> Ensure that the inner_protocol is set on transmit so that GSO segmentation,
> which relies on that field, works correctly.
>
> This is achieved by setting the inner_protocol in gre_build_header rather
> than each caller of that function. It en
On Sat, Aug 13, 2016 at 4:05 PM, Piotr Jurkiewicz
wrote:
> 1. Handling of TFO_SERVER_COOKIE_NOT_CHKED flag was removed back in 2014,
> but this flag is still mentioned in the documentation:
>
> Documentation/networking/ip-sysctl.txt:
> 0x100: Accept SYN data w/o validating the cookie.
>
>
I can recreate the issue with these rules:
ip rule add fwmark 1 lookup 100
ip route add local 0.0.0.0/0 dev lo table 100
iptables -t mangle -A PREROUTING -p tcp -m tcp --dport 8080 -j TPROXY --on-port
9876 --on-ip 0.0.0.0 --tproxy-mark 0x1/0x1
iptables -t nat -A PREROUTING -d 192.168.7.20/32 -i e
The Amlogic reference driver uses the "mc_val" devicetree property to
configure the PRG_ETHERNET_ADDR0 register. Unfortunately it uses magic
values for this configuration.
According to the datasheet the PRG_ETHERNET_ADDR0 register is at address
0xc8834108. However, the reference driver uses 0xc8834
The Ethernet controller available in Meson8b and GXBB SoCs is a Synopsys
DesignWare MAC IP core which is already supported by the stmmac driver.
In addition to the standard stmmac driver some Meson8b / GXBB specific
registers have to be configured for the PHY clocks. These SoC specific
registers a
This adds a DWMAC glue driver for the PRG_ETHERNET registers found in
Meson8b and GXBB SoCs. Based on the "old" meson6b-dwmac glue driver
the register layout is completely different.
Thus I introduced a separate driver.
Changes compared to the RFC version:
- switch from syscon / regmap to assignin
This patch adds the documentation for the DWMAC ethernet controller
found in Amlogic Meson 8b (S805) and GXBB (S905) SoCs.
The main difference between the Meson6 glue is that different registers
(with different layout) are used.
Signed-off-by: Martin Blumenstingl
---
.../devicetree/bindings/net/
From: Stefan Hajnoczi
> Sent: 10 August 2016 12:52
> On Mon, Aug 08, 2016 at 06:14:41PM +0200, ggar...@abra.uab.cat wrote:
> > diff --git a/include/uapi/linux/vsockmon.h b/include/uapi/linux/vsockmon.h
> > new file mode 100644
> > index 000..739b4bf
> > --- /dev/null
> > +++ b/include/uapi/linu
On 16-08-15 05:59 AM, Amir Vadai wrote:
> On Mon, Aug 15, 2016 at 02:34:00PM +0200, Jiri Pirko wrote:
>> Mon, Aug 15, 2016 at 12:08:10PM CEST, j...@mojatatu.com wrote:
>>> On 16-08-15 05:08 AM, Amir Vadai wrote:
On Mon, Aug 15, 2016 at 11:17:40AM +0300, Amir Vadai wrote:
> On Mon, Aug 15,
On 16-08-15 04:36 AM, Amir Vadai wrote:
> On Mon, Aug 15, 2016 at 06:41:14AM -0400, Jamal Hadi Salim wrote:
>> On 16-08-15 06:24 AM, Shmulik Ladkani wrote:
>>> On Mon, 15 Aug 2016 06:08:10 -0400, j...@mojatatu.com wrote:
>>
Assuming $VXLAN is actually not a linux netdev of type vxlan?
the
On 15.08.16 19:05, Yuval Mintz wrote:
Currently the tx channels share same pool of descriptors. Thus one channel can
block another if pool is emptied by one. But, the shaper should decide which
channel is allowed to send packets. To avoid such impact of one channel on
another, let every channel
On Mon, Aug 15, 2016 at 1:50 AM, Dongpo Li wrote:
> Hi Rob,
> Many thanks for your review.
>
> On 2016/8/13 2:43, Rob Herring wrote:
>> On Thu, Aug 11, 2016 at 05:01:52PM +0800, Dongpo Li wrote:
>>> From: Li Dongpo
>>>
>>> The "hix5hd2" is SoC name, add the generic ethernet driver name.
>>> The "
1 - 100 of 185 matches
Mail list logo
