> > OpenBSD has no clue what it is wired to. Except on a lot of machines,
> > some pin has been wired to something on the board itself.
> >
>
> So it was, kernel being clueless, before FDT became mandatory, no?
> I'd guess we're more likely to run into a u-boot build in the future not
> providin
> > > Most hardware + firmware combinations provide insufficient detail
> > > to know what pins are used for what, reserved for what, or wired
> > > to an auto-destruct.
> >
> > But that's by design. GPIO is simply an interface to a digital I/O pin =
> > on the CPU. Everything after that is up t
> > Most hardware + firmware combinations provide insufficient detail
> > to know what pins are used for what, reserved for what, or wired
> > to an auto-destruct.
>
> But that's by design. GPIO is simply an interface to a digital I/O pin =
> on the CPU. Everything after that is up to the end-us
> Most hardware + firmware combinations provide insufficient detail
> to know what pins are used for what, reserved for what, or wired
> to an auto-destruct.
But that's by design. GPIO is simply an interface to a digital I/O pin on the
CPU. Everything after that is up to the end-user. Especiall
> I was surprised by Theo's answer because I recall BeagleBone Black was
> open hardware, at least as a design.
The word "Open" means nothing in this instance.
Most hardware + firmware combinations provide insufficient detail
to know what pins are used for what, reserved for what, or wired
to an
> Pins 3 through 46 on P8 are listed in the hardware
> information as available for GPIO. Indeed, I can set any of them but
> I notice that on pins 25 (gpio1_0), 21 (gpio1_30), and 20 (gpio1_31)
> seem to be reserved by OpenBSD and great trouble is caused if I try to
> set them with gpioctl(8) lik
>How can I find all pins are reserved by OpenBSD and should not be
>changed or used?
>Of the pins reserved, what are their purposes?
We don't know. For any of these platforms.
If we knew what specific pins did -- for certain -- there would
be a driver using them.
I think the entire subsystem is
I've been walking through the GPIO pins for expansion header P8 on a
Beaglebone Black, checking actual pin output with the hardware [1] [2]
information. Pins 3 through 46 on P8 are listed in the hardware
information as available for GPIO. Indeed, I can set any of them but
I notice that on pins 25
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