up.
Cc: Mika Kuoppala
Cc: Arun Siluvery
Signed-off-by: Joonas Lahtinen
---
src/mesa/drivers/dri/i965/brw_state_upload.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c
b/src/mesa/drivers/dri/i965/brw_state_upload.c
index 9d
Hi,
On ke, 2015-08-12 at 18:34 -0700, Ben Widawsky wrote:
> On Wed, Aug 12, 2015 at 03:09:44PM +0300, Joonas Lahtinen wrote:
> > Add a comment about reinforcing command order so that
> > 3DSTATE_BINDING_TABLE_POINTER_* commands are after
> > 3DSTATE_CONSTANT_* commands for
1 - Objects can any size, and X,Y or untiled
> + */
> + value = 1;
The actual test would be if this function call succeeds, though.
value = 0 would never be returned, so I'm not sure it'll be useful to
document as such. So I might document as "Failure t
On to, 2016-08-25 at 09:27 +0100, Chris Wilson wrote:
> On Thu, Aug 25, 2016 at 11:00:54AM +0300, Joonas Lahtinen wrote:
> >
> > On ke, 2016-08-24 at 20:42 +0100, Chris Wilson wrote:
> > >
> > > +++ b/drivers/gpu/drm/i915/i915_drv.c
> > > @@ -355,6
This is still awaiting for comments.
I'd rather hear what are the desirable modifications than try guessing.
On ma, 2014-11-10 at 15:18 +0200, Joonas Lahtinen wrote:
> Hi,
>
> On pe, 2014-11-07 at 17:40 -0800, Eric Anholt wrote:
> > Ian Romanick writes:
> >
&g
Hi,
This could then be applied with the correction s/i915/i965/ in the
commit message, right?
Regards, Joonas
On to, 2015-08-13 at 09:06 -0700, Ben Widawsky wrote:
> On Thu, Aug 13, 2015 at 10:38:43AM +0300, Joonas Lahtinen wrote:
> > Hi,
> >
> > On ke, 2015-08-12 at 18:3
. So you need to enable DRI3
from all three; Mesa, X driver and X server, to get the benefit.
Regards, Joonas
PS. Will be traveling over the weekend, so will react to comments on
Monday.
>From c945e777e0aaf77a5ec450cdec1cf4db89ef0c8d Mon Sep 17 00:00:00 2001
From: Joonas Lahtinen
Date: Wed,
Hi,
On pe, 2014-10-24 at 17:37 +, Emil Velikov wrote:
> Hi Joonas,
>
> On 22/10/14 18:17, Joonas Lahtinen wrote:
> > Hi,
> >
> > This patch introduced DRI3 support to the EGL backend.
> >
> > Patch is on top of current master. With the patch you can o
Hi,
Comments below.
On ti, 2014-10-28 at 12:44 +0100, Axel Davy wrote:
> On 28/10/2014 10:19, Joonas Lahtinen wrote :
> > Hi,
> >
> > On pe, 2014-10-24 at 17:37 +, Emil Velikov wrote:
> >> Hi Joonas,
> >>
> >> On 22/10/14 18:17, Joonas
Hi,
Modified not refer to DRI3, just uses the present extension to get rid
of the excess buffer invalidations.
Regards, Joonas
From 257e2a8c750f9dcf868cce9da8632df3cae0fcec Mon Sep 17 00:00:00 2001
From: Joonas Lahtinen
Date: Wed, 5 Nov 2014 12:25:32 +0200
Subject: [PATCH] egl: dri2: Use
On to, 2014-11-06 at 18:12 +0900, Michel Dänzer wrote:
> On 05.11.2014 20:14, Joonas Lahtinen wrote:
> >
> > Modified not refer to DRI3, just uses the present extension to get rid
> > of the excess buffer invalidations.
>
> AFAICT there's no fallback from your cha
n 05/11/14 11:14, Joonas Lahtinen wrote:
> > Hi,
> >
> > Modified not refer to DRI3, just uses the present extension to get rid
> > of the excess buffer invalidations.
> >
> > Regards, Joonas
> >
> > From 257e2a8c750f9dcf868cce9da8632df3cae0fcec Mon Sep
Hi,
On pe, 2014-11-07 at 17:40 -0800, Eric Anholt wrote:
> Ian Romanick writes:
>
> > On 11/06/2014 06:16 PM, Michel Dänzer wrote:
> >> On 06.11.2014 19:18, Joonas Lahtinen wrote:
> >>> On to, 2014-11-06 at 18:12 +0900, Michel Dänzer wrote:
> >>>
hat, looks good. Chris already commented some on the code
itself.
Regards, Joonas
--
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
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ters we could quickly list, are
missing"). You can see for yourself at execlists_init_reg_state() in
"intel_lrc.c". So currently you can expect issues if some userspace
sets fancy register values that the rest of the userspaces are not
setting.
We'll be providing a rework on the cont
2017 at 10:31 AM, Kenneth Graunke
> wrote:
> > On Wednesday, October 25, 2017 7:33:41 AM PDT Jason Ekstrand wrote:
> > > On October 25, 2017 06:05:16 Joonas Lahtinen wrote:
> > [snip]
> > > > There indeed seems to be quite a lot of missing registers from the i915
On Wed, 2017-09-27 at 16:18 +0100, Chris Wilson wrote:
> Mention to the debug log if the kernel scheduler is enabled; and in
> particular if it has preemption enabled.
>
> Signed-off-by: Chris Wilson
> Cc: Joonas Lahtinen
> Cc: Ben Widawsky
This should debugging much more p
hris Wilson
> > Cc: Joonas Lahtinen
> > Cc: Ben Widawsky
> > Reviewed-by: Joonas Lahtinen
> > ---
> > src/mesa/drivers/dri/i965/intel_screen.c | 11 +++
> > 1 file changed, 11 insertions(+)
> >
> > diff --git a/src/mesa/drivers/dri/i9
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