Re: [Mesa-dev] Time to merge threaded GL dispatch? (aka glthread)

Hi, On Mon, 2017-02-06 at 13:43 +0100, Jan Ziak wrote: > Shadow of Mordor benchmark: 30 FPS w/o glthread -> 20 FPS with > glthread > For what it is worth, all the Feral games have a dispatch thread that primarily calls GL functions. James ___ mesa-dev

Re: [Mesa-dev] Time to merge threaded GL dispatch? (aka glthread)

Hi Gregory, On Tue, 2017-02-07 at 16:04 +0100, Gregory Hainaut wrote: > > Hi, > > > > On Mon, 2017-02-06 at 13:43 +0100, Jan Ziak wrote: > > > Shadow of Mordor benchmark: 30 FPS w/o glthread -> 20 FPS with > > > glthread > > >  > > > > For what it is worth, all the Feral games have a dispatch th

[Mesa-dev] [PATCH] mesa: lower severity for GLSL compiler warnings

This matches the examples in the GL_KHR_debug spec. --- src/mesa/main/errors.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/mesa/main/errors.c b/src/mesa/main/errors.c index 3a40c74..ad495d6 100644 --- a/src/mesa/main/errors.c +++ b/src/mesa/main/errors.c @@ -385,7 +38

[Mesa-dev] [PATCH] radeonsi: Fix primitive restart when index changes

If primitive restart is enabled for two consecutive draws which use different primitive restart indices, then the first draw's primitive restart index was incorrectly used for the second draw. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98025 --- src/gallium/drivers/radeonsi/si_state_d

Re: [Mesa-dev] [PATCH v3 44/63] st/mesa: add infrastructure for storing bound texture/image handles

On Fri, 2017-06-09 at 15:35 +0200, Samuel Pitoiset wrote: > v2: - rename st_bound_handle to st_bound_handles > > Signed-off-by: Samuel Pitoiset > Reviewed-by: Nicolai Hähnle (v1) > Reviewed-by: Marek Olšák (v2) > --- >  src/mesa/state_tracker/st_context.c |  2 + >  src/mesa/state_tracker/st_con

[Mesa-dev] [PATCH] anv: remove early out from cmd_buffer_setup_attachments

Even when there are no attachments, set up cmd_buffer->state->render_pass_states, so that secondary command buffers with the VK_COMMAND_BUFFER_USAGE_RENDER_PASS_CONTINUE_BIT usage flag enabled can be used in VkCmdExecuteCommands with valid allocation sizes. CC: --- src/intel/vulkan/genX_cmd_buff

Re: [Mesa-dev] [PATCH] anv: remove early out from cmd_buffer_setup_attachments

On Fri, 2017-07-14 at 18:06 +0100, Lionel Landwerlin wrote: > Hi James, > > I think this patch from Jason might fix the same problem :  > https://patchwork.freedesktop.org/patch/166280/ Yes it does. I'll drop my patch if and when Jason's is pushed to master. Thanks, James. __

Re: [Mesa-dev] [PATCH 03/11] anv/cmd_buffer: Properly handle render passes with 0 attachments

On Tue, 2017-07-11 at 17:04 -0700, Jason Ekstrand wrote: > We were early returning and never created the NULL surface state. > > Cc: mesa-sta...@lists.freedesktop.org This patch fixes a bug that affected me. Tested-by: James Legg I submitted a similar patch before seeing this o

Re: [Mesa-dev] [PATCH] st/mesa: create framebuffer iface hash table per st manager

On Sun, 2017-07-23 at 16:37 -0700, Charmaine Lee wrote: > With this patch, framebuffer interface hash table is created > per state tracker manager. > > Fixes crash with steam. > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101876 > Fixes: 5124bf98239 ("st/mesa: add destroy_drawable in

Re: [Mesa-dev] [PATCH] radv: do not dump meta shaders with RADV_DEBUG=shaders

Hi Samuel, On Thu, 2017-11-30 at 22:16 +0100, Samuel Pitoiset wrote: > It's really annoying and this pollutes the output especially > when a bunch of non-meta shaders are compiled. > diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c > index 32edf2abd2..5464d3a58e 100644 > -

[Mesa-dev] [PATCH 1/2] spirv: Fix reaching unreachable for compare exchange on images

We were hitting the unreachable("Invalid image opcode") near the end of vtn_handle_image when parsing SpvOpAtomicCompareExchange and SpvOpAtomicCompareExchangeWeak opcodes. --- src/compiler/spirv/spirv_to_nir.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/compiler/spirv/spirv

[Mesa-dev] [PATCH 2/2] ac/nir: Make intrinsic_name buffer long enough

When using cmpswap on an image, it was being trunctated to lvm.amdgcn.image.atomic.cmpswa, with the coords type missing entirely. --- src/amd/common/ac_nir_to_llvm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.

[Mesa-dev] [PATCH 3/2] ac/nir: assert printfs will fit

--- src/amd/common/ac_nir_to_llvm.c | 17 - 1 file changed, 12 insertions(+), 5 deletions(-) diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index 3a26668..b32a9f5 100644 --- a/src/amd/common/ac_nir_to_llvm.c +++ b/src/amd/common/ac_nir_to_llvm.c @@

[Mesa-dev] [PATCH v2 3/3] ac/nir: assert printfs will fit

--- src/amd/common/ac_nir_to_llvm.c | 17 - 1 file changed, 12 insertions(+), 5 deletions(-) diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index 3a26668..b32a9f5 100644 --- a/src/amd/common/ac_nir_to_llvm.c +++ b/src/amd/common/ac_nir_to_llvm.c @@

[Mesa-dev] [PATCH v2 1/3] spirv: Fix reaching unreachable for compare exchange on images

We were hitting the unreachable("Invalid image opcode") near the end of vtn_handle_image when parsing SpvOpAtomicCompareExchange and SpvOpAtomicCompareExchangeWeak opcodes. v2: Add stable CC CC: --- src/compiler/spirv/spirv_to_nir.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a

[Mesa-dev] [PATCH v2 2/3] ac/nir: Make intrinsic_name buffer long enough

When using cmpswap on an image, it was being trunctated to lvm.amdgcn.image.atomic.cmpswa, with the coords type missing entirely. v2: Add stable CC CC: Reviewed-by: Grazvydas Ignotas --- src/amd/common/ac_nir_to_llvm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/amd

Re: [Mesa-dev] [PATCH 1/2] spirv: Fix reaching unreachable for compare exchange on images

On Fri, 2017-06-23 at 11:29 -0700, Jason Ekstrand wrote: > OpAtomicCompareExchangeWeak is only available in OpenCL, not Vulkan.  > As such, we probably don't want to handle it yet as no one uses > spirv_to_nir for OpenCL.  The assert on AtomicCompareExchange is, > however, a bug we should fix now.

[Mesa-dev] [PATCH v3 1/3] spirv: Fix reaching unreachable for compare exchange on images

We were hitting the unreachable("Invalid image opcode") near the end of vtn_handle_image when parsing the SpvOpAtomicCompareExchange opcode. v2: Add stable CC. v3: Ignore SpvOpAtomicCompareExchangeWeak. It requires the Kernel capability which is not exposed in Vulkan, and spirv_to_nir is n

[Mesa-dev] [PATCH] nir/opcodes: Fix constant-folding of bitfield_insert

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104119 CC: CC: Samuel Pitoiset --- src/compiler/nir/nir_opcodes.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/compiler/nir/nir_opcodes.py b/src/compiler/nir/nir_opcodes.py index ac7333fe78..278562b2bd 100644

Re: [Mesa-dev] [PATCH 1/2] radv: enable lowering of nir_op_bitfield_insert

On Tue, 2017-12-05 at 14:24 -0500, Connor Abbott wrote: > lower_bitfield_insert lowers nir_op_bitfield_insert to DX10-style > nir_op_bfi and nir_op_bfm, both of which aren't handled by > ac_nir_to_llvm, so unless I'm missing something this will just break > them even harder. We probably should use

Re: [Mesa-dev] [PATCH 21/25] radv/ac: add support for TCS/TES inputs/outputs.

On Thu, 2017-03-30 at 18:01 +1000, Dave Airlie wrote: > --- a/src/amd/common/ac_nir_to_llvm.c > +++ b/src/amd/common/ac_nir_to_llvm.c > @@ -2244,6 +2370,322 @@ radv_get_deref_offset(struct > nir_to_llvm_context *ctx, nir_deref *tail, >  } >   >  static LLVMValueRef > +lds_load(struct nir_to_llvm_co

[Mesa-dev] [PATCH] radv: Really use correct HTILE expanded words.

When transitioning to an htile compressed depth format, Set the full depth range, so later rasterization can pass HiZ. Previously, for depth only formats, the depth range was set to 0 to 0. This caused unwanted HiZ rejections with a VK_FORMAT_D16_UNORM depth buffer (VK_FORMAT_D32_SFLOAT was not aff

Re: [Mesa-dev] [PATCH] radv: Really use correct HTILE expanded words.

ixed with 5158603182fe7435 (and still occurs if I change the clear word back to 0x) and I can confirm this patch does not reintroduce it. > On Thu, Feb 22, 2018 at 5:57 PM, James Legg > wrote: > > When transitioning to an htile compressed depth format, Set the full > > depth range,

[Mesa-dev] [PATCH] radv: Unset ZRANGE_PRECISION when depth was zeroed

This avoids bug 105396 somehow. I suspect it is a VI and GFX9 hardware bug which PAL calls WaTcCompatZRange, but I don't know for sure. In the VK_FORMAT_D32_SFLOAT case, TILE_STENCIL_DISABLE is not set for tc compatible image formats regardless of not having a stencil aspect. If TILE_STENCIL_DISAB

Re: [Mesa-dev] Mesa 17.3.4 release candidate

The conflict resolution on this commit has a typo, it should use (index + i) instead of (index + 1). ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH] ac/nir: Fix conflict resolution typo in handle_vs_input_decl

Fixes ad764e365beb8a119369b97f5cb95fc7ea8c: "ac/nir: Use instance_rate_inputs per attribute, not per variable". CC: CC: Emil Velikov CC: Bas Nieuwenhuizen --- src/amd/common/ac_nir_to_llvm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/amd/common/ac_nir_to_llvm.c

[Mesa-dev] [PATCH] radv: Fix using more than 4 bound descriptor sets

Avoid a buffer overflow in ac_nir_to_llvm.c's create_function when using more than 4 descriptor sets. radv claims support for 8. Cc: 17.0 --- src/amd/common/ac_nir_to_llvm.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/amd/common/ac_nir_to_llvm.h b/src/amd/common/ac

Re: [Mesa-dev] [PATCH] radv: Unset ZRANGE_PRECISION when depth was zeroed

On Thu, 2018-03-22 at 02:36 +0100, Bas Nieuwenhuizen wrote: > On Thu, Mar 8, 2018 at 12:59 PM, James Legg > wrote: > > This avoids bug 105396 somehow. I suspect it is a VI and GFX9 hardware > > bug which PAL calls WaTcCompatZRange, but I don't know for sure. > > &g

[Mesa-dev] [PATCH] vulkan/wsi/wayland: fix leaks

Fixes: bfa22266cd vulkan/wsi/wayland: Add support for zwp_dmabuf CC: Daniel Stone CC: Jason Ekstrand --- src/vulkan/wsi/wsi_common_wayland.c | 4 1 file changed, 4 insertions(+) diff --git a/src/vulkan/wsi/wsi_common_wayland.c b/src/vulkan/wsi/wsi_common_wayland.c index d36947bc29..ec38a4