row
>
> v2: avoid unnecessary x11 roundtrips (Chad Versace)
>
> Signed-off-by: Tapani Pälli
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98327
> ---
> src/egl/drivers/dri2/platform_x11.c | 36
> 1 file changed, 3
On Wed 21 Dec 2016, Xu, Randy wrote:
> Hi, Kenneth
>
> The patch https://android-review.googlesource.com/#/c/291429/ for GLES3.1 has
> been merged to dEQP master branch, so expect the GLES3 change should be
> merged also.
> In this case, we don't need this change in Mesa.
The dEQP maitainers
To my knowledge, this fixes no tests. I simply wrote the patch for
completeness as a follow-up to the previous two patches.
---
src/mesa/drivers/dri/i965/intel_screen.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/intel_screen.c
b/src/mesa/drivers/dri/i965/i
_mesa_choose_tex_format() already handles GL_RGBA +
GL_UNSIGNED_SHORT_1_5_5_5_REV
by converting it to MESA_FORMAT_B5G5R5A1_UNORM. Teach it do the same for
the non-reversed type. Otherwise, the switch's fallthrough converts it
to an format, which has incompatible precision in the alpha
channel
This allows eglCreateImage() to accept textures of said format.
Patch 1/2 to fix
dEQP-EGL.functional.image.modify.tex_rgb5_a1_tex_subimage_rgba8
on Intel.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99185
---
include/GL/internal/dri_interface.h| 2 ++
src/mesa/drivers/dri/common/d
hardware supports BRW_SURFACE_FORMAT_B5G5R5A1_UNORM, so teach
glTexImage2D to choose that instead.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99185
Chad Versace (3):
dri: Add __DRI_IMAGE_FORMAT_ARGB1555
mesa/texformat: Handle GL_RGBA + GL_UNSIGNED_SHORT_5_5_5_1
i965: Allow import/export
To my knowledge, this fixes no tests. I simply wrote the patch for
completeness as a follow-up to the previous two patches.
v2: Fix copy-paste error.
---
src/mesa/drivers/dri/i965/intel_screen.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/intel_screen.c
b/src
Fixes dEQP-EGL.functional.create_context_ext.robust_*
on Intel with GBM.
If the user sets the EGL_CONTEXT_OPENGL_ROBUST_ACCESS_BIT_KHR in
EGL_CONTEXT_FLAGS_KHR when creating an OpenGL ES context, then
EGL_KHR_create_context spec requires that we unconditionally emit
EGL_BAD_ATTRIBUTE because that
Stop using drmCommandWriteRead for such a simple ioctl.
v2: Handle errno correctly. [ickle]
---
src/mesa/drivers/dri/i965/intel_screen.c | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/intel_screen.c
b/src/mesa/drivers/dri/i965/intel_scre
On Thu 23 Jun 2016, Jason Ekstrand wrote:
> This series is largely a resend of the earlier series. Most of the
> precursor ISL cleanup patches have been pushed and tagged for 12.0 for
> Vulkan. These are the patches actually needed to convert the i965 driver
> over.
>
> The primary change since
ntel/genxml/gen45.xml
> create mode 100644 src/intel/genxml/gen5.xml
Patch 1 is
Acked-by: Chad Versace
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On Thu 23 Jun 2016, Jason Ekstrand wrote:
> ---
> src/intel/isl/isl.h | 21 +
> src/intel/isl/isl_format_layout.csv | 14 ++
> 2 files changed, 35 insertions(+)
>
> diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h
> index f2128d8..4aedb11 1006
On Thu 23 Jun 2016, Jason Ekstrand wrote:
> ---
> src/intel/isl/isl.h | 26 ++
> 1 file changed, 26 insertions(+)
>
> diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h
> index 4aedb11..5011d15 100644
> --- a/src/intel/isl/isl.h
> +++ b/src/intel/isl/isl.h
> @@ -506,6
On Wed 29 Jun 2016, Jason Ekstrand wrote:
> On Wed, Jun 29, 2016 at 3:03 PM, Chad Versace
> wrote:
>
> > On Thu 23 Jun 2016, Jason Ekstrand wrote:
> > > ---
> > > src/intel/isl/isl.h | 21 +
> > >
On Thu 23 Jun 2016, Jason Ekstrand wrote:
> ---
> src/intel/isl/isl.h | 7 +++
> src/intel/isl/isl_surface_state.c | 39
> ---
> 2 files changed, 43 insertions(+), 3 deletions(-)
>
> diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h
> i
On Mon 27 Jun 2016, Nanley Chery wrote:
> Signed-off-by: Nanley Chery
> ---
> src/intel/isl/isl.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Patch 1 is
Reviewed-by: Chad Versace
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> Prior to patch https://patchwork.freedesktop.org/patch/95338/ ,
> this change made crucible tests which attempted to make a linear
> depth image assert-fail.
Patch 4 is
Reviewed-by: Chad Versace
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On Mon 27 Jun 2016, Nanley Chery wrote:
> Signed-off-by: Nanley Chery
> ---
> src/intel/vulkan/anv_image.c | 10 --
> 1 file changed, 4 insertions(+), 6 deletions(-)
>
> diff --git a/src/intel/vulkan/anv_image.c b/src/intel/vulkan/anv_image.c
> index 77d9931..b3f5f5c 100644
> --- a/src/i
On Mon 27 Jun 2016, Nanley Chery wrote:
> In the next patch, ISL will unconditionally perform verification of a
> surface's tiling and usage. Since it will require that w-tiled images
> be stencil buffers, create a stencil surface to copy from a
> w-tiled/stencil surface.
>
> Signed-off-by: Nanley
On Thu 30 Jun 2016, Stéphane Marchesin wrote:
> On Thu, Jun 30, 2016 at 3:20 PM, Gurchetan Singh
> wrote:
> > There are a few places in the code where clearing and reading are done on
> > incorrect buffers for GLES contexts. See comments for details. This
> > fixes 75 GLES3 dEQP tests on the sur
On Fri 01 Jul 2016, Nanley Chery wrote:
> On Fri, Jul 01, 2016 at 02:24:19PM -0700, Chad Versace wrote:
> > I don't agree with this patch.
> >
> > Locally, the patch look correct. But when you consider that
> > anv_image_create() is public within the driver, the
On Mon 20 Jun 2016, Guillaume Charifi wrote:
> Fixes a regression induced by commit a0674ce5c41903ccd161e89abb149621bfbc40d2:
> When EGL_TEXTURE_FORMAT and EGL_TEXTURE_TARGET were both specified (and
> both != EGL_NO_TEXTURE), an error was instantly triggered, before the
> other one had even a chan
On Wed 06 Jul 2016, Chad Versace wrote:
> On Mon 20 Jun 2016, Guillaume Charifi wrote:
> > Fixes a regression induced by commit
> > a0674ce5c41903ccd161e89abb149621bfbc40d2:
> > When EGL_TEXTURE_FORMAT and EGL_TEXTURE_TARGET were both specified (and
> > both != EG
On Fri 01 Jul 2016, Chad Versace wrote:
> On Thu 30 Jun 2016, Stéphane Marchesin wrote:
> > On Thu, Jun 30, 2016 at 3:20 PM, Gurchetan Singh
> > wrote:
> > > There are a few places in the code where clearing and reading are done on
> > > incorrect buffers for
> 1 file changed, 14 insertions(+), 15 deletions(-)
Reviewed-by: Chad Versace
And pushed.
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.4/eglcreatepbuffersurface and then glclear"
Fixes: piglit "spec/egl 1.4/largest possible eglcreatepbuffersurface and
then glclear"
I pushed and gave it my
Reviewed-by: Chad Versace
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eletions(-)
Reviewed-by: Chad Versace
And pushed.
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Patches 1 and 2 are
Reviewed-by: Chad Versace
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b892c..0fee93c 100644
> --- a/src/intel/vulkan/anv_dump.c
> +++ b/src/intel/vulkan/anv_dump.c
Patch 3 is
Reviewed-by: Chad Versace
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On Fri 17 Jun 2016, Jason Ekstrand wrote:
> ---
> src/intel/vulkan/anv_dump.c | 22 ++
> 1 file changed, 22 insertions(+)
Patch 4 is
Reviewed-by: Chad Versace
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x);
> +
> + dump_add_image(cmd_buffer, (struct anv_image *)iview->image, aspect,
> +iview->base_mip, iview->base_layer, filename);
The cast is unneeded. The type is already (struct anv_image *).
Drop the cast and this is
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Swap srcAccessMask and dstAccessMask.
---
src/intel/vulkan/anv_dump.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/intel/vulkan/anv_dump.c b/src/intel/vulkan/anv_dump.c
index 49a5ae2..4a5a44f 100644
--- a/src/intel/vulkan/anv_dump.c
+++ b/src/intel/vulkan/anv_dump.c
'true' is not valid for VkDependencyFlags.
---
src/intel/vulkan/anv_dump.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/intel/vulkan/anv_dump.c b/src/intel/vulkan/anv_dump.c
index 1dc5079..49a5ae2 100644
--- a/src/intel/vulkan/anv_dump.c
+++ b/src/intel/vulkan/anv_dump.c
This function converts an attribute list from EGLint[] to EGLAttrib[].
Will be use in following patches to cleanup EGLSync attribute parsing.
---
src/egl/main/eglapi.c | 41 +
src/egl/main/eglapi.h | 2 ++
2 files changed, 43 insertions(+)
diff --git a/src
eglCreateSyncKHR takes an attribute list of type EGLint[]. eglCreateSync
takes one of type EGLAttrib[]. Implement eglCreateSyncKHR's attribute
parsing in terms of eglCreateSync's by converting the EGLint[] into
EGLAttrib[].
This cleanup will simplify the code when later implementing
EGL_ANDROID_na
- The list elements have type EGLAttrib, not EGLint.
- The array index iterator should be size_t, not EGLint.
---
src/egl/main/eglsync.c | 13 +++--
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/src/egl/main/eglsync.c b/src/egl/main/eglsync.c
index 33625e9..48714d1 100644
-
witree.net/~chadv/mesa/log/?h=review/egl-sync-cleanups-v01
Chad Versace (4):
egl: Add _eglConvertIntsToAttribs()
egl: Fix type errors in _eglParseSyncAttribList64()
egl: Refactor errors for bad EGLSync attributes
egl: Unify attrib parsing of eglCreateSync, eglCreateSyncKHR
src/egl/main/egla
Move the error handling into a little helper function. This will keep
the code clean when later adding error handling for attribute
EGL_SYNC_NATIVE_FENCE_FD_ANDROID.
And fix the log message to work when EGLAttrib is 32-bit or 64-bit.
---
src/egl/main/eglsync.c | 31 +++
Cacheing the signal status complicates the code for questionable
performance benefit. I added the cacheing long ago, and I now think it
was the wrong decision.
---
src/mesa/drivers/dri/i965/intel_syncobj.c | 28 +++-
1 file changed, 3 insertions(+), 25 deletions(-)
diff --
See the comments.
---
include/GL/internal/dri_interface.h | 9 +
1 file changed, 9 insertions(+)
diff --git a/include/GL/internal/dri_interface.h
b/include/GL/internal/dri_interface.h
index 99c83ec..051ddb4 100644
--- a/include/GL/internal/dri_interface.h
+++ b/include/GL/internal/dri_in
This bool maps to I915_PARAM_HAS_EXEC_FENCE_FD.
TODO: The i915 param is not yet upstream. Wait for the kernel interface
before committing.
---
src/mesa/drivers/dri/i965/intel_screen.c | 3 +++
src/mesa/drivers/dri/i965/intel_screen.h | 2 +-
2 files changed, 4 insertions(+), 1 deletion(-)
dif
From: Rob Clark
[chadv]: Fix bugs in attribute parsing.
Signed-off-by: Rob Clark
---
src/egl/drivers/dri2/egl_dri2.c | 49 +
src/egl/main/eglapi.c | 36 +++---
src/egl/main/eglapi.h | 2 ++
src/egl/main/egldis
Close the sync fd *after* the sync's refcount drops to 0.
---
src/egl/drivers/dri2/egl_dri2.c | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/src/egl/drivers/dri2/egl_dri2.c b/src/egl/drivers/dri2/egl_dri2.c
index a9d351e..c7b81ce 100644
--- a/src/egl/drivers/dr
From: Rob Clark
Reduce the noise in the next patch. For EGL_SYNC_NATIVE_FENCE_ANDROID
the sync condition is conditional on EGL_SYNC_NATIVE_FENCE_FD_ANDROID
attribute.
Signed-off-by: Rob Clark
---
src/egl/main/eglsync.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
di
Mesa was incrementing and decrementing EGL refcounts with ++ and --.
---
src/egl/main/egldisplay.c | 13 +++--
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/src/egl/main/egldisplay.c b/src/egl/main/egldisplay.c
index bbc3063..78b5d20 100644
--- a/src/egl/main/egldisplay.c
+
Don't set SyncCondition twice.
---
src/egl/main/eglsync.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/src/egl/main/eglsync.c b/src/egl/main/eglsync.c
index 375f223..d65fbdd 100644
--- a/src/egl/main/eglsync.c
+++ b/src/egl/main/eglsync.c
@@ -119,7 +119,6 @@ _eglInitSync(_EGLSync *sync, _EGL
See the comments.
---
src/egl/drivers/dri2/egl_dri2.c | 12
1 file changed, 12 insertions(+)
diff --git a/src/egl/drivers/dri2/egl_dri2.c b/src/egl/drivers/dri2/egl_dri2.c
index c7b81ce..03ed4b9 100644
--- a/src/egl/drivers/dri2/egl_dri2.c
+++ b/src/egl/drivers/dri2/egl_dri2.c
@@ -24
A variant of intel_batchbuffer_flush() with parameters for in and out
fence fds.
TODO: The i915 kernel interface is not yet upstream.
TODO: The fence variants of libdrm functions drm_intel_*_exec() are not
upstream.
---
src/mesa/drivers/dri/i965/intel_batchbuffer.c | 30 +++-
The function is tiny and called exactly once. There's no need for it to
exist.
---
src/mesa/drivers/dri/i965/intel_syncobj.c | 12
1 file changed, 4 insertions(+), 8 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/intel_syncobj.c
b/src/mesa/drivers/dri/i965/intel_syncobj.c
index
drm wip/intel-fence-fds
http://cgit.kiwitree.net/~chadv/libdrm/log/?h=wip/intel-fence-fds
Nothing is tested (but at least it builds). Before testing anything,
I plan to wait until I have a working kernel branch for the i915
interface.
Chad Versace (10):
egl: Use atomic ops on _EGLResour
TODO: The i915 kernel interface nor the libdrm interface is upstream
yet. So small details may change between now and the final patch.
TODO: Agree on fd ownership rules between EGL and driver with Rob Clark.
TODO: Handle errors from ppoll().
TODO: Test it!
---
src/mesa/drivers/dri/i965/intel_syn
From: Rob Clark
Required to implement EGL_ANDROID_native_fence_sync.
Signed-off-by: Rob Clark
---
include/GL/internal/dri_interface.h | 44 -
1 file changed, 43 insertions(+), 1 deletion(-)
diff --git a/include/GL/internal/dri_interface.h
b/include/GL/inte
Patches 1 and 2 are
Reviewed-by: Chad Versace
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On Sat 09 Jul 2016, Jason Ekstrand wrote:
> This series can be found on my freedesktop.org cgit here:
>
>https://cgit.freedesktop.org/~jekstrand/mesa/?h=wip/hiz-v1
For anyone else who is reviewing, the correct branch name is
'review/isl-aux'.
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On Sat 09 Jul 2016, Jason Ekstrand wrote:
> ---
> src/intel/isl/isl.c | 52 +---
> 1 file changed, 25 insertions(+), 27 deletions(-)
>
> diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
> index decba3d..6f57ac2 100644
> --- a/src/intel/isl/isl
On Sat 09 Jul 2016, Jason Ekstrand wrote:
> This is based on a very long set of discussions between Chad and myself
> about how we should properly represent HiZ and CCS buffers. The end result
> of that discussion was that a tiling actually has two different sizes, a
> logical size in elements, an
On Tue 12 Jul 2016, Jason Ekstrand wrote:
> On Tue, Jul 12, 2016 at 11:50 AM, Chad Versace
> wrote:
> > Here...
> >
> > > + uint32_t pad_bytes;
> > > + isl_apply_surface_padding(dev, info, &tile_info, &total_h_el,
> > &pad_bytes);
>
insertions(+), 19 deletions(-)
Reviewed-by: Chad Versace
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uint8_t bh; /**< Block height, in pixels */
Small nit: There's no need for the newline there. They're all "block"
fields, after all.
Either way,
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On Sat 09 Jul 2016, Jason Ekstrand wrote:
> ---
> src/intel/isl/isl.c | 2 +-
> src/intel/isl/isl_gen6.c | 2 +-
> src/intel/isl/isl_gen7.c | 2 +-
> src/intel/isl/isl_storage_image.c| 4 ++
format_bpb,
> struct isl_tile_info *tile_info)
Almost. You need to also update the prototype in isl.h. Do that, and
this patch is
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d to be defined.
> */
> assert(phys_slice0_sa->w % fmtl->bw == 0);
> - row_pitch = MAX(row_pitch, fmtl->bs * (phys_slice0_sa->w / fmtl->bw));
> + uint32_t bs = fmtl->bpb / 8;
> + row_pitch = MAX(row_pitch, bs * (phys_slice0_sa->w / fmtl->bw));
Like
On Sat 09 Jul 2016, Jason Ekstrand wrote:
> ---
> src/intel/isl/isl.c | 11 +++
> src/intel/isl/isl.h | 17 +
> src/intel/isl/isl_format_layout.csv | 1 +
> src/intel/isl/isl_gen6.c| 8
> src/intel/isl/isl_gen7.c
s the format to the csv.
And, in that capacity, this patch is ok.
Reviewed-by: Chad Versace
A warning, though. Before this code is actually used, you will need to
update many of the places where isl_format_is_compressed() is called.
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On Tue 12 Jul 2016, Jason Ekstrand wrote:
> On Tue, Jul 12, 2016 at 2:36 PM, Chad Versace
> wrote:
>
> > TODO: hiz in script
> >
>
> Thanks to the script being rewritten in a *sane* programming language,
> there's nothing to change.
Oops. That TODO was a co
On Tue 12 Jul 2016, Jason Ekstrand wrote:
> On Tue, Jul 12, 2016 at 2:36 PM, Chad Versace
> wrote:
>
> > Also, isl.c needs an update in this hunk:
> >
> ># isl.c
> >if (isl_surf_usage_is_depth_or_stencil(info->usage)) {
> > /* From the
On Tue 12 Jul 2016, Jason Ekstrand wrote:
> On Tue, Jul 12, 2016 at 2:36 PM, Chad Versace
> wrote:
>
> > I believe isl_gen7.c needs more updates:
> >
> > static uint32_t
> > gen7_choose_halign_el(const struct isl_device *dev,
> >
On Sat 09 Jul 2016, Jason Ekstrand wrote:
> ---
> src/intel/isl/isl.h | 26 ++
> 1 file changed, 26 insertions(+)
Patch 13 is
Reviewed-by: Chad Versace
I skipped patch 12. I'll return to it soon.
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On Tue 12 Jul 2016, Jason Ekstrand wrote:
> On Jul 12, 2016 4:14 PM, "Chad Versace" wrote:
> >
> > On Tue 12 Jul 2016, Jason Ekstrand wrote:
> > > On Tue, Jul 12, 2016 at 2:36 PM, Chad Versace
> > > wrote:
> > >
> > > > Also
On Sat 09 Jul 2016, Jason Ekstrand wrote:
> ---
> src/intel/isl/isl.c | 32
> src/intel/isl/isl.h | 14 ++
> src/intel/isl/isl_format_layout.csv | 9 +
> src/intel/isl/isl_gen7.c| 7 +++
> src/in
age == ISL_AUX_USAGE_MCS ||
> + info->aux_usage == ISL_AUX_USAGE_CCS_D);
> + s.MCSBaseAddress = info->aux_address,
> + s.MCSSurfacePitch = pitch_in_tiles - 1;
> + s.MCSEnable = true;
> +#endif
> + }
> #endif
I really like how this patch turned out. ISL&
On Wed 13 Jul 2016, Jason Ekstrand wrote:
> On Wed, Jul 13, 2016 at 10:16 AM, Chad Versace
> wrote:
>
> > On Sat 09 Jul 2016, Jason Ekstrand wrote:
> > > ---
> > > src/intel/isl/isl.c | 32
> >
> >
On Thu 14 Jul 2016, Pohjolainen, Topi wrote:
>
> Subject says: "isl/state: Divide the aux qpitch by 2". Should be
> divide by 4 or shift by 2.
>
> Otherwise:
>
> Reviewed-by: Topi Pohjolainen
Ditto. Fix that and
Reviewed-by: Chad Versace
_
On Wed 13 Jul 2016, Jason Ekstrand wrote:
> ---
> src/intel/isl/isl.c | 7 +--
> 1 file changed, 5 insertions(+), 2 deletions(-)
Reviewed-by: Chad Versace
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On Wed 13 Jul 2016, Jason Ekstrand wrote:
> ---
> src/intel/isl/isl.c | 7 +--
> 1 file changed, 5 insertions(+), 2 deletions(-)
Reviewed-by: Chad Versace
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On Wed 13 Jul 2016, Jason Ekstrand wrote:
> ---
> src/mesa/drivers/dri/i965/brw_context.c | 2 ++
> src/mesa/drivers/dri/i965/brw_context.h | 4
> 2 files changed, 6 insertions(+)
Reviewed-by: Chad Versace
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ipmap_tree.h
> @@ -802,6 +802,10 @@ intel_miptree_get_isl_surf(struct brw_context *brw,
> const struct intel_mipmap_tree *mt,
> struct isl_surf *surf);
>
> +union isl_color_value
> +intel_miptree_get_isl_clear_color(struct
On Wed 13 Jul 2016, Jason Ekstrand wrote:
> Reviewed-by: Topi Pohjolainen
> ---
> src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 175
> +-
> src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 6 +
> 2 files changed, 179 insertions(+), 2 deletions(-)
>
> diff --git a/src/
On Thu 14 Jul 2016, Jason Ekstrand wrote:
> On Thu, Jul 14, 2016 at 11:42 AM, Chad Versace
> wrote:
>
> > On Wed 13 Jul 2016, Jason Ekstrand wrote:
> > > Reviewed-by: Topi Pohjolainen
> > > ---
> > > src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 175
On Thu 14 Jul 2016, Jason Ekstrand wrote:
> On Thu, Jul 14, 2016 at 11:56 AM, Jason Ekstrand
> wrote:
>
> >
> >
> > On Thu, Jul 14, 2016 at 11:42 AM, Chad Versace
> > wrote:
> >
> >> On Wed 13 Jul 2016, Jason Ekstrand wrote:
> >> >
On Wed 13 Jul 2016, Jason Ekstrand wrote:
> Reviewed-by: Topi Pohjolainen
> ---
> src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 120
> ++
> src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 5 ++
> 2 files changed, 125 insertions(+)
>
> diff --git a/src/mesa/drivers/dr
On Wed 13 Jul 2016, Jason Ekstrand wrote:
> Reviewed-by: Topi Pohjolainen
> ---
> src/mesa/drivers/dri/i965/brw_blorp.c | 157
> ++
> src/mesa/drivers/dri/i965/brw_blorp.h | 6 ++
> 2 files changed, 163 insertions(+)
>
> diff --git a/src/mesa/drivers/dri/i965/b
On Thu 14 Jul 2016, Jason Ekstrand wrote:
> On Thu, Jul 14, 2016 at 1:54 PM, Chad Versace
> wrote:
>
> > On Wed 13 Jul 2016, Jason Ekstrand wrote:
> > > Reviewed-by: Topi Pohjolainen
> > > ---
> > > src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 120
On Wed 13 Jul 2016, Jason Ekstrand wrote:
> Reviewed-by: Topi Pohjolainen
> ---
> src/mesa/drivers/dri/i965/brw_state.h| 8 +++
> src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 79
>
> 2 files changed, 87 insertions(+)
>
> diff --git a/src/mesa/drivers/
On Thu 14 Jul 2016, Chad Versace wrote:
> On Wed 13 Jul 2016, Jason Ekstrand wrote:
> > Reviewed-by: Topi Pohjolainen
> > ---
> > src/mesa/drivers/dri/i965/brw_state.h| 8 +++
> > src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 79
> >
On Wed 13 Jul 2016, Jason Ekstrand wrote:
> ---
> src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 32
>
> 1 file changed, 21 insertions(+), 11 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> b/src/mesa/drivers/dri/i965/brw_wm_surface_
ile changed, 11 insertions(+), 11 deletions(-)
Reviewed-by: Chad Versace
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On Thu 14 Jul 2016, Chad Versace wrote:
> On Thu 14 Jul 2016, Chad Versace wrote:
> > On Wed 13 Jul 2016, Jason Ekstrand wrote:
> > > Reviewed-by: Topi Pohjolainen
> > > ---
> > > src/mesa/drivers/dri/i965/brw_state.h| 8 +++
> > > src
On Thu 14 Jul 2016, Jason Ekstrand wrote:
> On Thu, Jul 14, 2016 at 3:10 PM, Chad Versace
> wrote:
>
> > On Wed 13 Jul 2016, Jason Ekstrand wrote:
> > > ---
> > > src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 32
> >
>
t; + view.usage |= ISL_SURF_USAGE_CUBE_BIT;
> +
> + brw_emit_surface_state(brw, mt, &view,
> + surface_state_infos[brw->gen].tex_mocs,
> for_gather,
> + surf_offset, surf_index,
> + I915_GEM_DOMAIN_SAMPLER, 0);
> + }
Looks good.
Reviewed-by: Chad Versace
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ions(-)
More --'s !
Patches 26 and 27 (the gen7 patches) are
Reviewed-by: Chad Versace
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es changed, 55 insertions(+), 148 deletions(-)
Patch 32 is
Reviewed-by: Chad Versace
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> 3 files changed, 16 insertions(+), 13 deletions(-)
Patches 30 and 31 are
Reviewed-by: Chad Versace
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On Wed 13 Jul 2016, Jason Ekstrand wrote:
> Reviewed-by: Topi Pohjolainen
> ---
> src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 94
> +---
> 1 file changed, 1 insertion(+), 93 deletions(-)
Patches 28 and 29 are
Reviewed-b
)
That diff has a lot of -'s :) Bye bye code!
Looks good to me,
Reviewed-by: Chad Versace
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mesa/drivers/dri/i965/brw_wm_surface_state.c | 7
> src/mesa/drivers/dri/i965/gen6_surface_state.c | 48
>
> 3 files changed, 7 insertions(+), 49 deletions(-)
> delete mode 100644 src/mesa/drivers/dri/i965/gen6_surface_s
src/mesa/drivers/dri/i965/gen8_surface_state.c| 1 -
> 4 files changed, 1 insertion(+), 21 deletions(-)
Reviewed-by: Chad Versace
I'm done with all the non-blorp patches, I believe. Let me know if
I missed anything. I'll resume at the blorp patches now.
_
On Thu 14 Jul 2016, Jason Ekstrand wrote:
> On Thu, Jul 14, 2016 at 2:26 PM, Chad Versace
> wrote:
>
> > On Wed 13 Jul 2016, Jason Ekstrand wrote:
> > > Reviewed-by: Topi Pohjolainen
> > > ---
> > > src/mesa/drivers/dri/i965/brw_blorp.c | 157
> &g
On Wed 13 Jul 2016, Jason Ekstrand wrote:
> Reviewed-by: Topi Pohjolainen
> ---
> src/mesa/drivers/dri/i965/gen6_blorp.c | 76
> +-
> 1 file changed, 2 insertions(+), 74 deletions(-)
Patches 14-18 are
Reviewed-by: Chad Versace
That's the wh
On Thu 14 Jul 2016, Chad Versace wrote:
> On Wed 13 Jul 2016, Jason Ekstrand wrote:
> > Reviewed-by: Topi Pohjolainen
> > ---
> > src/mesa/drivers/dri/i965/brw_state.h| 8 +++
> > src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 79
> >
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