[Mesa-dev] [PATCH 02/19] panfrost/midgard: Pipe through varying arrays

2019-04-21 Thread Alyssa Rosenzweig
Varying arrays sometimes are lowered to a series of directly accessed varyings (which we handled okay), but when indirectly accessed, they appear as a single array; we need to handle this as well. Signed-off-by: Alyssa Rosenzweig --- src/gallium/drivers/panfrost/midgard/midgard_compile.c | 6

[Mesa-dev] [PATCH 08/19] panfrost/midgard: imul can only run on *mul

2019-04-21 Thread Alyssa Rosenzweig
This restriction makes sense logically. Not sure why it wasn't obeyed before. In conjunction with previous commit's disclaimer, fixes dEQP-GLES2.functional.shaders.loop.for_dynamic_iterations.* Signed-off-by: Alyssa Rosenzweig --- src/gallium/drivers/panfrost/midgard/helpers.h | 2

[Mesa-dev] [PATCH 00/19] Substantially improve Midgard compiler

2019-04-21 Thread Alyssa Rosenzweig
-GLES2.functional.shaders.loops.* We're also passing a fair amount of shaders.indexing.*, but there are some more RA issues to sort out (some of the more complex shaders there are failing due to running out of registers; spilling isn't implemented yet). Alyssa Rosenzweig (19): panfrost/

[Mesa-dev] [PATCH 17/19] panfrost/midgard: Set integer mods

2019-04-21 Thread Alyssa Rosenzweig
Signed-off-by: Alyssa Rosenzweig --- .../panfrost/midgard/midgard_compile.c| 38 ++- 1 file changed, 28 insertions(+), 10 deletions(-) diff --git a/src/gallium/drivers/panfrost/midgard/midgard_compile.c b/src/gallium/drivers/panfrost/midgard/midgard_compile.c index

[Mesa-dev] [PATCH 04/19] panfrost/midgard: Respect component of bcsel condition

2019-04-21 Thread Alyssa Rosenzweig
Fixes a bunch of non-vec4 indexing.varying_array tests. Signed-off-by: Alyssa Rosenzweig --- .../panfrost/midgard/midgard_compile.c| 29 ++- 1 file changed, 22 insertions(+), 7 deletions(-) diff --git a/src/gallium/drivers/panfrost/midgard/midgard_compile.c b/src

[Mesa-dev] [PATCH 09/19] panfrost: Disable indirect outputs for now

2019-04-21 Thread Alyssa Rosenzweig
The hardware needs this lowered anyway; for now, might as well use mesa's default lowering for pure conformance reasons. Signed-off-by: Alyssa Rosenzweig --- src/gallium/drivers/panfrost/midgard/midgard_compile.c | 8 ++-- src/gallium/drivers/panfrost/pan_screen.c | 3 +

[Mesa-dev] [PATCH 14/19] panfrost/midgard: Remove unused mir_next_block

2019-04-21 Thread Alyssa Rosenzweig
Signed-off-by: Alyssa Rosenzweig --- src/gallium/drivers/panfrost/midgard/midgard_compile.c | 7 --- 1 file changed, 7 deletions(-) diff --git a/src/gallium/drivers/panfrost/midgard/midgard_compile.c b/src/gallium/drivers/panfrost/midgard/midgard_compile.c index fcc17a5a092..539f8ca12bb

[Mesa-dev] [PATCH 0/2] Add inverted bitwise forms to NIR

2019-04-25 Thread Alyssa Rosenzweig
grapple with these directly, let's add some new opcodes to NIR to support them so we can use a proper algebraic pass. Alyssa Rosenzweig (2): nir: Add inverted bitwise ops panfrost/midgard: Use inverted forms src/compiler/nir/nir.h | 4 src/compile

[Mesa-dev] [PATCH 2/2] panfrost/midgard: Use inverted forms

2019-04-25 Thread Alyssa Rosenzweig
Signed-off-by: Alyssa Rosenzweig --- src/gallium/drivers/panfrost/midgard/midgard_compile.c | 5 + src/gallium/drivers/panfrost/midgard/midgard_compile.h | 5 - 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/panfrost/midgard/midgard_compile.c b/src

[Mesa-dev] [PATCH 1/2] nir: Add inverted bitwise ops

2019-04-25 Thread Alyssa Rosenzweig
-not of operands on Gen8+"). Signed-off-by: Alyssa Rosenzweig Cc: Ian Romanick Cc: Kenneth Graunke --- src/compiler/nir/nir.h| 4 src/compiler/nir/nir_opcodes.py | 18 ++ src/compiler/nir/nir_opt_algebraic.py | 12 3 files changed, 34 in

Re: [Mesa-dev] [PATCH 0/2] Add inverted bitwise forms to NIR

2019-04-25 Thread Alyssa Rosenzweig
Alright, good to know, thank you! :) ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 1/2] nir: Add inverted bitwise ops

2019-04-25 Thread Alyssa Rosenzweig
> We can support all of these with source modifiers because the above three > aren't really "dest invertable"... For us, they'd be > > ~src0 | ~src1 > ~src0 & ~src1 > ~src0 ^ ~src1 > > Is it really dest_invertable or both_srcs_invertable? :-) Sure, I wasn't sure how other drivers would want to

Re: [Mesa-dev] [PATCH 1/2] nir: Add inverted bitwise ops

2019-04-25 Thread Alyssa Rosenzweig
> iand and ior are commutative, so you don't need both. --Wait, woaaah, the algebraic generator respects that? Super neat, thank you! > Especially without instruction count data (I'm assuming I won't be able to do shader-db on my hw at this point..) > For example, if the only use of inot(...som

Re: [Mesa-dev] [PATCH] panfrosti/ci: Initial commit

2019-04-26 Thread Alyssa Rosenzweig
> We start by building a container in Docker that contains a suitable > rootfs and kernel for the DUT, deqp and all dependencies for building > Mesa itself. Out of curiosity, what's the performance impact of this? If there are no changes to the kernel or to deqp (but mesa had a commit somewhere in

Re: [Mesa-dev] [PATCH] panfrosti/ci: Initial commit

2019-04-26 Thread Alyssa Rosenzweig
> Hopefully just current expected fails get stored in git. ATM it looks like both passes and fails are there. Also, we're failing thousands of tests in GLES2 alone... > VK-GL-CTS is the official conformance suite, and it includes dEQP. You > need to use a release tag, or you'll have extra garbag

Re: [Mesa-dev] [PATCH] panfrosti/ci: Initial commit

2019-04-29 Thread Alyssa Rosenzweig
+1 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] panfrosti/ci: Initial commit

2019-04-29 Thread Alyssa Rosenzweig
> A typical run takes around 20 mins and the time spent besides running the > tests themselves is a small part. Oh, nice! That's a lot quicker than I expected :) > Well, this is information about the code, so I think it makes sense to store > it alongside it. It really needs to be kept in sync so

[Mesa-dev] [PATCH 07/10] panfrost/midgard/disasm: Support 8-bit destination

2019-04-30 Thread Alyssa Rosenzweig
Meanwhile, we're forced to disable dest_override, since it's not yet clear how this interacts with other bitnesses (it'll likely need to be overhauled in any case). Signed-off-by: Alyssa Rosenzweig --- .../drivers/panfrost/midgard/disassemble.c| 39 ++- 1 f

[Mesa-dev] [PATCH 10/10] panfrost/midgard/disasm: Handle dest_override generalized

2019-04-30 Thread Alyssa Rosenzweig
Signed-off-by: Alyssa Rosenzweig --- .../drivers/panfrost/midgard/disassemble.c| 90 ++- 1 file changed, 68 insertions(+), 22 deletions(-) diff --git a/src/gallium/drivers/panfrost/midgard/disassemble.c b/src/gallium/drivers/panfrost/midgard/disassemble.c index 8466a90b8d6

[Mesa-dev] [PATCH 09/10] panfrost/midgard/disasm: Stub out 64-bit

2019-04-30 Thread Alyssa Rosenzweig
Signed-off-by: Alyssa Rosenzweig --- .../drivers/panfrost/midgard/disassemble.c| 20 ++- 1 file changed, 15 insertions(+), 5 deletions(-) diff --git a/src/gallium/drivers/panfrost/midgard/disassemble.c b/src/gallium/drivers/panfrost/midgard/disassemble.c index 9469cac6e75

[Mesa-dev] [PATCH 03/10] panfrost/midgard/disasm: Extend print_reg to 8-bit

2019-04-30 Thread Alyssa Rosenzweig
Signed-off-by: Alyssa Rosenzweig --- .../drivers/panfrost/midgard/disassemble.c| 49 +-- 1 file changed, 34 insertions(+), 15 deletions(-) diff --git a/src/gallium/drivers/panfrost/midgard/disassemble.c b/src/gallium/drivers/panfrost/midgard/disassemble.c index 7b71a9937ff

[Mesa-dev] [PATCH 00/10] 8-bit arithemtic

2019-04-30 Thread Alyssa Rosenzweig
the blend pipeline is required to pack the pixel format itself. For RGBA8, this means some 8-bit arithmetic in the blend shader. Alyssa Rosenzweig (10): panfrost/midgard: reg_mode_full -> reg_mode_32, etc panfrost/midgard/disasm: Catch mask errors panfrost/midgard/disasm: Extend print_reg t

[Mesa-dev] [PATCH 0/3] Blend shader preparation

2019-04-30 Thread Alyssa Rosenzweig
s enabling blend shaders on Panfrost (again). Alyssa Rosenzweig (3): panfrost: Remove shader dump panfrost/decode: Hit MRT blend shader enable bits panfrost: Fix blend shader upload .../drivers/panfrost/include/panfrost-job.h| 6 -- .../drivers/panfrost/pan_blend_shaders.c

[Mesa-dev] [PATCH 06/10] panfrost/midgard: Rename ilzcnt8 -> iclz

2019-04-30 Thread Alyssa Rosenzweig
Per OpenCL. Signed-off-by: Alyssa Rosenzweig --- src/gallium/drivers/panfrost/midgard/helpers.h | 2 +- src/gallium/drivers/panfrost/midgard/midgard.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/panfrost/midgard/helpers.h b/src/gallium/drivers

[Mesa-dev] [PATCH 08/10] panfrost/midgard/disasm: Print 8-bit sources

2019-04-30 Thread Alyssa Rosenzweig
r0.x. Signed-off-by: Alyssa Rosenzweig --- .../drivers/panfrost/midgard/disassemble.c| 66 --- 1 file changed, 43 insertions(+), 23 deletions(-) diff --git a/src/gallium/drivers/panfrost/midgard/disassemble.c b/src/gallium/drivers/panfrost/midgard/disassemble.c index 71f5c4

[Mesa-dev] [PATCH 02/10] panfrost/midgard/disasm: Catch mask errors

2019-04-30 Thread Alyssa Rosenzweig
We silently ignored certain bits of the mask, which causes issues when disassembly 8/64-bit ops. Signed-off-by: Alyssa Rosenzweig --- src/gallium/drivers/panfrost/midgard/disassemble.c | 11 +++ 1 file changed, 11 insertions(+) diff --git a/src/gallium/drivers/panfrost/midgard

[Mesa-dev] [PATCH 05/10] panfrost/midgard: Fix crash on unknown op

2019-04-30 Thread Alyssa Rosenzweig
Signed-off-by: Alyssa Rosenzweig --- src/gallium/drivers/panfrost/midgard/helpers.h | 8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/panfrost/midgard/helpers.h b/src/gallium/drivers/panfrost/midgard/helpers.h index 6d35f4de025..d2855cd89cd 100644

[Mesa-dev] [PATCH 04/10] panfrost/midgard/disasm: Fill in .int mod

2019-04-30 Thread Alyssa Rosenzweig
Signed-off-by: Alyssa Rosenzweig --- src/gallium/drivers/panfrost/midgard/disassemble.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/drivers/panfrost/midgard/disassemble.c b/src/gallium/drivers/panfrost/midgard/disassemble.c index 0938486c883..4583e9e1584

[Mesa-dev] [PATCH 3/3] panfrost: Fix blend shader upload

2019-04-30 Thread Alyssa Rosenzweig
Signed-off-by: Alyssa Rosenzweig --- .../drivers/panfrost/pan_blend_shaders.c | 3 +-- src/gallium/drivers/panfrost/pan_context.c | 18 +- 2 files changed, 14 insertions(+), 7 deletions(-) diff --git a/src/gallium/drivers/panfrost/pan_blend_shaders.c b/src/gallium

[Mesa-dev] [PATCH 2/3] panfrost/decode: Hit MRT blend shader enable bits

2019-04-30 Thread Alyssa Rosenzweig
Signed-off-by: Alyssa Rosenzweig --- .../drivers/panfrost/include/panfrost-job.h | 6 -- src/gallium/drivers/panfrost/pandecode/decode.c | 15 ++- 2 files changed, 18 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/panfrost/include/panfrost-job.h b/src

[Mesa-dev] [PATCH 1/3] panfrost: Remove shader dump

2019-04-30 Thread Alyssa Rosenzweig
Redundant via the midgard shader dump. Signed-off-by: Alyssa Rosenzweig --- src/gallium/drivers/panfrost/pan_blend_shaders.c | 4 src/gallium/drivers/panfrost/pan_screen.c| 1 - src/gallium/drivers/panfrost/pan_util.h | 1 - src/gallium/drivers/panfrost/pan_wallpaper.c

[Mesa-dev] [PATCH 01/10] panfrost/midgard: reg_mode_full -> reg_mode_32, etc

2019-04-30 Thread Alyssa Rosenzweig
In preparation for 8-bit and 64-bit operands, let's not reinforce the 32-bit-centric biases in the ISA. Signed-off-by: Alyssa Rosenzweig --- .../drivers/panfrost/midgard/disassemble.c | 6 +++--- src/gallium/drivers/panfrost/midgard/midgard.h | 8 .../drivers/panfrost/mi

[Mesa-dev] [PATCH] panfrost: Support RGB565 FBOs

2019-05-01 Thread Alyssa Rosenzweig
Signed-off-by: Alyssa Rosenzweig --- src/gallium/drivers/panfrost/pan_context.c | 67 +++-- src/gallium/drivers/panfrost/pan_mfbd.c | 11 +++- src/gallium/drivers/panfrost/pan_resource.c | 21 +-- src/gallium/drivers/panfrost/pan_screen.c | 8 +-- 4 files changed, 78

Re: [Mesa-dev] [PATCH v1] panfrost/midgard: Skip liveness analysis for instructions without dest

2019-05-02 Thread Alyssa Rosenzweig
Just for future reader's reference, could you add a comment above this line: /* This skips store_vary instructions, which are not yet SSA */ > +if (ins->ssa_args.dest < 0) continue; With that small change, Reviewed-by AR :)

Re: [Mesa-dev] [PATCH v1] panfrost/midgard: Skip register allocation if there's no work to do

2019-05-02 Thread Alyssa Rosenzweig
As I mentioned over IRC, I'm not sure how this case would be possible to hit under normal circumstances. Do you have a sample affected shader? ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] panfrost: Questions regarding pan_wallpaper.c (and the 'reload FB content' logic in general)

2019-05-03 Thread Alyssa Rosenzweig
> +else if (!(job->clear & PIPE_CLEAR_COLOR)) Make sure this is actually being called when you expect. I don't remember if job->clear is being zeroed when we expect (hint: it might not be due to a missing job_free routine somewhere, *blush*). > + .rt[0].rgb_func = PI

Re: [Mesa-dev] panfrost: Questions regarding pan_wallpaper.c (and the 'reload FB content' logic in general)

2019-05-03 Thread Alyssa Rosenzweig
> Actually, I tried several things, so I might have left it flipped at > some point, but it doesn't work with with src_factor=one and > dts_factor=zero. Hum. > Good question. I haven't dumped the buffers yet. Another thing to note: > the texture I'm reloading from is using PIPE_FORMAT_B8G8R8X8_UN

[Mesa-dev] [PATCH] panfrost: Refactor blend descriptors

2019-05-04 Thread Alyssa Rosenzweig
de to peacefully coexist, with runtime selection rather than a #ifdef. So, as a bonus, this will help the future Bifrost effort, eliminating one major source of compile-time architectural divergence. Signed-off-by: Alyssa Rosenzweig --- .../drivers/panfrost/include/panfrost-job.h | 56 --- src/ga

Re: [Mesa-dev] [PATCH] panfrost: Refactor blend descriptors

2019-05-04 Thread Alyssa Rosenzweig
> The blend shader enable bit is already described in the comments in > the header; the blend shader is enabled when unk2 == 0. I'm pretty sure that comment was from you, but thank you ;) > (the blend shader has > to be allocated within the same 2^24 byte range as the main shader for > it to work

[Mesa-dev] [PATCH 6/7] panfrost: Wire up nir_lower_blend

2019-05-05 Thread Alyssa Rosenzweig
This implements blend shaders via nir_lower_blend, by creating dummy fragment shaders simply passing through the source color and using the new lowering pass to inject blendability. Signed-off-by: Alyssa Rosenzweig --- .../drivers/panfrost/pan_blend_shaders.c | 46 +-- 1

[Mesa-dev] [PATCH 0/7] Blend shaders! (NIR lowering pass)

2019-05-05 Thread Alyssa Rosenzweig
ly be useful to vc4 with a little work. Disclaimer: Vulkan driver not actually tested :) ) (Ken: I copied you on the first 4 since IIRC you worked on advanced blending lowering.) Alyssa Rosenzweig (7): compiler: Add enums for blend state gallium: Add helper to convert PIPE blending to shader_e

[Mesa-dev] [PATCH 1/7] compiler: Add enums for blend state

2019-05-05 Thread Alyssa Rosenzweig
We add enums corresponding to (GLES) blend state to shader_enums.h, complementing the existing advanced blending enums in the file. This allows us to represent blending state in a driver-agnostic, API-agnostic way to permit lowering. Signed-off-by: Alyssa Rosenzweig Cc: Eric Anholt Cc: Kenneth

[Mesa-dev] [PATCH 4/7] nir: Add nir_lower_blend pass

2019-05-05 Thread Alyssa Rosenzweig
GLSL IR based advanced blend lowering should be NIRified and merged into this pass. ...Dual-source blending is not supported, Ryan. Signed-off-by: Alyssa Rosenzweig Cc: Eric Anholt Cc: Kenneth Graunke --- src/compiler/Makefile.sources | 1 + src/compiler/nir/meson.build | 1 +

[Mesa-dev] [PATCH 3/7] nir: Add blend_const_color_rgba sysval

2019-05-05 Thread Alyssa Rosenzweig
is scalar but load/store is vector; it largely depends on how blending is implemented per-driver.) Signed-off-by: Alyssa Rosenzweig Cc: Eric Anholt Cc: Kenneth Graunke --- src/compiler/nir/nir_intrinsics.py | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/src/compiler/nir

[Mesa-dev] [PATCH 5/7] panfrost/midgard: Route new blending intrinsics

2019-05-05 Thread Alyssa Rosenzweig
To prepare for the new nir_lower_blend pass, we wire up the intrinsics for tilebuffer reads and constant colour loading. Signed-off-by: Alyssa Rosenzweig --- .../panfrost/midgard/midgard_compile.c| 207 +- 1 file changed, 109 insertions(+), 98 deletions(-) diff --git a

[Mesa-dev] [PATCH 7/7] panfrost: Improve fixed-function blending

2019-05-05 Thread Alyssa Rosenzweig
This fixes a few miscellaneous issues with the fixed-function blending programming, though it is far from complete. For cases known to be buggy, we force a fallback to blend shaders. Signed-off-by: Alyssa Rosenzweig --- src/gallium/drivers/panfrost/pan_blending.c | 70 ++--- 1

[Mesa-dev] [PATCH 2/7] gallium: Add helper to convert PIPE blending to shader_enum style

2019-05-05 Thread Alyssa Rosenzweig
Complementing the new API-agnostic shader_enum blending style, we add helpers to translate between the two forms. Ideally, we could just use PIPE blending directly, but that makes Vulkan support challenging. Signed-off-by: Alyssa Rosenzweig Cc: Eric Anholt Cc: Kenneth Graunke --- src/gallium

Re: [Mesa-dev] [PATCH] [Panfrost] [Bifrost] Add a few missing ops to disassembler

2019-05-05 Thread Alyssa Rosenzweig
R-b, will push in a bit, thank you! ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] panfrost: Refactor blend descriptors

2019-05-05 Thread Alyssa Rosenzweig
> No, it doesn't. The high (64 - 24) bits have to be exactly the same. > So if your 16 MB allocation is not aligned, you could wind up with two > shaders crossing that boundary by sheer bad luck and then things go > boom. ARM's kernel driver dealt with it by aligning all executable > memory allocat

Re: [Mesa-dev] [PATCH] configure.ac: check for libdrm when using VL with X11

2019-05-06 Thread Alyssa Rosenzweig
e library. > > Note: this is applicable only for the stable branches. > > Cc: Alyssa Rosenzweig > Cc: > Signed-off-by: Emil Velikov > --- > Alyssa this should resolve the failure with minimal churn. Please let > me know if it works on your end or not. > --- > con

[Mesa-dev] [PATCH 2/2] panfrost/midgard: Cleanup csel lowering

2019-05-06 Thread Alyssa Rosenzweig
Signed-off-by: Alyssa Rosenzweig --- .../panfrost/midgard/midgard_compile.c| 151 +++--- .../panfrost/midgard/midgard_nir_algebraic.py | 12 +- 2 files changed, 37 insertions(+), 126 deletions(-) diff --git a/src/gallium/drivers/panfrost/midgard/midgard_compile.c b/src

[Mesa-dev] [PATCH 1/2] nir: Add is_divergent_vector search helper

2019-05-06 Thread Alyssa Rosenzweig
swizzle can be done in one clock (replicating as if a scalar) but a divergent one must be scalarized. In these cases, it is useful to optimize differently based on whether the swizzle diverges. (Use case is the "csel" condition on Midgard). Signed-off-by: Alyssa Rosenzweig Cc: Jason E

Re: [Mesa-dev] [PATCH 4/7] nir: Add nir_lower_blend pass

2019-05-07 Thread Alyssa Rosenzweig
> Logic ops seem... challenging to emulate in the shader. That shader > would need the destination colors in the framebuffer storage format, and > I'm not sure that's always possible (maybe?). Alright, that's good to know. I will note that in Midgard, the native hardware ops are to load/store t

Re: [Mesa-dev] [PATCH] panfrost: Fix two uninitialized accesses in compiler

2019-05-07 Thread Alyssa Rosenzweig
Tentative R-b, but I'm baffled what the flip-flops would be about. Could you link the list of failures introduced (we're maybe relying on buggy behaviour anyway)? ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailm

Re: [Mesa-dev] [PATCH 1/2] nir: Add is_divergent_vector search helper

2019-05-07 Thread Alyssa Rosenzweig
> IMO better names might be is_scalar_swizzle or something. Ah, yes, that would be a better name! is_not_scalar_swizzle in this case (logic is flipped). > Can num_components be 1? If so, then this will return false, whereas > you probably wanted it to return true. I think that's the correct beha

Re: [Mesa-dev] [PATCH 1/2] nir: Add is_divergent_vector search helper

2019-05-07 Thread Alyssa Rosenzweig
Gotcha. I wasn't sure negations in the NIR search rule were possible...? ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 1/2] nir: Add is_divergent_vector search helper

2019-05-07 Thread Alyssa Rosenzweig
D'oh. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 1/2] nir: Add is_divergent_vector search helper

2019-05-07 Thread Alyssa Rosenzweig
Makes sense, thank you for the clarification. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] panfrost: Fix two uninitialized accesses in compiler

2019-05-08 Thread Alyssa Rosenzweig
Oh, I have a hunch what could be happening. I'll take a look before merging :) ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] panfrost: Add CAPFs for conservative rasterization

2019-05-09 Thread Alyssa Rosenzweig
R-b, nice catch :) ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 00/11] panfrost: ci: RK3288 support and misc robustness

2019-05-09 Thread Alyssa Rosenzweig
Patches 1-9 and 11 are: Reviewed-by: Alyssa Rosenzweig Exciting to see progress on CI on more devices... it's always an option (if an annoying run) to run tests on a single dev device locally, but supporting 2 devices at once!? CI truly is magic ;) Here's to not regress

Re: [Mesa-dev] [PATCH 1/7] compiler: Add enums for blend state

2019-05-09 Thread Alyssa Rosenzweig
> Interesting, I wouldn't have split blend_factor from inverting the > factor. I'm fine with it, though. The rationale was that the code logic needs it split anyway, so the split has to happen in one place or another... at least this way there's less redundant enum'ing. TBH, I'd prefer Gallium ha

[Mesa-dev] [PATCH v2 2/2] panfrost/midgard: Cleanup csel lowering

2019-05-10 Thread Alyssa Rosenzweig
Signed-off-by: Alyssa Rosenzweig --- .../panfrost/midgard/midgard_compile.c| 151 +++--- .../panfrost/midgard/midgard_nir_algebraic.py | 12 +- 2 files changed, 37 insertions(+), 126 deletions(-) diff --git a/src/gallium/drivers/panfrost/midgard/midgard_compile.c b/src

[Mesa-dev] [PATCH v2 1/2] nir: Add is_divergent_vector search helper

2019-05-10 Thread Alyssa Rosenzweig
swizzle can be done in one clock (replicating as if a scalar) but a divergent one must be scalarized. In these cases, it is useful to optimize differently based on whether the swizzle diverges. (Use case is the "csel" condition on Midgard). Signed-off-by: Alyssa Rosenzweig Cc: J

[Mesa-dev] [PATCH] swrast: Rename blend_func->swrast_blend_func

2019-05-10 Thread Alyssa Rosenzweig
This avoids a conflict with the new (driver-agnostic) blend_func enum in shader_enum.h, which broke the build of swrast (and i965 by extension). My apologies :( Signed-off-by: Alyssa Rosenzweig Fixes: f41be53a ("compiler: Add enums for blend state") Cc: Caio Marcelo de Oliveira Filho

Re: [Mesa-dev] [PATCH] swrast: Rename blend_func->swrast_blend_func

2019-05-10 Thread Alyssa Rosenzweig
Thank you. I'm so sorry for the inconvenience... I've learned my CI lesson ;) ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH v2 1/2] nir: Add is_divergent_vector search helper

2019-05-10 Thread Alyssa Rosenzweig
Oh, forgot to amend the message itself, thank you :) ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH v3 1/2] nir: Add is_non_scalar_swizzle search helper

2019-05-10 Thread Alyssa Rosenzweig
is allows csel to be lowered only with a vector condition. Signed-off-by: Alyssa Rosenzweig Cc: Jason Ekstrand Cc: Ilia Mirkin --- src/compiler/nir/nir_search_helpers.h | 17 + 1 file changed, 17 insertions(+) diff --git a/src/compiler/nir/nir_search_helpers.h b/src/compiler/nir/

[Mesa-dev] [PATCH v3 2/2] panfrost/midgard: Cleanup csel lowering

2019-05-10 Thread Alyssa Rosenzweig
Signed-off-by: Alyssa Rosenzweig --- .../panfrost/midgard/midgard_compile.c| 151 +++--- .../panfrost/midgard/midgard_nir_algebraic.py | 12 +- 2 files changed, 37 insertions(+), 126 deletions(-) diff --git a/src/gallium/drivers/panfrost/midgard/midgard_compile.c b/src

[Mesa-dev] [PATCH v2 4/6] panfrost/midgard: Enable NIR vectorization pass

2019-05-12 Thread Alyssa Rosenzweig
This cleans up the blend shader code considerably, owing to a substantial improvement in these shaders. It's not clear how this affects overall driver performance; i965 had mixed results with this. Time will tell. Signed-off-by: Alyssa Rosenzweig --- src/gallium/drivers/panfrost/mi

[Mesa-dev] [PATCH v2 1/6] nir: Add nir_lower_blend pass

2019-05-12 Thread Alyssa Rosenzweig
ssing (ES3). - Extended blending is not yet ported from GLSL IR lowering (ES3.2) - Dual-source blending is not supported. (N/A) - Logic ops are not supported. (N/A) v2: Fix code conventions (per Ian Romanick's feedback). Implement color masks. Signed-off-by: Alyssa Rosenzweig Cc: Eric Anhol

[Mesa-dev] [PATCH v2 0/6] Programmatic blending

2019-05-12 Thread Alyssa Rosenzweig
change is the inclusion of the vectorization pass, which is needed for decent compile results with this lowering on vector architectures as noted in review of v1. Alyssa Rosenzweig (5): nir: Add nir_lower_blend pass panfrost/midgard: Route new blending intrinsics panfrost/midgard: Enable NIR

[Mesa-dev] [PATCH v2 2/6] nir: add a vectorization pass

2019-05-12 Thread Alyssa Rosenzweig
From: Connor Abbott This effectively does the opposite of nir_lower_alus_to_scalar, trying to combine per-component ALU operations with the same sources but different swizzles into one larger ALU operation. It uses a similar model as CSE, where we do a depth-first approach and keep around a hash

[Mesa-dev] [PATCH v2 3/6] panfrost/midgard: Route new blending intrinsics

2019-05-12 Thread Alyssa Rosenzweig
To prepare for the new nir_lower_blend pass, we wire up the intrinsics for tilebuffer reads and constant colour loading. Signed-off-by: Alyssa Rosenzweig --- .../panfrost/midgard/midgard_compile.c| 223 +- 1 file changed, 117 insertions(+), 106 deletions(-) diff --git a

[Mesa-dev] [PATCH v2 5/6] panfrost: Wire up nir_lower_blend

2019-05-12 Thread Alyssa Rosenzweig
This implements blend shaders via nir_lower_blend, by creating dummy fragment shaders simply passing through the source color and using the new lowering pass to inject blendability. Signed-off-by: Alyssa Rosenzweig --- .../drivers/panfrost/pan_blend_shaders.c | 48 +-- 1

[Mesa-dev] [PATCH v2 6/6] panfrost: Improve fixed-function blending

2019-05-12 Thread Alyssa Rosenzweig
This fixes a few miscellaneous issues with the fixed-function blending programming, though it is far from complete. For cases known to be buggy, we force a fallback to blend shaders. Signed-off-by: Alyssa Rosenzweig --- .../drivers/panfrost/ci/expected-failures.txt | 942 -- src

[Mesa-dev] [RFC PATCH 2/2] panfrost/midgard: Ignore imov/fmov distinction

2019-05-12 Thread Alyssa Rosenzweig
less buggy behaviour we rely on. A great deal of future work is required for handling registers, which likely accounts for some regressions in dEQP. Signed-off-by: Alyssa Rosenzweig Cc: Jason Ekstrand --- .../panfrost/midgard/midgard_compile.c| 81 --- 1 file change

[Mesa-dev] [RFC PATCH 1/2] nir: Silently bail on regs for gather_ssa_types

2019-05-12 Thread Alyssa Rosenzweig
existing users will not be regressed, and for the limited use in Panfrost following the imov/fmov merge, it'll hold us over until this pass can be extended. Signed-off-by: Alyssa Rosenzweig Cc: Jason Ekstrand --- src/compiler/nir/nir_gather_ssa_types.c | 60 ++---

Re: [Mesa-dev] [PATCH] [Panfrost] [Bifrost] Add a few missing ops to disassembler

2019-05-12 Thread Alyssa Rosenzweig
Did we ever decide what to do with this? ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 1/2] panfrost: ci: Update expectations

2019-05-13 Thread Alyssa Rosenzweig
Both are A-b ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [RFC PATCH 2/2] panfrost/midgard: Ignore imov/fmov distinction

2019-05-13 Thread Alyssa Rosenzweig
> Using nir_gather_ssa_types is wrong. In both Midgard and NIR, SSA > values are just a bunch of bits with no int/float distinction, and > therefore you shouldn't need to know how a register is used to compile > the instruction producing it. The only distinction between imov and > fmov, in both NIR

[Mesa-dev] [PATCH 1/3] panfrost/decode: Futureproof texture dumping

2019-05-14 Thread Alyssa Rosenzweig
One field was not dumped for some reason. It's observed to be 0, but it's still good to have it available. Also, extra fields might be snuck in the bitmaps array (it's variable-lengthed at the end), and we want to guard against that possibility, so we dump a little more. Signed

[Mesa-dev] [PATCH 2/3] panfrost/decode: Stride decoding

2019-05-14 Thread Alyssa Rosenzweig
With a special flag, texture descriptors can include custom stride(s). We haven't seen a case of this used for mipmaps/cubemaps, so it's not clear how that will be encoded, but this dumps correctly for single one-level 2D textures. Signed-off-by: Alyssa Rosenzweig --- .../driver

[Mesa-dev] [PATCH 3/3] panfrost: Set custom stride for textures when necessary

2019-05-14 Thread Alyssa Rosenzweig
7;s actual reported stride, and if they differ, set the latter as a custom stride. Fixes rendering of windows not on tile boundaries (noticeable in Weston with es2gears_wayland, for instance). Also, this should fix stride issues with bufer reloading. Signed-off-by: Alyssa Rosenzweig Cc: Tomeu Vizoso

[Mesa-dev] [PATCH 0/3] panfrost: Custom texture strides

2019-05-14 Thread Alyssa Rosenzweig
this stride field in the driver itself, fixing winsys related bugs. Alyssa Rosenzweig (3): panfrost/decode: Futureproof texture dumping panfrost/decode: Stride decoding panfrost: Set custom stride for textures when necessary .../drivers/panfrost/include/panfrost-job.h | 3 ++ src

[Mesa-dev] [PATCH 3/3] panfrost/midgard: Enable integer constant inlining

2019-05-14 Thread Alyssa Rosenzweig
rable to inline when possible. Now that integer ops are well understood and in use, we enable inlining of integers constants in addition to floats (which have been inlined since forever). Signed-off-by: Alyssa Rosenzweig --- src/gallium/drivers/panfrost/midgard/midgard_compile.c | 4 1 file ch

[Mesa-dev] [PATCH 2/3] panfrost/midgard: Remove imov workaround

2019-05-14 Thread Alyssa Rosenzweig
The previous commit fixes the issue this patched around. Signed-off-by: Alyssa Rosenzweig --- .../panfrost/midgard/midgard_compile.c| 26 --- 1 file changed, 26 deletions(-) diff --git a/src/gallium/drivers/panfrost/midgard/midgard_compile.c b/src/gallium/drivers

[Mesa-dev] [PATCH 0/3] panfrost/midgard: Cleanup integers

2019-05-14 Thread Alyssa Rosenzweig
Removes a bunch of hacks surrounding integers. There should be much less voodoo here now. Alyssa Rosenzweig (3): panfrost/midgard: Set int outmod for ops writing integers panfrost/midgard: Remove imov workaround panfrost/midgard: Enable integer constant inlining .../drivers/panfrost

[Mesa-dev] [PATCH 1/3] panfrost/midgard: Set int outmod for ops writing integers

2019-05-14 Thread Alyssa Rosenzweig
care about the types involved; it's just bits on the wire again. [Jason: Once this is merged, panfrost shouldn't have any blockers to typeless mov] Signed-off-by: Alyssa Rosenzweig Cc: Connor Abbott Cc: Jason Ekstrand --- .../drivers/panfrost/midgard/helpers.h| 27 ++

[Mesa-dev] [RFC PATCH] nir/algebraic: Remove problematic "optimization"

2019-05-14 Thread Alyssa Rosenzweig
This line is no longer relevant now that booleans are 1-bit, and in fact causes issues (infinite progress loop between algebraic optimizations and copy prop) with constant vector masks. Signed-off-by: Alyssa Rosenzweig Cc: Jason Ekstrand --- src/compiler/nir/nir_opt_algebraic.py | 3 --- 1

[Mesa-dev] [PATCH] panfrost/midgard: Add load/store opcodes

2019-05-15 Thread Alyssa Rosenzweig
This commit adds a bunch of new load/store opcodes, largely related to OpenCL, as well as adjusting the name of existing opcodes to be more uniform. The immediate effect is compute shaders are substantially easier to interpret now. Signed-off-by: Alyssa Rosenzweig --- .../drivers/panfrost

[Mesa-dev] [PATCH 5/5] panfrost: Fix Bifrost-specific padding

2019-05-18 Thread Alyssa Rosenzweig
Signed-off-by: Alyssa Rosenzweig --- src/gallium/drivers/panfrost/include/panfrost-job.h | 8 +--- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/src/gallium/drivers/panfrost/include/panfrost-job.h b/src/gallium/drivers/panfrost/include/panfrost-job.h index 046a115a073

[Mesa-dev] [PATCH 2/5] panfrost: Hoist blend constant into Midgard-specific struct

2019-05-18 Thread Alyssa Rosenzweig
This eliminates one major source of #ifdef parity between Midgard and Bifrost, better representing how the struct acts on Midgard and allowing proper decodes on Bifrost. Signed-off-by: Alyssa Rosenzweig --- src/gallium/drivers/panfrost/include/panfrost-job.h | 12 +--- src/gallium

[Mesa-dev] [PATCH 4/5] panfrost: Cleanup panfrost_job comments

2019-05-18 Thread Alyssa Rosenzweig
Signed-off-by: Alyssa Rosenzweig --- src/gallium/drivers/panfrost/include/panfrost-job.h | 9 +++-- 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/src/gallium/drivers/panfrost/include/panfrost-job.h b/src/gallium/drivers/panfrost/include/panfrost-job.h index 48b3a65a0b8

[Mesa-dev] [PATCH 0/5] Bifrost decoding support

2019-05-18 Thread Alyssa Rosenzweig
This patch series updates pandecode to work with Bifrost traces, wiring in disassembly and eliminating #ifdef BIFROST shenanigans. Paired with a current panwrap, this enables tracing Bifrost (Dvalin) and then decoding reliably with upstream pandecode. Alyssa Rosenzweig (5): panfrost/decode

[Mesa-dev] [PATCH 3/5] panfrost/decode: Decode blend constant

2019-05-18 Thread Alyssa Rosenzweig
is a sort of "guesstimate", assuming that the high byte is just int(f / 255.0) and then solving algebraicly for the low byte. This might be slightly off in some cases. Signed-off-by: Alyssa Rosenzweig --- .../drivers/panfrost/include/panfrost-job.h | 16 +++- src/galli

[Mesa-dev] [PATCH 1/5] panfrost/decode: Disassemble Bifrost shaders

2019-05-18 Thread Alyssa Rosenzweig
We already have the Bifrost disassembler in-tree, so now that panwrap is able to dump Bifrost command streams, hook up the disassembler to pandecode. Signed-off-by: Alyssa Rosenzweig Cc: Ryan Houdek --- src/gallium/drivers/panfrost/meson.build| 3 ++- src/gallium/drivers/panfrost

[Mesa-dev] [PATCH] panfrost: Remove the standalone compiler

2019-05-19 Thread Alyssa Rosenzweig
e for disassembler changes). Signed-off-by: Alyssa Rosenzweig --- src/gallium/drivers/panfrost/meson.build | 27 .../drivers/panfrost/midgard/cmdline.c| 138 -- 2 files changed, 165 deletions(-) delete mode 100644 src/gallium/drivers/panfrost/midgard/cmdline.c

Re: [Mesa-dev] [PATCH 1/2] panfrost: ci: Switch to kernel 5.2-rc1

2019-05-20 Thread Alyssa Rosenzweig
Both patches are A-b, thank you! :) ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [RFC PATCH] nir/algebraic: Simplify max(abs(a), 0.0) -> abs(a)

2019-05-23 Thread Alyssa Rosenzweig
I noticed this pattern in glmark's jellyfish scene. Assuming this is correct (it should be...?), could someone do a shader-db run? Thank you! Signed-off-by: Alyssa Rosenzweig Cc: Ian Romanick --- src/compiler/nir/nir_opt_algebraic.py | 1 + 1 file changed, 1 insertion(+) diff --git

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