; + bool for_bo,
> + enum intel_miptree_tiling_mode requested,
> + struct intel_mipmap_tree *mt)
> +{
> + mt->tr_mode = INTEL_MIPTREE_TRMODE_NONE;
>
> + intel_miptree_set
kernel
supports RS (Ken).
- Add brw_device_info::has_resource_streamer and toggle it for
Haswell, Broadwell, Cherryview, Skylake, and Broxton (Ken).
Cc: kenn...@whitecape.org
Signed-off-by: Abdiel Janulgue
---
src/mesa/drivers/dri/i965/brw_context.c | 5 +
src/mesa
-off-by: Abdiel Janulgue
---
src/mesa/drivers/dri/i965/brw_binding_tables.c | 87 ++
src/mesa/drivers/dri/i965/brw_context.c| 4 ++
src/mesa/drivers/dri/i965/brw_context.h| 6 ++
src/mesa/drivers/dri/i965/brw_state.h | 6 ++
src/mesa/drivers/dri
overflow when allocating a chunk out of the
hw-binding table pool (Ken).
Cc: kenn...@whitecape.org
Signed-off-by: Abdiel Janulgue
---
src/mesa/drivers/dri/i965/brw_binding_tables.c | 73 --
1 file changed, 57 insertions(+), 16 deletions(-)
diff --git a/src/mesa
Switch off hardware-generated binding tables and gather push
constants in the blorp. Blorp requires only a minimal set of
simple constants. There is no need for the extra complexity
to program a gather table entry into the pipeline.
Cc: kenn...@whitecape.org
Signed-off-by: Abdiel Janulgue
offset above in disable_stages().
Cc: kenn...@whitecape.org
Signed-off-by: Abdiel Janulgue
---
src/mesa/drivers/dri/i965/brw_binding_tables.c | 87 ++
src/mesa/drivers/dri/i965/brw_context.c| 4 ++
src/mesa/drivers/dri/i965/brw_context.h| 6 ++
src/mesa
kernel
supports RS (Ken).
- Add brw_device_info::has_resource_streamer and toggle it for
Haswell, Broadwell, Cherryview, Skylake, and Broxton (Ken).
v3: - Update I915_PARAM_HAS_RESOURCE_STREAMER to match updated kernel.
Cc: kenn...@whitecape.org
Signed-off-by: Abdiel Janulgue
On 06/16/2015 03:20 PM, Chris Wilson wrote:
> On Tue, Jun 16, 2015 at 03:08:56PM +0300, Abdiel Janulgue wrote:
>> Check first if the hardware and kernel supports resource streamer. If this
>> is allowed, tell the kernel to enable the resource streamer enable bit on
>> MI
Time for another rebase, yet again. My previous patches were getting stale...
Changes since last posting:
- Always inspect the getparam.value in the I915_PARAM_HAS_RESOURCE_STREAMER
ioctl as suggested by Chris Wilson.
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v2: Use macros for HW binding table edits (Topi)
v3: Add Broadwell support.
v4: Make hardware binding table bit definitions even more clearer (Ken)
Cc: kenn...@whitecape.org
Reviewed-by: Topi Pohjolainen
Reviewed-by: Kenneth Graunke
Signed-off-by: Abdiel Janulgue
---
src/mesa/drivers/dri/i965
...@whitecape.org
Cc: ch...@chris-wilson.co.uk
Signed-off-by: Abdiel Janulgue
---
src/mesa/drivers/dri/i965/brw_context.c | 5 +
src/mesa/drivers/dri/i965/brw_context.h | 1 +
src/mesa/drivers/dri/i965/brw_device_info.c | 5 -
src/mesa/drivers/dri/i965/brw_device_info.h
overflow when allocating a chunk out of the
hw-binding table pool (Ken).
Cc: kenn...@whitecape.org
Signed-off-by: Abdiel Janulgue
---
src/mesa/drivers/dri/i965/brw_binding_tables.c | 73 --
1 file changed, 57 insertions(+), 16 deletions(-)
diff --git a/src/mesa
-off-by: Abdiel Janulgue
---
src/mesa/drivers/dri/i965/brw_binding_tables.c | 55 ++
src/mesa/drivers/dri/i965/brw_state.h | 9 +
2 files changed, 64 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_binding_tables.c
b/src/mesa/drivers/dri/i965
Switch off hardware-generated binding tables and gather push
constants in the blorp. Blorp requires only a minimal set of
simple constants. There is no need for the extra complexity
to program a gather table entry into the pipeline.
Cc: kenn...@whitecape.org
Signed-off-by: Abdiel Janulgue
offset above.
Cc: kenn...@whitecape.org
Signed-off-by: Abdiel Janulgue
---
src/mesa/drivers/dri/i965/brw_binding_tables.c | 87 ++
src/mesa/drivers/dri/i965/brw_context.c| 4 ++
src/mesa/drivers/dri/i965/brw_context.h| 6 ++
src/mesa/drivers/dri/i965
On 06/26/2015 10:55 AM, Chris Wilson wrote:
> On Fri, Jun 26, 2015 at 08:52:01AM +0300, Abdiel Janulgue wrote:
>> When hardware-generated binding tables are enabled, use the hw-generated
>> binding table format when uploading binding table state.
>>
>> Normally, the CS
On 06/26/2015 11:19 AM, Ville Syrjälä wrote:
> On Fri, Jun 26, 2015 at 08:51:59AM +0300, Abdiel Janulgue wrote:
>> This patch implements the binding table enable command which is also
>> used to allocate a binding table pool where where hardware-generated
>> binding tabl
On 06/26/2015 10:46 AM, Chris Wilson wrote:
> On Fri, Jun 26, 2015 at 08:51:59AM +0300, Abdiel Janulgue wrote:
>> This patch implements the binding table enable command which is also
>> used to allocate a binding table pool where where hardware-generated
>> binding table ent
On 06/26/2015 02:17 PM, Chris Wilson wrote:
> On Fri, Jun 26, 2015 at 01:59:17PM +0300, Abdiel Janulgue wrote:
>>
>>
>> On 06/26/2015 10:55 AM, Chris Wilson wrote:
>>> On Fri, Jun 26, 2015 at 08:52:01AM +0300, Abdiel Janulgue wrote:
>>>> When hardware
ned-off-by: Abdiel Janulgue
---
src/mesa/drivers/dri/i965/brw_binding_tables.c | 96 ++
src/mesa/drivers/dri/i965/brw_context.c| 4 ++
src/mesa/drivers/dri/i965/brw_context.h| 6 ++
src/mesa/drivers/dri/i965/brw_state.h | 6 ++
src/mesa/driver
overflow when allocating a chunk out of the
hw-binding table pool (Ken).
Cc: kenn...@whitecape.org
Signed-off-by: Abdiel Janulgue
---
src/mesa/drivers/dri/i965/brw_binding_tables.c | 73 --
1 file changed, 57 insertions(+), 16 deletions(-)
diff --git a/src/mesa
redundant devinfo->has_resource_streamer check in context create
into init screen.
Cc: kenn...@whitecape.org
Cc: ch...@chris-wilson.co.uk
Signed-off-by: Abdiel Janulgue
---
src/mesa/drivers/dri/i965/brw_context.c | 4
src/mesa/drivers/dri/i965/brw_context.h | 1 +
ff-by: Abdiel Janulgue
---
src/mesa/drivers/dri/i965/brw_binding_tables.c | 96 ++
src/mesa/drivers/dri/i965/brw_context.c| 4 ++
src/mesa/drivers/dri/i965/brw_context.h| 6 ++
src/mesa/drivers/dri/i965/brw_state.h | 6 ++
src/mesa/drivers/dri
Switch off hardware-generated binding tables and gather push
constants in the blorp. Blorp requires only a minimal set of
simple constants. There is no need for the extra complexity
to program a gather table entry into the pipeline.
Cc: kenn...@whitecape.org
Signed-off-by: Abdiel Janulgue
On 07/03/2015 12:20 PM, Chris Wilson wrote:
> On Fri, Jul 03, 2015 at 10:00:31AM +0300, Abdiel Janulgue wrote:
>> +void
>> +gen7_enable_hw_binding_tables(struct brw_context *brw)
>> +{
>> + if (!brw->use_resource_streamer)
>> + return;
ng hw-generated binding tables and the previous sw-binding
table GPU state (Chris).
Cc: kenn...@whitecape.org
Cc: syrj...@sci.fi
Cc: ch...@chris-wilson.co.uk
Signed-off-by: Abdiel Janulgue
---
src/mesa/drivers/dri/i965/brw_binding_tables.c | 96 ++
src/mesa/drivers/dri
overflow when allocating a chunk out of the
hw-binding table pool (Ken).
v3: Remove extra newline and add missing brace around if-statement (Matt).
Cc: kenn...@whitecape.org
Cc: matts...@gmail.com
Signed-off-by: Abdiel Janulgue
---
src/mesa/drivers/dri/i965/brw_binding_tables.c | 72
On 07/06/2015 01:33 PM, Chris Wilson wrote:
> +/*
> + * Add a relocation entry for the target buffer into the current batch.
> + *
> + * This is the heart of performing fast relocations, both here and in
> + * the corresponding kernel relocation routines.
> + *
> + * - Instead of passing in hand
On 07/07/2015 01:19 PM, Chris Wilson wrote:
> On Tue, Jul 07, 2015 at 01:14:53PM +0300, Abdiel Janulgue wrote:
>> On 07/06/2015 01:33 PM, Chris Wilson wrote:
>>> @@ -600,7 +593,10 @@ brw_emit_null_surface_state(struct brw_context *brw,
>>> 1 <<
On 07/17/2015 01:38 AM, Kenneth Graunke wrote:
> On Friday, July 03, 2015 10:00:30 AM Abdiel Janulgue wrote:
>> Check first if the hardware and kernel supports resource streamer. If this
>> is allowed, tell the kernel to enable the resource streamer enable bit on
>> MI
On 07/17/2015 05:41 AM, Kenneth Graunke wrote:
>>
>> +static uint32_t
>> +reserve_hw_bt_space(struct brw_context *brw, unsigned bytes)
>> +{
>> + if (brw->hw_bt_pool.next_offset + bytes >= brw->hw_bt_pool.bo->size -
>> 128) {
>
> Why -128? I don't see why we should have to subtract anythi
On 07/17/2015 05:26 AM, Kenneth Graunke wrote:
> On Tuesday, July 07, 2015 11:50:21 AM Abdiel Janulgue wrote:
>> +void
>> +gen7_disable_hw_binding_tables(struct brw_context *brw)
>> +{
>> + if (!brw->use_resource_streamer)
>> + return;
>> +
...@whitecape.org
Cc: matts...@gmail.com
Signed-off-by: Abdiel Janulgue
---
src/mesa/drivers/dri/i965/brw_binding_tables.c | 64 ++
1 file changed, 55 insertions(+), 9 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_binding_tables.c
b/src/mesa/drivers/dri/i965
On 10/27/2015 03:18 PM, Francisco Jerez wrote:
> Francisco Jerez writes:
>
>> Abdiel Janulgue writes:
>>
>>> Use the gather table generated from the uniform uploads and
>>> ir_binop_ubo_load to gather and pack the constants to the gather pool.
>>>
need to be careful.
>
> Signed-off-by: Kenneth Graunke
Patches 1-4 are
Reviewed-by: Abdiel Janulgue
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the meta function again, and the meta function
>replaces the data. The application's data is lost, and the app
>fails. Have fun debugging that.
>
> Signed-off-by: Ian Romanick
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92363
Patches 5 - 8 are
Reviewed-
t; && !is_forward_compatible_context));
> }
>
> +extern void
> +_mesa_bind_vertex_buffer(struct gl_context *ctx,
> + struct gl_vertex_array_object *vao,
> + GLuin
shaders from Champions of Regnum that do
min(max(x, 1), 10)
Cc: "10.5"
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89180
Thanks for fixing this!
Reviewed-by: Abdiel Janulgue
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On 08/26/2015 08:19 PM, Ian Romanick wrote:
> From: Ian Romanick
>
> All of the other state upload functions are static because the only use
> is in the brw_tracked_state structure.
>
> Signed-off-by: Ian Romanick
This patch is
Reviewed-by: Abdiel Janulgue
> ---
&g
I re-ran piglit with my resource streamer v2 implementation + this patch and
actually this fixed sporadic lockups that I've been struggling with. As
discussed at F2F with Chad and Paul, we need this for RS. I'll be posting the
RS v2 soon quite soon.
-abdiel
On Friday, September 27, 2013 01:08:
Prerequisites:
- Kernel patches: [1]
(do 'make headers_install' and update libdrm headers after compiling
the kernel)
- Mesa patch: [2]
This is an update from my previous RFC patches [3]. Most notable
change is that the resource streamer is an experimental feature
disabled by defaul
Used to toggle the resource streamer within a batchbuffer
Signed-off-by: Abdiel Janulgue
---
src/mesa/drivers/dri/i965/intel_reg.h |3 +++
1 file changed, 3 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/intel_reg.h
b/src/mesa/drivers/dri/i965/intel_reg.h
index d732038..92075a6
export INTEL_RESOURCE_STREAMER={0,1} To switch on/off resource streamer.
Signed-off-by: Abdiel Janulgue
---
src/mesa/drivers/dri/i965/brw_context.h |1 +
src/mesa/drivers/dri/i965/intel_context.c | 24
2 files changed, 25 insertions(+)
diff --git a/src/mesa
This is passed on the kernel to enable the resource streamer enable bit
on MI_BATCHBUFFER_START
Signed-off-by: Abdiel Janulgue
---
src/mesa/drivers/dri/i965/intel_batchbuffer.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c
Bspec: "Prior to changing the Surface State Base Address, the resouce streamer
must be disabled within a batch buffer where the RS is enabled. RS is
re-enabled again once the SBA is updated."
The resource streamer can be toggled within a batch using MI_RS_CONTROL.
Signed-off-by: Abdie
Signed-off-by: Abdiel Janulgue
---
src/mesa/drivers/dri/i965/brw_draw.c | 14 ++
src/mesa/drivers/dri/i965/gen7_blorp.cpp | 14 ++
2 files changed, 28 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_draw.c
b/src/mesa/drivers/dri/i965/brw_draw.c
index
---
src/mesa/drivers/dri/i965/gen7_blorp.cpp |3 +++
1 file changed, 3 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/gen7_blorp.cpp
b/src/mesa/drivers/dri/i965/gen7_blorp.cpp
index 4d1a65e..031e21e 100644
--- a/src/mesa/drivers/dri/i965/gen7_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/g
.
In addition, this change inserts the required brw_tracked_state objects
to enable hw-generated binding tables in normal render path.
Signed-off-by: Abdiel Janulgue
---
src/mesa/drivers/dri/i965/brw_binding_tables.c | 84
src/mesa/drivers/dri/i965/brw_context.c
Update the on-chip binding table for every generated texture surface_state
entries. Instead of generating binding tables manually, we update individual
slots of surface state entries using the new EDIT commands for gen7.5
Signed-off-by: Abdiel Janulgue
---
src/mesa/drivers/dri/i965
When hardware-generated binding tables are taken into use, skip uploading
of binding tables generated manually by the driver.
Signed-off-by: Abdiel Janulgue
---
src/mesa/drivers/dri/i965/brw_binding_tables.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/src
Signed-off-by: Abdiel Janulgue
---
src/mesa/drivers/dri/i965/brw_binding_tables.c | 36
src/mesa/drivers/dri/i965/brw_defines.h|5
src/mesa/drivers/dri/i965/brw_state.h | 15 +-
3 files changed, 55 insertions(+), 1 deletion(-)
diff
When surface_state pointing to pull constant surfaces are changed, update
on-chip binding table. Same with VS ubo surface states.
Signed-off-by: Abdiel Janulgue
---
src/mesa/drivers/dri/i965/brw_vs_surface_state.c |9 +
1 file changed, 9 insertions(+)
diff --git a/src/mesa/drivers
Signed-off-by: Abdiel Janulgue
---
src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
index 564ac76..2dfa05c
Signed-off-by: Abdiel Janulgue
---
src/mesa/drivers/dri/i965/brw_wm_surface_state.c |6 ++
1 file changed, 6 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index d82a7cf..08c5720 100644
--- a/src/mesa
Signed-off-by: Abdiel Janulgue
---
src/mesa/drivers/dri/i965/brw_wm_surface_state.c |4
1 file changed, 4 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 08c5720..215ff76 100644
--- a/src/mesa/drivers
When hw-generated binding tables are enabled edit the binding table
state for new SURFACE_STATE entries that are generated in the blorp path.
Signed-off-by: Abdiel Janulgue
---
src/mesa/drivers/dri/i965/gen6_blorp.cpp | 15 ++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff
entry
within
the command only allows until 32k. Therefore, ensure that offset fits within the
highest bit of the command.
Signed-off-by: Abdiel Janulgue
---
src/mesa/drivers/dri/i965/gen7_blorp.cpp |4 +++-
src/mesa/drivers/dri/i965/gen7_vs_state.c |3 ++-
src/mesa/drivers/dri/i965
On Wednesday, October 09, 2013 12:41:37 AM Abdiel Janulgue wrote:
> Prerequisites:
>
> - Kernel patches: [1]
> (do 'make headers_install' and update libdrm headers after compiling
> the kernel)
> - Mesa patch: [2]
>
Series lives on http://cgit.fre
This is passed on the kernel to enable the resource streamer enable bit
on MI_BATCHBUFFER_START
v3: Use I915_EXEC_RESOURCE_STREAMER. Previous patch didn't build.
Cc: Paul Berry
Cc: Kenneth Graunke
Cc: Chad Versace
Cc: Eric Anholt
Signed-off-by: Abdiel Janulgue
---
src/mesa/drivers/dri
implementation failed to catch this flags.
Signed-off-by: Abdiel Janulgue
---
src/mesa/drivers/dri/i965/brw_binding_tables.c | 87
src/mesa/drivers/dri/i965/brw_context.c|1 +
src/mesa/drivers/dri/i965/brw_context.h|1 +
src/mesa/drivers/dri/i965
: Kenneth Graunke
Cc: Chad Versace
Cc: Eric Anholt
Signed-off-by: Abdiel Janulgue
---
src/mesa/drivers/dri/i965/brw_vs_surface_state.c | 20
1 file changed, 20 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
b/src/mesa/drivers/dri/i965
entry
within
the command only allows until 32k. Therefore, ensure that offset fits within the
highest bit of the command.
v3: Update to include 3DSTATE_BINDING_TABLE_POINTERS_GS
Cc: Paul Berry
Cc: Kenneth Graunke
Cc: Chad Versace
Cc: Eric Anholt
Signed-off-by: Abdiel Janulgue
---
src/mesa
On Thursday, October 10, 2013 01:04:08 PM Eric Anholt wrote:
>
> My basic comment on resource streamer: We need performance data showing
> that it is a win before we commit it. I'm not planning on reviewing the
> changes until we get that data.
At it's current form, I don't expect that much perf
On Friday, October 11, 2013 11:39:53 AM Eric Anholt wrote:
>
> As I understand it, the thing that you think will make this eventually
> actually improve performance is state flagging that indicates which
> individual surfaces need updating. Since that should improve
> performance even in the non
On Friday, October 11, 2013 11:39:53 AM Eric Anholt wrote:
> As a general rule, we don't land code whose purpose is performance
> improvement if it doesn't actually improve performance. If more work is
> needed to make it actually improve performance, then we wait until then.
>
> As I understand
On Monday, October 14, 2013 10:50:24 AM Eric Anholt wrote:
> Abdiel Janulgue writes:
> >
> > One optimization idea that I had in mind a few months ago was to find a
> > way to reduce emission of surface state objects. Currently, we rebuild
> > surface states every time
On Tuesday, October 15, 2013 10:29:16 AM Eric Anholt wrote:
> Abdiel Janulgue writes:
> > On Monday, October 14, 2013 10:50:24 AM Eric Anholt wrote:
> >> Abdiel Janulgue writes:
> >> > One optimization idea that I had in mind a few months ago was to find a
&g
On Thursday, October 31, 2013 09:22:23 AM Rogovin, Kevin wrote:
> but I do not quite follow the second upload; what
> is the magicks going on with batch->state_batch_offset and for that matter
> batch->bo->size ??
This is stack and heap model for batchbuffer submission. Direct state, which
is us
On Thursday, October 31, 2013 12:38:37 PM Rogovin, Kevin wrote:
> >> but I do not quite follow the second upload; what
> >> is the magicks going on with batch->state_batch_offset and for that
> >> matter
> >> batch->bo->size ??
> >
> >This is stack and heap model for batchbuffer submission. Direct
On Thursday, October 10, 2013 01:04:08 PM Eric Anholt wrote:
>
> My basic comment on resource streamer: We need performance data showing
> that it is a win before we commit it. I'm not planning on reviewing the
> changes until we get that data.
Okay, I revisited the series, did some additional o
tion.
No regressions observed on existing piglit tests. Shader-db did not report any
gains
or loses as well.
Thanks to Matt Turner for initial feeback and advice.
Abdiel Janulgue (6):
i965/fs: Refactor check for potential copy propagated instructions.
i965/fs: copy propagate
have added 'NOT' as a potentially propagate-able instruction, don't
propagate it either when the destination instruction is not a logical op.
Signed-off-by: Abdiel Janulgue
---
src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp | 14 ++
1 file changed, 14 insertions(+
On Broadwell, this reduces the instruction to 1 operation when 'NOT' is used
with a
logical instruction.
Signed-off-by: Abdiel Janulgue
---
src/mesa/drivers/dri/i965/brw_vec4.h | 4 +-
.../drivers/dri/i965/brw_vec4_copy_propagation.cpp | 62 +
Signed-off-by: Abdiel Janulgue
---
.../drivers/dri/i965/brw_fs_copy_propagation.cpp | 27 ++
1 file changed, 17 insertions(+), 10 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp
b/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp
index
.
Since 'NOT' is now a potentially propagate-able instruction, don't propagate it
either when the destination instruction is not a logical op.
Signed-off-by: Abdiel Janulgue
---
src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp | 14 ++
1 file changed, 14 insertions(+
Signed-off-by: Abdiel Janulgue
---
src/mesa/drivers/dri/i965/gen8_disasm.c | 24 +---
1 file changed, 21 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/gen8_disasm.c
b/src/mesa/drivers/dri/i965/gen8_disasm.c
index 04f8538..d027d9a 100644
--- a/src/mesa
On Broadwell, this reduces the instruction to 1 operation when NOT is used with
a logical instruction
Signed-off-by: Abdiel Janulgue
---
src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp | 13 ++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri
On 04.06.2014 15:22, Matt Turner wrote:
On Tue, Jun 3, 2014 at 3:59 PM, Abdiel Janulgue
wrote:
The negation source modifier on src registers has changed meaning in Broadwell
when
used with logical operations.
Make sure copy propagation occurs only for original statements that does not
have
v2 of the fix.
Abdiel Janulgue (6):
i965/fs: Refactor check for potential copy propagated instructions.
i965/fs: skip copy-propate for logical instructions with negated src
entries
i965/fs: copy propagate 'NOT' instruction when used with logical operation
i965/
Signed-off-by: Abdiel Janulgue
Reviewed-by: Matt Turner
---
.../drivers/dri/i965/brw_fs_copy_propagation.cpp | 27 ++
1 file changed, 17 insertions(+), 10 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp
b/src/mesa/drivers/dri/i965
The negation source modifier on src registers has changed meaning in Broadwell
when
used with logical operations. Don't copy propagate when negate src modifier is
set
and when the destination instruction is a logical op.
Signed-off-by: Abdiel Janulgue
---
src/mesa/drivers/dri
On Broadwell, this reduces the instruction to a single operation when NOT is
used with
a logical instruction.
Signed-off-by: Abdiel Janulgue
---
src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp | 17 +
1 file changed, 13 insertions(+), 4 deletions(-)
diff --git a/src/mesa
The negation source modifier on src registers has changed meaning in Broadwell
when
used with logical operations. Don't copy propagate when negate src modifier is
set
and when the destination instruction is a logical op.
Signed-off-by: Abdiel Janulgue
---
src/mesa/drivers/dri/i965/brw_v
Signed-off-by: Abdiel Janulgue
---
src/mesa/drivers/dri/i965/gen8_disasm.c | 24 +---
1 file changed, 21 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/gen8_disasm.c
b/src/mesa/drivers/dri/i965/gen8_disasm.c
index 04f8538..98e2453 100644
--- a/src/mesa
On Broadwell, this reduces the instruction to a single operation when NOT is
used with
a logical instruction.
Signed-off-by: Abdiel Janulgue
---
.../drivers/dri/i965/brw_vec4_copy_propagation.cpp | 20 +++-
1 file changed, 15 insertions(+), 5 deletions(-)
diff --git a/src
Signed-off-by: Abdiel Janulgue
---
src/mesa/program/ir_to_mesa.cpp| 6 ++
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 6 ++
2 files changed, 12 insertions(+)
diff --git a/src/mesa/program/ir_to_mesa.cpp b/src/mesa/program/ir_to_mesa.cpp
index 17ccb64..4f32b7d 100644
--- a
Now that sature is implemented natively as instruction,
we can cut down on uneeded functionality.
Signed-off-by: Abdiel Janulgue
---
src/mesa/drivers/dri/i965/brw_fs.h | 1 -
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 37
2 files changed, 38 deletions
Now that sature is implemented natively as an instruction,
we can cut down on uneeded functionality.
Signed-off-by: Abdiel Janulgue
---
src/mesa/drivers/dri/i965/brw_vec4.h | 1 -
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 21 -
2 files changed, 22 deletions
Signed-off-by: Abdiel Janulgue
---
src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp | 1 +
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 4
2 files changed, 5 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp
b/src/mesa/drivers/dri
Now that sature is implemented natively as instruction,
we can cut down on uneeded functionality
Signed-off-by: Abdiel Janulgue
---
src/mesa/program/ir_to_mesa.cpp| 48
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 51 --
2
in
the
do_algebraic pass. This is done in the next patch set.
Abdiel Janulgue (11):
glsl: Add ir_unop_saturate
glsl: Add constant evaluation of ir_unop_saturate
glsl: Add a pass to lower ir_unop_saturate to clamp(x, 0, 1)
ir_to_mesa, glsl_to_tgsi: lower ir_unop_
Now that we have the ir_binop_saturate implemented as a single
instruction, generate the correct simplified expression.
Signed-off-by: Abdiel Janulgue
---
src/glsl/ir_builder.cpp | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/src/glsl/ir_builder.cpp b/src/glsl
Signed-off-by: Abdiel Janulgue
---
src/glsl/ir_constant_expression.cpp | 6 ++
1 file changed, 6 insertions(+)
diff --git a/src/glsl/ir_constant_expression.cpp
b/src/glsl/ir_constant_expression.cpp
index 8afe8f7..b885a2f 100644
--- a/src/glsl/ir_constant_expression.cpp
+++ b/src/glsl
Signed-off-by: Abdiel Janulgue
---
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 4
1 file changed, 4 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index ee52c07..2112edf 100644
--- a/src/mesa/drivers/dri/i965
Signed-off-by: Abdiel Janulgue
---
src/glsl/ir_optimization.h | 1 +
src/glsl/lower_instructions.cpp | 29 +
2 files changed, 30 insertions(+)
diff --git a/src/glsl/ir_optimization.h b/src/glsl/ir_optimization.h
index c63921c..a831adb 100644
--- a/src/glsl
Signed-off-by: Abdiel Janulgue
---
src/glsl/ir.cpp | 2 ++
src/glsl/ir.h| 1 +
src/glsl/ir_validate.cpp | 1 +
3 files changed, 4 insertions(+)
diff --git a/src/glsl/ir.cpp b/src/glsl/ir.cpp
index 8fed768..7682e1e 100644
--- a/src/glsl/ir.cpp
+++ b/src/glsl/ir.cpp
@@ -251,6
Needed when vertex programs doesn't allow saturate
Signed-off-by: Abdiel Janulgue
---
src/mesa/program/ir_to_mesa.cpp| 5 -
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 6 +-
2 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/src/mesa/program/ir_to_mesa.cpp
Signed-off-by: Abdiel Janulgue
---
src/glsl/opt_algebraic.cpp | 6 ++
1 file changed, 6 insertions(+)
diff --git a/src/glsl/opt_algebraic.cpp b/src/glsl/opt_algebraic.cpp
index 0d694b6..ee52de7 100644
--- a/src/glsl/opt_algebraic.cpp
+++ b/src/glsl/opt_algebraic.cpp
@@ -593,6 +593,12
Signed-off-by: Abdiel Janulgue
---
src/glsl/opt_algebraic.cpp | 32
1 file changed, 32 insertions(+)
diff --git a/src/glsl/opt_algebraic.cpp b/src/glsl/opt_algebraic.cpp
index 9d55392..8d7609d 100644
--- a/src/glsl/opt_algebraic.cpp
+++ b/src/glsl
Optimize clamp(x, 0, 1), clamp(x, 0.0, b), where b < 1.0,
and clamp(x, b, 1.0), where b > 0.0 as saturate operations.
Shader-db output:
helped: shaders/0ad/9.shader_test fs16: 38 -> 37 (-2.63%)
helped: shaders/0ad/9.shader_test fs8:38 -> 37 (-2.63%)
helped: s
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