Could you elaborate. If there's something missing from my mental model of
how implicit sync works, I'd like to have it corrected. People continue
claiming that AMD is somehow special but I have yet to grasp what makes it
so. (Not that anyone has bothered to try all that hard to explain it.)
The synchronization works because the Mesa driver waits for idle (drains
the GFX pipeline) at the end of command buffers and there is only 1
graphics queue, so everything is ordered.
The GFX pipeline runs asynchronously to the command buffer, meaning the
command buffer only starts draws and doesn'
