[Mesa-dev] [PATCH V2] Check if the window is non-NULL before setting swap interval.

This fixes crash due to NULL window when swap interval is set for pbuffer surface. Test: CtsDisplayTestCases pass Signed-off-by: samiuddi --- Kindly ignore this patch https://lists.freedesktop.org/archives/mesa-dev/2018-July/199098.html src/egl/drivers/dri2/platform_android.c | 2 +- 1 file

Re: [Mesa-dev] [PATCH] From List: Check if the window is non-NULL before setting swap interval.

Please ignore this patch. New patch at: https://lists.freedesktop.org/archives/mesa-dev/2018-July/199103.html -Original Message- From: Mohammad, Sami Uddin Sent: Monday, July 2, 2018 10:16 AM To: mesa-dev@lists.freedesktop.org Cc: e...@engestrom.ch; emil.veli...@collabora.com; Kondapally

Re: [Mesa-dev] [PATCH] gallium: Disable Altivec on PPC SPE variants

On 2018-07-01 08:36 AM, Stuart Young wrote: > PowerPC variants with the Signal Processing Engine do not support > Altivec instructions, as the SPE instruction set uses the same > instruction codes as the Altivec set available in most PowerPC > cores. Note that this is not related to the "Synergisti

Re: [Mesa-dev] [PATCH] gallium: Disable Altivec on PPC SPE variants

Possibly you might be right. If so, I suspect it'll just continue to languish in Debian I will point out that this isn't quite your typical PowerPC core, and quite a bit was hacked out to implement the Signal Processing Engine by Freescale when it was created. I will also note that while the core

Re: [Mesa-dev] [PATCH v2 0/9] anv, nir: Move large constants to a UBO

For the series: Reviewed-by: Iago Toral Quiroga On Fri, 2018-06-29 at 17:13 -0700, Jason Ekstrand wrote: > This little series adds an optimization pass to NIR and wires up up > in anv > that moves large constant variables to a UBO. This fixes a farily > common > case in some filter or ambient o

[Mesa-dev] [PATCH v2] radv: make sure to wait for CP DMA when needed

This might fix some synchronization issues. I don't know if that will affect performance but it's required for correctness. v2: - wait for CP DMA in CmdWaitEvents() - track if CP DMA is used CC: Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_cmd_buffer.c | 10 ++ src/amd/vu

Re: [Mesa-dev] [PATCH 4/4] anv/cmd_buffer: only emit state base address if the address changes

On July 2, 2018 01:09:38 Iago Toral wrote: On Sun, 2018-07-01 at 18:30 -0500, Jason Ekstrand wrote: On June 29, 2018 03:11:00 Iago Toral Quiroga wrote: --- src/intel/vulkan/anv_private.h | 5 + src/intel/vulkan/genX_cmd_buffer.c | 12 +++- 2 files changed, 12 insertions(+), 5

Re: [Mesa-dev] [PATCH 1/1] mesa/st: draw_vbo: initialize restart_index too

On 07/01/2018 02:05 AM, Gert Wollny wrote: From: Gert Wollny restart_index is later always used in a comparison, so it should be initialized properly. Fixes valgrind warning: Conditional jump or move depends on uninitialised value(s) at 0xB8D682F: r600_draw_vbo (r600_state_common.c:2153

Re: [Mesa-dev] [PATCH v2 1/9] util/macros: Import ALIGN_POT from ralloc.c

On 06/29/2018 06:13 PM, Jason Ekstrand wrote: --- src/util/macros.h | 3 +++ src/util/ralloc.c | 2 -- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/src/util/macros.h b/src/util/macros.h index 6d3df904082..95b86c7a31a 100644 --- a/src/util/macros.h +++ b/src/util/macros.h @@

Re: [Mesa-dev] [PATCH] amd: remove support for LLVM 5.0

On Mon, 2018-07-02 at 09:32 +1000, Timothy Arceri wrote: > Reviewed-by: Timothy Arceri > > On 02/07/18 05:50, Marek Olšák wrote: > > From: Marek Olšák > > > > Users are encouraged to switch to LLVM 6.0 released in March 2018. > > --- > > .travis.yml | 24

[Mesa-dev] [PATCH] i965: Disable dual source blending when shader doesn't support it on gen8+

Dual source blending behaviour is undefined when shader doesn't have second color output, dismissing fragment in such situation leads to a hang on gen8+ if depth test in enabled. Since blending cannot be gracefully fixed in such case and the result is undefined - blending is simply disabled. Bugz

[Mesa-dev] [Bug 106644] [llvmpipe] Mesa 18.1.0 fails lp_test_format, lp_test_arit, lp_test_blend, lp_test_printf, lp_test_conv tests

https://bugs.freedesktop.org/show_bug.cgi?id=106644 erhar...@mailbox.org changed: What|Removed |Added Attachment #139744|0 |1 is obsolete|

[Mesa-dev] [Bug 106644] [llvmpipe] Mesa 18.1.0 fails lp_test_format, lp_test_arit, lp_test_blend, lp_test_printf, lp_test_conv tests

https://bugs.freedesktop.org/show_bug.cgi?id=106644 --- Comment #13 from erhar...@mailbox.org --- Created attachment 140428 --> https://bugs.freedesktop.org/attachment.cgi?id=140428&action=edit build.log (ppc64) -- You are receiving this mail because: You are the assignee for the bug. You are

[Mesa-dev] [Bug 106644] [llvmpipe] Mesa 18.1.0 fails lp_test_format, lp_test_arit, lp_test_blend, lp_test_printf, lp_test_conv tests

https://bugs.freedesktop.org/show_bug.cgi?id=106644 erhar...@mailbox.org changed: What|Removed |Added Attachment #139743|0 |1 is obsolete|

[Mesa-dev] [Bug 106644] [llvmpipe] Mesa 18.1.0 fails lp_test_format, lp_test_arit, lp_test_blend, lp_test_printf, lp_test_conv tests

https://bugs.freedesktop.org/show_bug.cgi?id=106644 --- Comment #15 from erhar...@mailbox.org --- Created attachment 140430 --> https://bugs.freedesktop.org/attachment.cgi?id=140430&action=edit test-suite.log (ppc64) -- You are receiving this mail because: You are the QA Contact for the bug. Y

[Mesa-dev] [PATCH 03/16] spirv/nir: SpvStorageClassAtomicCounter support on vtn_storage_class_to_mode

Atomic Counters are uniforms per spec. Reviewed-by: Timothy Arceri --- src/compiler/spirv/vtn_variables.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/src/compiler/spirv/vtn_variables.c b/src/compiler/spirv/vtn_variables.c index 574f422ceab..6a2144ceabb 100644 --- a/s

[Mesa-dev] [PATCH v2 00/16] ARB_gl_spirv series 3 v2: support for atomic counters

Hi Timothy. Thanks for the quick review! As you suggested some squash and commit drops, Im resending the v2 of the series, just in case you want a final overview of the series (although it is somewhat an overkill, I know). The only patch missing a review is "[PATCH 13/16] nir: Fix OpAtomicCounter

[Mesa-dev] [PATCH 04/16] spirv/nir: add offset at vtn_variable

Also initialize it on var_decoration_cb This is equivalent to nir_variable.offset, used to store the location an atomic counter is stored at. Reviewed-by: Timothy Arceri --- src/compiler/spirv/vtn_private.h | 1 + src/compiler/spirv/vtn_variables.c | 3 +++ 2 files changed, 4 insertions(+) d

[Mesa-dev] [PATCH 02/16] nir/linker: handle uniforms without explicit location

ARB_gl_spirv points that uniforms in general need explicit location. But there are still some cases of uniforms without location, like for example uniform atomic counters. Those doesn't have a location from the OpenGL point of view (they are identified with a binding and offset), but Mesa internall

[Mesa-dev] [PATCH 05/16] nir_types: add glsl_atomic_uint_type() helper

Reviewed-by: Timothy Arceri --- src/compiler/nir_types.cpp | 6 ++ src/compiler/nir_types.h | 1 + 2 files changed, 7 insertions(+) diff --git a/src/compiler/nir_types.cpp b/src/compiler/nir_types.cpp index d2b2a93b207..1fc6bfa7175 100644 --- a/src/compiler/nir_types.cpp +++ b/src/compiler

[Mesa-dev] [PATCH 09/16] spirv/nir: add atomic counter support on vtn_handle_ssbo_or_shared_atomic

So renamed to a more general vtn_handle_atomics Reviewed-by: Timothy Arceri --- src/compiler/spirv/spirv_to_nir.c | 90 --- 1 file changed, 84 insertions(+), 6 deletions(-) diff --git a/src/compiler/spirv/spirv_to_nir.c b/src/compiler/spirv/spirv_to_nir.c in

[Mesa-dev] [PATCH 01/16] compiler/glsl: refactor empty_uniform_block utilities to linker_util

This includes: * Move the defition of empty_uniform_block to linker_util.h * Move find_empty_block (with a rename) to linker_util.h * Refactor some code at linker.cpp to a new method at linker_util.h (link_util_update_empty_uniform_locations) So all that code could be used by the GLSL li

[Mesa-dev] [PATCH 11/16] nir/types: Add wrappers for a couple of atomic counter methods

From: Neil Roberts --- src/compiler/nir_types.cpp | 12 src/compiler/nir_types.h | 3 +++ 2 files changed, 15 insertions(+) diff --git a/src/compiler/nir_types.cpp b/src/compiler/nir_types.cpp index 1fc6bfa7175..7b963951e24 100644 --- a/src/compiler/nir_types.cpp +++ b/src/compi

[Mesa-dev] [PATCH 14/16] mesa/glspirv: lower workgroup access to offsets

From: Antia Puentes This will perform the CS shared lowering. See 8761a04d0d93 Reviewed-by: Timothy Arceri --- src/mesa/main/glspirv.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/mesa/main/glspirv.c b/src/mesa/main/glspirv.c index c585bc51bbf..8ad6c373914 100644 --- a/src/mesa/main

[Mesa-dev] [PATCH 12/16] nir/linker: Add a pure NIR implementation of the atomic counter linker

From: Neil Roberts This is mostly just a straight-forward conversion of link_assign_atomic_counter_resources to C directly using nir variables instead of GLSL IR variables. It is based on the version of link_assign_atomic_counter_resources in 6b8909f2d1906. I’m noting this here to make it easier

[Mesa-dev] [PATCH 06/16] spirv/nir: tweak nir type when storage class is SpvStorageClassAtomicCounter

GLSL types differentiates uint from atomic uint. On SPIR-V the type is uint, and the variable has a specific storage class. So we need to tweak the type based on the storage class. Ideally we would like to get the proper type at vtn_handle_type, but we don't have the storage class at that moment.

[Mesa-dev] [PATCH 08/16] spirv/nir: initialize offset on the nir var at vtn_create_variable

This is convenient when dealing with atomic counter uniforms. The alternative would be doing that at vtn_handle_atomics. Reviewed-by: Timothy Arceri --- src/compiler/spirv/vtn_variables.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/compiler/spirv/vtn_variables.c b/src/compiler/spirv

[Mesa-dev] [PATCH 07/16] nir/spirv: Fix atomic counter (multidimensional-)arrays

From: Antia Puentes When constructing NIR if we have a SPIR-V uint variable and the storage class is SpvStorageClassAtomicCounter, we store as NIR's glsl_type an atomic_uint to reflect the fact that the variable is an atomic counter. However, we were tweaking the type only for atomic_uint scalar

[Mesa-dev] [PATCH 15/16] i965: enable AtomicStorage capability for gen7+

That is the same gen requirement for ARB_shader_atomic_counters. Reviewed-by: Timothy Arceri --- src/mesa/drivers/dri/i965/brw_context.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c index 9ced230ec14..e755d

[Mesa-dev] [PATCH 16/16] i965: Use the new nir atomic counter linker for SPIR-V shaders

From: Neil Roberts Reviewed-by: Timothy Arceri --- src/mesa/drivers/dri/i965/brw_link.cpp | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_link.cpp b/src/mesa/drivers/dri/i965/brw_link.cpp index 8bc97fa4f3e..1071056f149 100644 --- a/src/mesa/drivers/dri/i965/

[Mesa-dev] [PATCH 13/16] nir: Fix OpAtomicCounterIDecrement for uniform atomic counters

From: Antia Puentes From the SPIR-V 1.0 specification, section 3.32.18, "Atomic Instructions": "OpAtomicIDecrement: The instruction's result is the Original Value." However, we were implementing it, for uniform atomic counters, as a pre-decrement operation, as was the one available

[Mesa-dev] [PATCH 10/16] spirv/nir: add capability check for SpvCapabilityAtomicStorage

Capability that informs if atomic counters are supported. From SPIR-V 1.0 spec, section 3.7, "Storage Class", item 10 from table: (Column "Storage Class"): "AtomicCounter For holding atomic counters. Visible across all functions of the current invocation. Atomic counter-specific memory

Re: [Mesa-dev] [PATCH v2 00/16] ARB_gl_spirv series 3 v2: support for atomic counters

Forgot to CC Timothy. On 02/07/18 16:58, Alejandro Piñeiro wrote: > Hi Timothy. Thanks for the quick review! > > As you suggested some squash and commit drops, Im resending the v2 of > the series, just in case you want a final overview of the series > (although it is somewhat an overkill, I know)

[Mesa-dev] [PATCH v2 1/9] util/macros: Import ALIGN_POT from ralloc.c

v2 (Jason Ekstrand): - Rename y to pot_align (Brian) - Also use ALIGN_POT in build_id.c and slab.c (Brian) Cc: Brian Paul Reviewed-by: Timothy Arceri --- src/util/build_id.c | 7 +++ src/util/macros.h | 3 +++ src/util/ralloc.c | 2 -- src/util/slab.c | 6 ++ 4 files changed,

Re: [Mesa-dev] [PATCH v2 1/9] util/macros: Import ALIGN_POT from ralloc.c

On Mon, Jul 2, 2018 at 6:33 AM, Brian Paul wrote: > On 06/29/2018 06:13 PM, Jason Ekstrand wrote: > >> --- >> src/util/macros.h | 3 +++ >> src/util/ralloc.c | 2 -- >> 2 files changed, 3 insertions(+), 2 deletions(-) >> >> diff --git a/src/util/macros.h b/src/util/macros.h >> index 6d3df9040

[Mesa-dev] [Bug 106644] [llvmpipe] Mesa 18.1.0 fails lp_test_format, lp_test_arit, lp_test_blend, lp_test_printf, lp_test_conv tests

https://bugs.freedesktop.org/show_bug.cgi?id=106644 erhar...@mailbox.org changed: What|Removed |Added Attachment #139745|0 |1 is obsolete|

[Mesa-dev] [Bug 106644] [llvmpipe] Mesa 18.1.0 fails lp_test_format, lp_test_arit, lp_test_blend, lp_test_printf, lp_test_conv tests

https://bugs.freedesktop.org/show_bug.cgi?id=106644 erhar...@mailbox.org changed: What|Removed |Added Attachment #139746|0 |1 is obsolete|

Re: [Mesa-dev] [PATCH] spirv: Implicitly set missing NonWriteable decoration

This should be fixed in upstream dxvk so let's not put the hack in mesa: https://github.com/doitsujin/dxvk/issues/460 On Wed, Jun 27, 2018 at 6:25 PM, Jason Ekstrand wrote: > This works around rendering issues in Skyrim caused by DXVK missing a > decoration. > --- > src/compiler/spirv/vtn_vari

[Mesa-dev] [Bug 106644] [llvmpipe] Mesa 18.1.0 fails lp_test_format, lp_test_arit, lp_test_blend, lp_test_printf, lp_test_conv tests

https://bugs.freedesktop.org/show_bug.cgi?id=106644 erhar...@mailbox.org changed: What|Removed |Added Attachment #139747|0 |1 is obsolete|

[Mesa-dev] [Bug 106644] [llvmpipe] Mesa 18.1.0 fails lp_test_format, lp_test_arit, lp_test_blend, lp_test_printf, lp_test_conv tests

https://bugs.freedesktop.org/show_bug.cgi?id=106644 erhar...@mailbox.org changed: What|Removed |Added Attachment #139748|0 |1 is obsolete|

[Mesa-dev] [Bug 106644] [llvmpipe] Mesa 18.1.0 fails lp_test_format, lp_test_arit, lp_test_blend, lp_test_printf, lp_test_conv tests

https://bugs.freedesktop.org/show_bug.cgi?id=106644 erhar...@mailbox.org changed: What|Removed |Added Attachment #139749|0 |1 is obsolete|

[Mesa-dev] [Bug 106644] [llvmpipe] Mesa 18.1.2 fails lp_test_format, lp_test_arit, lp_test_blend, lp_test_printf, lp_test_conv tests

https://bugs.freedesktop.org/show_bug.cgi?id=106644 erhar...@mailbox.org changed: What|Removed |Added Summary|[llvmpipe] Mesa 18.1.0 |[llvmpipe] Mesa 18.1.2

[Mesa-dev] [PATCH 2/2] mesa: don't double incr/decr ActiveCounters

Frameretrace ends up w/ excess calls to SelectPerfMonitorCountersAMD() which ends up re-enabling already enabled counters. Which causes ActiveCounters[group] to be double incremented for the same counter. This causes BeginPerfMonitorAMD() to fail. The AMD_performance_monitor spec doesn't say that

[Mesa-dev] [PATCH 1/2] mesa: fix error msg typo

Signed-off-by: Rob Clark --- src/mesa/main/performance_monitor.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/main/performance_monitor.c b/src/mesa/main/performance_monitor.c index 65ea8437fd8..35972ff 100644 --- a/src/mesa/main/performance_monitor.c +++ b/src

[Mesa-dev] [Bug 107089] [GLSL] "Multiplication by zero" optimization for floating point expression should be skipped

https://bugs.freedesktop.org/show_bug.cgi?id=107089 Bug ID: 107089 Summary: [GLSL] "Multiplication by zero" optimization for floating point expression should be skipped Product: Mesa Version: unspecified Hardware: Other

[Mesa-dev] [PATCH] glsl: skip mul by zero opt for floating point expression

From: Vadym Shovkoplias One of the operands can be NaN and multiplication by zero should also result to NaN value. E.g: float Temp = 0.0; void main() { Temp = log2(Temp); Temp = Temp * 0.0; isnan(Temp); ... } here Temp should be NaN and isnan() should return true

[Mesa-dev] [Bug 107089] [GLSL] "Multiplication by zero" optimization for floating point expression should be skipped

https://bugs.freedesktop.org/show_bug.cgi?id=107089 --- Comment #1 from Ilia Mirkin --- GLSL's approach to NaN is pretty weak. https://www.khronos.org/registry/OpenGL/extensions/ARB/ARB_shader_precision.txt """ The following rules apply to both single and double precision operations:

Re: [Mesa-dev] [PATCH] glsl: skip mul by zero opt for floating point expression

On Mon, Jul 2, 2018 at 11:22 AM, vadym.shovkoplias wrote: > From: Vadym Shovkoplias > > One of the operands can be NaN and multiplication by zero > should also result to NaN value. E.g: See my comment in https://bugs.freedesktop.org/show_bug.cgi?id=107089#c1 > > float Temp = 0.0; > void main()

[Mesa-dev] [PATCH v6] nv50/ir, nvc0: add debug options for shader replacement

Changes in v6: - Fix heap overflow in createDumpFilename() Changes in v5: - Add a forgotten change to fix memory leaks of fname Changes in v4: - Move code to nv50_ir_dump.cpp - Dump headers of nvc0 programs - Use CRC-32 instead of a truncated SHA1 - Set prog->maxGPR to targ->getFileSize() - 1 and s

Re: [Mesa-dev] [PATCH 2/2] mesa: don't double incr/decr ActiveCounters

On 07/02/2018 09:13 AM, Rob Clark wrote: Frameretrace ends up w/ excess calls to SelectPerfMonitorCountersAMD() which ends up re-enabling already enabled counters. Which causes ActiveCounters[group] to be double incremented for the same counter. This causes BeginPerfMonitorAMD() to fail. The AM

Re: [Mesa-dev] [PATCH 1/2] mesa: fix error msg typo

On 07/02/2018 09:13 AM, Rob Clark wrote: Signed-off-by: Rob Clark --- src/mesa/main/performance_monitor.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/main/performance_monitor.c b/src/mesa/main/performance_monitor.c index 65ea8437fd8..35972ff 100644 --- a/

Re: [Mesa-dev] [PATCH v2 1/9] util/macros: Import ALIGN_POT from ralloc.c

On 07/02/2018 09:00 AM, Jason Ekstrand wrote: On Mon, Jul 2, 2018 at 6:33 AM, Brian Paul > wrote: On 06/29/2018 06:13 PM, Jason Ekstrand wrote: ---   src/util/macros.h | 3 +++   src/util/ralloc.c | 2 --   2 files changed, 3 insert

Re: [Mesa-dev] [PATCH v2 1/9] util/macros: Import ALIGN_POT from ralloc.c

On Mon, Jul 2, 2018 at 9:23 AM, Brian Paul wrote: > On 07/02/2018 09:00 AM, Jason Ekstrand wrote: > >> On Mon, Jul 2, 2018 at 6:33 AM, Brian Paul > bri...@vmware.com>> wrote: >> >> On 06/29/2018 06:13 PM, Jason Ekstrand wrote: >> >> --- >>src/util/macros.h | 3 +++ >>

Re: [Mesa-dev] [PATCH 2/2] mesa: don't double incr/decr ActiveCounters

On Mon, Jul 2, 2018 at 12:15 PM, Brian Paul wrote: > On 07/02/2018 09:13 AM, Rob Clark wrote: >> >> Frameretrace ends up w/ excess calls to SelectPerfMonitorCountersAMD() >> which ends up re-enabling already enabled counters. Which causes >> ActiveCounters[group] to be double incremented for the

Re: [Mesa-dev] [PATCH v2 1/9] util/macros: Import ALIGN_POT from ralloc.c

On 07/02/2018 10:50 AM, Jason Ekstrand wrote: On Mon, Jul 2, 2018 at 9:23 AM, Brian Paul > wrote: On 07/02/2018 09:00 AM, Jason Ekstrand wrote: On Mon, Jul 2, 2018 at 6:33 AM, Brian Paul mailto:bri...@vmware.com>

[Mesa-dev] [PATCH] radv/winsys: make use of radeon_emit()

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c | 31 ++- 1 file changed, 16 insertions(+), 15 deletions(-) diff --git a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c index 848e81924f..9eebcd9ea0 10

[Mesa-dev] [Bug 107090] nir: problem case for loop unrolling

https://bugs.freedesktop.org/show_bug.cgi?id=107090 Bug ID: 107090 Summary: nir: problem case for loop unrolling Product: Mesa Version: git Hardware: Other OS: All Status: NEW Severity: normal Pr

Re: [Mesa-dev] [PATCH 05/12] nir: Make deref_has_indirect public

> diff --git a/src/compiler/nir/nir_lower_io_arrays_to_elements.c > b/src/compiler/nir/nir_lower_io_arrays_to_elements.c > index 9a5eec8f870..7753f85824d 100644 > --- a/src/compiler/nir/nir_lower_io_arrays_to_elements.c > +++ b/src/compiler/nir/nir_lower_io_arrays_to_elements.c > @@ -194,12 +194,1

Re: [Mesa-dev] [PATCH 1/3] r600: force LOD range to be only one value when mip.min filter is NONE

Am 01.07.2018 um 19:32 schrieb Gert Wollny: > For a texture that has only one LOD defined, but for which > GL_TEXTURE_MAX_LEVEL is the default (1000) and > GL_TEXTURE_MIN_LOD != GL_TEXTURE_MAX_LOD the reading from the texture does > not properly resolve the LOD level and texture lookup might fail.

Re: [Mesa-dev] [PATCH v2 1/9] util/macros: Import ALIGN_POT from ralloc.c

On Monday, July 2, 2018 7:59:31 AM PDT Jason Ekstrand wrote: > v2 (Jason Ekstrand): > - Rename y to pot_align (Brian) > - Also use ALIGN_POT in build_id.c and slab.c (Brian) > > Cc: Brian Paul > Reviewed-by: Timothy Arceri > --- > src/util/build_id.c | 7 +++ > src/util/macros.h | 3 +++

Re: [Mesa-dev] [PATCH v2 4/9] nir/deref: Add helpers for getting offsets

On Friday, June 29, 2018 5:13:52 PM PDT Jason Ekstrand wrote: > These are very similar to the related function in nir_lower_io except > that they don't handle per-vertex or packed things (that could be added, > in theory) and they take a more detailed size/align function pointer. > One day, we shou

Re: [Mesa-dev] [PATCH 05/12] nir: Make deref_has_indirect public

On July 2, 2018 12:58:47 Caio Marcelo de Oliveira Filho wrote: diff --git a/src/compiler/nir/nir_lower_io_arrays_to_elements.c b/src/compiler/nir/nir_lower_io_arrays_to_elements.c index 9a5eec8f870..7753f85824d 100644 --- a/src/compiler/nir/nir_lower_io_arrays_to_elements.c +++ b/src/compiler

Re: [Mesa-dev] [PATCH 3/3] r600: Scale interger valued texture border colors to float

Am 01.07.2018 um 19:32 schrieb Gert Wollny: > It seems the hardware always expects floating point border color values > [0,1] for unsigned, and [-1,1] for signed texture component, regardless > of pixel type, but the border colors are passed according to texture > component type. Hence, before subm

Re: [Mesa-dev] [PATCH 1/1] mesa/st: draw_vbo: initialize restart_index too

Reviewed-by: Roland Scheidegger Am 01.07.2018 um 10:05 schrieb Gert Wollny: > From: Gert Wollny > > restart_index is later always used in a comparison, so it should be > initialized properly. > > Fixes valgrind warning: > Conditional jump or move depends on uninitialised value(s) > at 0xB

Re: [Mesa-dev] [PATCH v2 0/9] anv, nir: Move large constants to a UBO

On Friday, June 29, 2018 5:13:48 PM PDT Jason Ekstrand wrote: > This little series adds an optimization pass to NIR and wires up up in anv > that moves large constant variables to a UBO. This fixes a farily common > case in some filter or ambient occlusion shaders where they put some sort > of loo

Re: [Mesa-dev] [PATCH] r600: compare structure elements instead of doing a memcmp

Looks good to me. Although I wonder if it wouldn't be a good idea to make sure it's actually all initialized (via memset). But I think that's not quite consistently handled the same everywhere (that is, some things are memset, some are not). (There might be similar bugs lurking elswhere, but OTOH t

[Mesa-dev] [Bug 107089] [GLSL] "Multiplication by zero" optimization for floating point expression should be skipped

https://bugs.freedesktop.org/show_bug.cgi?id=107089 --- Comment #2 from Roland Scheidegger --- (In reply to Ilia Mirkin from comment #1) > So NaN * 0 -> 0 appears to be a valid transformation. I haven't gone back > and checked what's in the core specs, but I doubt it's any different. For this par

Re: [Mesa-dev] [PATCH v2 0/9] anv, nir: Move large constants to a UBO

On Mon, Jul 2, 2018 at 11:26 AM, Kenneth Graunke wrote: > On Friday, June 29, 2018 5:13:48 PM PDT Jason Ekstrand wrote: > > This little series adds an optimization pass to NIR and wires up up in > anv > > that moves large constant variables to a UBO. This fixes a farily common > > case in some f

Re: [Mesa-dev] [PATCH v2 4/9] nir/deref: Add helpers for getting offsets

On Mon, Jul 2, 2018 at 11:10 AM, Kenneth Graunke wrote: > On Friday, June 29, 2018 5:13:52 PM PDT Jason Ekstrand wrote: > > These are very similar to the related function in nir_lower_io except > > that they don't handle per-vertex or packed things (that could be added, > > in theory) and they ta

Re: [Mesa-dev] [PATCH] st/nir: Disable varying packing when doing transform feedback.

Eric Anholt writes: > [ Unknown signature status ] > Timothy Arceri writes: > >> nir_compact_varyings() is meant to skip over varyings used by xfb: >> >> /* We can't repack xfb varyings. */ >> if (var->data.always_active_io) >> continue; >> >> Any idea why that i

[Mesa-dev] [Bug 106843] Cannot build osmesa with GLES (shared glapi) using Scons and MSVC

https://bugs.freedesktop.org/show_bug.cgi?id=106843 --- Comment #7 from Alex Granni --- (In reply to Eric Engestrom from comment #4) > Hi Alex, > Would you mind testing the work-in-progress branch and report if it works > when building with Meson? > git://people.freedesktop.org/~dbaker/mesa meson

[Mesa-dev] [Bug 107092] Thread leak when changing context size

https://bugs.freedesktop.org/show_bug.cgi?id=107092 Bug ID: 107092 Summary: Thread leak when changing context size Product: Mesa Version: unspecified Hardware: Other OS: All Status: NEW Severity: normal

[Mesa-dev] [Bug 107092] Thread leak when changing context size

https://bugs.freedesktop.org/show_bug.cgi?id=107092 --- Comment #1 from Cory Quammen --- Created attachment 140441 --> https://bugs.freedesktop.org/attachment.cgi?id=140441&action=edit VTK Python script showing the thread leak -- You are receiving this mail because: You are the QA Contact for

[Mesa-dev] [Bug 107092] Thread leak when changing context size

https://bugs.freedesktop.org/show_bug.cgi?id=107092 --- Comment #2 from Cory Quammen --- Please note that the apitrace output is from a single iteration of the loop in vtk-mesa-threads-growth.py -- You are receiving this mail because: You are the assignee for the bug. You are the QA Contact for

[Mesa-dev] [Bug 107092] Thread leak when changing context size

https://bugs.freedesktop.org/show_bug.cgi?id=107092 Cory Quammen changed: What|Removed |Added CC||cory.quam...@kitware.com -- You are rec

[Mesa-dev] [PATCH] i965: Fix BRW_NEW_NUM_SAMPLES to be in .brw, not .mesa

This is the wrong kind of dirty bit. Caught by GCC warnings, due to 64-bit values being truncated to 32 bits. Fixes: b95b0e2918c052068caeb4f6c2802ba89be043a3 (intel/anv,blorp,i965: Implement the SKL 16x MSAA SIMD32 workaround) --- src/mesa/drivers/dri/i965/genX_state_upload.c | 4 ++-- 1 file c

[Mesa-dev] [Bug 106644] [llvmpipe] Mesa 18.1.2 fails lp_test_format, lp_test_arit, lp_test_blend, lp_test_printf, lp_test_conv tests

https://bugs.freedesktop.org/show_bug.cgi?id=106644 --- Comment #22 from Ben Crocker --- Would you please run the lp_test_* tests with the following environmental controls in place: % export LIBGL_DEBUG=verbose % export MESA_DEBUG=verbose % export MESA_GLSL="" % export MESA_GLSL="dump log unifo

Re: [Mesa-dev] [PATCH 20/23] intel/eu: Rework opcode description tables to allow efficient look-up by either HW or IR opcode.

> diff --git a/src/intel/Makefile.tools.am b/src/intel/Makefile.tools.am > index b00cc8cc2cb..4f2027cdfd6 100644 > --- a/src/intel/Makefile.tools.am > +++ b/src/intel/Makefile.tools.am > @@ -27,6 +27,8 @@ tools_aubinator_SOURCES = \ > tools/aubinator.c \ > tools/intel_aub.h > > +nodis

[Mesa-dev] [PATCH 1/3] anv/pipeline: Use a per-VB struct instead of separate arrays

--- src/intel/vulkan/anv_pipeline.c| 6 +++--- src/intel/vulkan/anv_private.h | 7 +-- src/intel/vulkan/genX_cmd_buffer.c | 4 ++-- src/intel/vulkan/genX_pipeline.c | 2 +- 4 files changed, 11 insertions(+), 8 deletions(-) diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vul

[Mesa-dev] [PATCH 3/3] anv: Implement VK_EXT_vertex_attribute_divisor

--- src/intel/vulkan/anv_device.c | 8 src/intel/vulkan/anv_extensions.py | 1 + src/intel/vulkan/anv_pipeline.c| 13 + 3 files changed, 22 insertions(+) diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c index 7b3ddbb9501..fc2576db1e6 10064

[Mesa-dev] [PATCH 2/3] anv/pipeline: Add a per-VB instance divisor

--- src/intel/vulkan/anv_pipeline.c| 8 src/intel/vulkan/anv_private.h | 1 + src/intel/vulkan/genX_cmd_buffer.c | 7 +-- src/intel/vulkan/genX_pipeline.c | 8 ++-- 4 files changed, 12 insertions(+), 12 deletions(-) diff --git a/src/intel/vulkan/anv_pipeline.c b/src/int

Re: [Mesa-dev] [PATCH] i965: Fix BRW_NEW_NUM_SAMPLES to be in .brw, not .mesa

Reviewed-by: Jason Ekstrand On Mon, Jul 2, 2018 at 2:19 PM, Kenneth Graunke wrote: > This is the wrong kind of dirty bit. Caught by GCC warnings, due to > 64-bit values being truncated to 32 bits. > > Fixes: b95b0e2918c052068caeb4f6c2802ba89be043a3 (intel/anv,blorp,i965: > Implement the SKL 16

Re: [Mesa-dev] [PATCH 3/3] anv: Implement VK_EXT_vertex_attribute_divisor

Patches 1-3 are Reviewed-by: Caio Marcelo de Oliveira Filho But consider comment below. > @@ -1430,6 +1431,18 @@ anv_pipeline_init(struct anv_pipeline *pipeline, > anv_subpass_view_count(pipeline->subpass); > } > > + const VkPipelineVertexInputDivisorStateCreateInfoEXT *vi_di

Re: [Mesa-dev] [PATCH 3/3] anv: Implement VK_EXT_vertex_attribute_divisor

> > @@ -1430,6 +1431,18 @@ anv_pipeline_init(struct anv_pipeline *pipeline, > > anv_subpass_view_count(pipeline->subpass); > > } > > > > + const VkPipelineVertexInputDivisorStateCreateInfoEXT *vi_div_state = > > + vk_find_struct_const(pCreateInfo->pNext, > > +

Re: [Mesa-dev] [PATCH 3/3] anv: Implement VK_EXT_vertex_attribute_divisor

On Mon, Jul 2, 2018 at 3:26 PM, Caio Marcelo de Oliveira Filho < caio.olive...@intel.com> wrote: > > > @@ -1430,6 +1431,18 @@ anv_pipeline_init(struct anv_pipeline *pipeline, > > > anv_subpass_view_count(pipeline->subpass); > > > } > > > > > > + const VkPipelineVertexInputDivisorSt

[Mesa-dev] [Bug 107089] [GLSL] "Multiplication by zero" optimization for floating point expression should be skipped

https://bugs.freedesktop.org/show_bug.cgi?id=107089 --- Comment #3 from Ian Romanick --- Basically, unless you use precise, it's like compiling -ffast-math. A lot of apps go to lengths to avoid the possibility of generating Inf or NaN in shaders due the the problems that they cause. -- You are

Re: [Mesa-dev] [PATCH] glsl: skip mul by zero opt for floating point expression

On 07/02/2018 08:22 AM, vadym.shovkoplias wrote: > From: Vadym Shovkoplias > > One of the operands can be NaN and multiplication by zero > should also result to NaN value. E.g: > > float Temp = 0.0; > void main() > { > Temp = log2(Temp); > Temp = Temp * 0.0; > isnan(Temp); >

Re: [Mesa-dev] [PATCH 07/12] intel/compiler: More peephole select

On 06/28/2018 03:25 PM, Caio Marcelo de Oliveira Filho wrote: > Hi, > >> diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c >> index 67c062d91f5..6a0d4090fa7 100644 >> --- a/src/intel/compiler/brw_nir.c >> +++ b/src/intel/compiler/brw_nir.c >> @@ -557,7 +557,22 @@ brw_nir_opt

Re: [Mesa-dev] [PATCH 07/11] ac/radv: move llvm compiler info to struct and init in one place

On 30 June 2018 at 13:30, Marek Olšák wrote: > On Tue, Jun 26, 2018 at 11:58 PM, Dave Airlie wrote: >> From: Dave Airlie >> >> This creates a common per-thread compiler info struct, and adds >> the init code to it. This is mostly ported from radeonsi. >> >> The common info struct is used in radv

Re: [Mesa-dev] [PATCH 11/11] ac/radv: using tls to store llvm related info and speed up compiles (v3)

On 30 June 2018 at 14:11, Marek Olšák wrote: > I wonder if we can somehow make the TLS magic apply to RADV only. > Radeonsi can do it without TLS. Then, the RADV-specific TLS code can be > moved to RADV, and other code (if any) can be shared. It's not the TLS code that is going to cause the probl

Re: [Mesa-dev] [PATCH 20/23] intel/eu: Rework opcode description tables to allow efficient look-up by either HW or IR opcode.

Caio Marcelo de Oliveira Filho writes: >> diff --git a/src/intel/Makefile.tools.am b/src/intel/Makefile.tools.am >> index b00cc8cc2cb..4f2027cdfd6 100644 >> --- a/src/intel/Makefile.tools.am >> +++ b/src/intel/Makefile.tools.am >> @@ -27,6 +27,8 @@ tools_aubinator_SOURCES = \ >> tools/aubina

Re: [Mesa-dev] [PATCH 20/23] intel/eu: Rework opcode description tables to allow efficient look-up by either HW or IR opcode.

> >> +nodist_EXTRA_tools_aubinator_SOURCES = dummy.cpp > >> + > >> tools_aubinator_CFLAGS = \ > >>$(AM_CFLAGS) \ > >>$(ZLIB_CFLAGS) > >> @@ -47,6 +49,8 @@ tools_aubinator_LDADD = \ > >> tools_aubinator_error_decode_SOURCES = \ > >>tools/aubinator_error_decode.c > >> > >> +nodist_EXT

Re: [Mesa-dev] [PATCH 11/16] nir/types: Add wrappers for a couple of atomic counter methods

you missed my r-b here ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 3/3] anv: Implement VK_EXT_vertex_attribute_divisor

> How about this version? > https://gitlab.freedesktop.org/jekstrand/mesa/commits/wip/VK_EXT_vertex_attribute_divisor > > I've changed it to first grab the vertex divisors from the struct and then > the multiview handling is a *=. This moves it to more of a "set a bunch of > stuff then compile" m

Re: [Mesa-dev] [PATCH v2] mesa: enable EXT_render_snorm extension

On Fri, Jun 15, 2018 at 08:11:57AM +0300, Tapani Pälli wrote: > Patch sets additional formats renderable and enables the extension > when OpenGL ES 3.1 is supported. > > v2: instead of dummy_true, have a separate toggle for extension > (Eric Anholt) > > Signed-off-by: Tapani Pälli > --- > s

Re: [Mesa-dev] [PATCH 13/16] nir: Fix OpAtomicCounterIDecrement for uniform atomic counters

Thanks. Reviewed-by: Timothy Arceri On 03/07/18 00:58, Alejandro Piñeiro wrote: From: Antia Puentes From the SPIR-V 1.0 specification, section 3.32.18, "Atomic Instructions": "OpAtomicIDecrement: The instruction's result is the Original Value." However, we were implementing

Re: [Mesa-dev] [PATCH v2 00/16] ARB_gl_spirv series 3 v2: support for atomic counters

Series looks good to me. How much to go before we can turn this extension on? On 03/07/18 00:58, Alejandro Piñeiro wrote: Hi Timothy. Thanks for the quick review! As you suggested some squash and commit drops, Im resending the v2 of the series, just in case you want a final overview of the ser

[Mesa-dev] [Bug 107090] nir: problem case for loop unrolling

https://bugs.freedesktop.org/show_bug.cgi?id=107090 Timothy Arceri changed: What|Removed |Added Status|NEW |NEEDINFO --- Comment #1 from Timothy A

[Mesa-dev] [PATCH 05/11] radv: create/destroy passmgr at the higher level.

From: Dave Airlie This is prep work for moving this to a per-thread struct --- src/amd/vulkan/radv_nir_to_llvm.c | 15 +++ src/amd/vulkan/radv_private.h | 2 ++ src/amd/vulkan/radv_shader.c | 7 +-- 3 files changed, 14 insertions(+), 10 deletions(-) diff --git a/src/a

[Mesa-dev] [PATCH 08/11] radv/radeonsi: add a check ir tm options

From: Dave Airlie This doesn't do much yet, but it makes it easier to move the code to a common shared code base. --- src/amd/common/ac_llvm_util.h | 1 + src/amd/vulkan/radv_shader.c | 4 +++- src/gallium/drivers/radeonsi/si_pipe.c | 5 +++-- 3 files changed, 7 insertions(+),

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