Couple of comments below, otherwise Reviewed-by: Timothy Arceri
On Mon, 2015-07-27 at 13:14 +1000, Dave Airlie wrote:
> From: Dave Airlie
>
> This was missed when I did fp64, I've sent a piglit test to cover
> the case as well.
>
> Signed-off-by: Dave Airlie
> ---
> src/mesa/main/uniform_qu
> > Hmmm... So you only need it as padding? Wouldn't it be possible for
> > you to declare samplers to be 0 bytes?
> Maybe it can be done by changing the type of the sampler arg from i32
> to an empty struct. I'll have to try this, I don't know if it will
> work.
But then it would only work for
But samplers aren't necessary for the image attributes, so I'll break
this patch into two.
On Mon, Jul 27, 2015 at 10:25 AM, Zoltán Gilián wrote:
>> > Hmmm... So you only need it as padding? Wouldn't it be possible for
>> > you to declare samplers to be 0 bytes?
>> Maybe it can be done by chang
Zoltán Gilián writes:
>> > Hmmm... So you only need it as padding? Wouldn't it be possible for
>> > you to declare samplers to be 0 bytes?
>> Maybe it can be done by changing the type of the sampler arg from i32
>> to an empty struct. I'll have to try this, I don't know if it will
>> work.
>
>
---
.../state_trackers/clover/llvm/invocation.cpp | 28 --
1 file changed, 15 insertions(+), 13 deletions(-)
diff --git a/src/gallium/state_trackers/clover/llvm/invocation.cpp
b/src/gallium/state_trackers/clover/llvm/invocation.cpp
index 967284d..924cb36 100644
--- a/src
Read-only and write-only image arguments are recognized and
distinguished.
Attributes of the image arguments are passed to the kernel as implicit
arguments.
---
src/gallium/state_trackers/clover/core/kernel.cpp | 28 +
src/gallium/state_trackers/clover/core/kernel.hpp | 15 ++-
src/gallium
On 07/06/2015 03:19 AM, Ilia Mirkin wrote:
On Sun, Jul 5, 2015 at 8:17 PM, Ilia Mirkin wrote:
On Fri, Jul 3, 2015 at 4:54 AM, Tapani Pälli wrote:
Change function to get all gl_constants for inspection, this is used
by follow-up patch.
Signed-off-by: Tapani Pälli
---
src/glsl/linker.cpp |
> -Original Message-
> From: mesa-dev [mailto:mesa-dev-boun...@lists.freedesktop.org] On
> Behalf Of Samuel Iglesias Gonsálvez
> Sent: Monday, July 27, 2015 8:41 AM
> To: Marta Lofstedt; mesa-dev@lists.freedesktop.org
> Subject: Re: [Mesa-dev] [PATCH V5 5/7] mesa/es3.1: enable
> GL_ARB_te
> -Original Message-
> From: mesa-dev [mailto:mesa-dev-boun...@lists.freedesktop.org] On
> Behalf Of Samuel Iglesias Gonsálvez
> Sent: Monday, July 27, 2015 8:41 AM
> To: Marta Lofstedt; mesa-dev@lists.freedesktop.org
> Subject: Re: [Mesa-dev] [PATCH V5 2/7] mesa/es3.1: enable
> GL_ARB_sh
Zoltan Gilian writes:
> ---
> .../state_trackers/clover/llvm/invocation.cpp | 28
> --
> 1 file changed, 15 insertions(+), 13 deletions(-)
>
> diff --git a/src/gallium/state_trackers/clover/llvm/invocation.cpp
> b/src/gallium/state_trackers/clover/llvm/invocation.cpp
>
Zoltan Gilian writes:
> Read-only and write-only image arguments are recognized and
> distinguished.
> Attributes of the image arguments are passed to the kernel as implicit
> arguments.
> ---
> src/gallium/state_trackers/clover/core/kernel.cpp | 28 +
> src/gallium/state_trackers/clover/c
On Mon, Jul 27, 2015 at 3:51 AM, Dave Airlie wrote:
> On 27 July 2015 at 11:50, Dave Airlie wrote:
>> From: Dave Airlie
>>
>> This enables GL4.1 for radeonsi, and updates the
>> docs in the correct places.
>>
> self review suggests this should probably be gated on LLVM 3.7.
That's correct.
Mar
This fixes the spec@arb_shader_image_load_store@invalid index bounds
piglit tests on IVB, which were causing a GPU hang and then a crash
due to the invalid binding table index result of the array index
calculation. Other generations seem to behave sensibly when an
invalid surface is provided so it
This cleans up fs_inst::regs_read() slightly by disentangling the
calculation of "components" from the handling of message payload
arguments. This will also simplify the SIMD lowering and logical send
message lowering passes, because it will avoid expressions like
'regs_read * REG_SIZE / component
From: Marta Lofstedt
Signed-off-by: Marta Lofstedt
---
src/mesa/main/get.c | 6 ++
src/mesa/main/get_hash_params.py | 6 --
2 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/src/mesa/main/get.c b/src/mesa/main/get.c
index 60c1b1b..a443493 100644
--- a/src/mesa
From: Marta Lofstedt
Signed-off-by: Marta Lofstedt
---
src/mesa/main/get.c | 6 ++
src/mesa/main/get_hash_params.py | 14 --
2 files changed, 14 insertions(+), 6 deletions(-)
diff --git a/src/mesa/main/get.c b/src/mesa/main/get.c
index 39fe725..60c1b1b 100644
---
From: Marta Lofstedt
Signed-off-by: Marta Lofstedt
---
src/mesa/main/get.c | 6 ++
src/mesa/main/get_hash_params.py | 17 +++--
2 files changed, 17 insertions(+), 6 deletions(-)
diff --git a/src/mesa/main/get.c b/src/mesa/main/get.c
index ec7eb71..dc04930 100644
-
Francisco Jerez writes:
> Matt Turner writes:
>
>> On Fri, Feb 6, 2015 at 6:42 AM, Francisco Jerez
>> wrote:
>>> Fixes rewrite by the register coalesce pass of references to
>>> individual halves of 16-wide coalesced registers.
>>> ---
>>> src/mesa/drivers/dri/i965/brw_fs_register_coalesce.cp
R-B
On Jul 27, 2015 6:12 AM, "Francisco Jerez" wrote:
> This cleans up fs_inst::regs_read() slightly by disentangling the
> calculation of "components" from the handling of message payload
> arguments. This will also simplify the SIMD lowering and logical send
> message lowering passes, because
https://bugs.freedesktop.org/show_bug.cgi?id=91474
Bug ID: 91474
Summary: egl initializes wrong card with hybrid graphics card
Product: Mesa
Version: unspecified
Hardware: Other
OS: All
Status: NEW
Severit
---
src/gallium/state_trackers/clover/api/dispatch.hpp | 23 +-
1 file changed, 18 insertions(+), 5 deletions(-)
diff --git a/src/gallium/state_trackers/clover/api/dispatch.hpp
b/src/gallium/state_trackers/clover/api/dispatch.hpp
index ffae1ae..781b54e 100644
--- a/src/galliu
EdB (2):
clover: make dispatch matches functions defs
clover: stub missing CL 1.2 functions
src/gallium/state_trackers/clover/api/dispatch.cpp | 10 -
src/gallium/state_trackers/clover/api/dispatch.hpp | 23 +++-
src/gallium/state_trackers/clover/api/kernel.cpp | 8
As sugested by Tom a long time ago
and in order to be able to create Piglit tests
---
src/gallium/state_trackers/clover/api/dispatch.cpp | 10 -
src/gallium/state_trackers/clover/api/kernel.cpp | 8 +++
src/gallium/state_trackers/clover/api/memory.cpp | 25 --
Hi! Jason,
On jue, 2015-07-23 at 15:46 -0700, Jason Ekstrand wrote:
> > @@ -332,7 +334,22 @@ vec4_visitor::nir_emit_instr(nir_instr *instr)
> > void
> > vec4_visitor::nir_emit_load_const(nir_load_const_instr *instr)
> > {
> > - /* @TODO: Not yet implemented */
> > + dst_reg reg = dst_reg(G
On Mon, Jul 27, 2015 at 9:22 AM, Antía Puentes wrote:
> Hi! Jason,
>
> On jue, 2015-07-23 at 15:46 -0700, Jason Ekstrand wrote:
>
>> > @@ -332,7 +334,22 @@ vec4_visitor::nir_emit_instr(nir_instr *instr)
>> > void
>> > vec4_visitor::nir_emit_load_const(nir_load_const_instr *instr)
>> > {
>> > -
On Fri, Feb 6, 2015 at 6:42 AM, Francisco Jerez wrote:
> Fixes rewrite by the register coalesce pass of references to
> individual halves of 16-wide coalesced registers.
> ---
> src/mesa/drivers/dri/i965/brw_fs_register_coalesce.cpp | 8 ++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
On 07/25/2015 03:08 AM, Jason Ekstrand wrote:
> Alright, I got through it again...
>
> I asked for a few trivial changes on a few of the patches. With those
> fixed, everything except patch 65 and 66 are
>
Thanks! we have fixed most of the patches already.
> Reviewed-by: Jason Ekstrand
>
> W
On 07/25/2015 01:19 AM, Jason Ekstrand wrote:
> This patch needs to go *before* patch 71 so things continue to build.
>
Both patches build for me in the current order, and also build fine
changing order as you propose. Are you sure it is patch 71 and 72 the
ones conflicting?
> On Thu, Jul 23, 20
On Mon, Jul 27, 2015 at 2:29 PM, Eduardo Lima Mitev wrote:
> On 07/25/2015 01:19 AM, Jason Ekstrand wrote:
>> This patch needs to go *before* patch 71 so things continue to build.
>>
>
> Both patches build for me in the current order, and also build fine
> changing order as you propose. Are you su
Reviewed-by: Jordan Justen
On 2015-07-27 06:01:31, Francisco Jerez wrote:
> This fixes the spec@arb_shader_image_load_store@invalid index bounds
> piglit tests on IVB, which were causing a GPU hang and then a crash
> due to the invalid binding table index result of the array index
> calculation.
On 07/27/2015 11:33 PM, Jason Ekstrand wrote:
> On Mon, Jul 27, 2015 at 2:29 PM, Eduardo Lima Mitev wrote:
>> On 07/25/2015 01:19 AM, Jason Ekstrand wrote:
>>> This patch needs to go *before* patch 71 so things continue to build.
>>>
>>
>> Both patches build for me in the current order, and also b
Splitted in two. The emission is moved to a new vec4_visitor
method, vec4_visitor::emit_texture, ir order to be reused
on the nir path.
---
v3: removed shadow_compare and has_nonconstant_offset booleans, as
pointed on the v2 review.
src/mesa/drivers/dri/i965/brw_vec4.h | 14 +
src/mes
Uses the nir structure to get all the info needed (sources,
dest reg, etc), and then it uses the common
vec4_visitor::emit_texture to emit the final code.
---
v3: added glsl_type_for_nir_alu_type helper as suggested (it could be reused
on fs too in the future). Setting with more detail the number
On Mon, Jul 27, 2015 at 2:07 PM, Eduardo Lima Mitev wrote:
> On 07/25/2015 03:08 AM, Jason Ekstrand wrote:
>> Alright, I got through it again...
>>
>> I asked for a few trivial changes on a few of the patches. With those
>> fixed, everything except patch 65 and 66 are
>>
>
> Thanks! we have fixed
On Mon, Jul 27, 2015 at 2:47 PM, Eduardo Lima Mitev wrote:
> On 07/27/2015 11:33 PM, Jason Ekstrand wrote:
>> On Mon, Jul 27, 2015 at 2:29 PM, Eduardo Lima Mitev wrote:
>>> On 07/25/2015 01:19 AM, Jason Ekstrand wrote:
This patch needs to go *before* patch 71 so things continue to build.
>>>
From: Jim Bish
---
Android.common.mk | 10 ++
Android.mk | 3 +++
src/mesa/Android.libmesa_dricore.mk | 2 +-
src/mesa/drivers/dri/i965/intel_fbo.c | 6 +-
src/mesa/drivers/dri/i965/intel_tex_image.c | 4 +++
Hi,
Attached is a patch that should support the said extension. I am using
the following piglit patch to test with:
https://github.com/victoredwardocallaghan/piglit-work/commit/783d5aa28b2e5ea4f67e439fe9e74c0391f5d7d0
This is my first Mesa ext so take it easy on me ;)
Many thanks to Furkan for
Patches 1, 3, 6 and 7 are:
Reviewed-by: Samuel Iglesias Gonsálvez
Sam
On 23/07/15 16:38, Marta Lofstedt wrote:
> This is V5 of my patch-set for enabling extension enums for
> OpenGL ES 3.1.
>
> This update address comments from Ilia Mirkin and adds a new
> GLES31 label.
>
> I have my curre
Jason Ekstrand writes:
> On Fri, Feb 6, 2015 at 6:42 AM, Francisco Jerez wrote:
>> Fixes rewrite by the register coalesce pass of references to
>> individual halves of 16-wide coalesced registers.
>> ---
>> src/mesa/drivers/dri/i965/brw_fs_register_coalesce.cpp | 8 ++--
>> 1 file changed,
Patches 1, 3 and 4 are:
Reviewed-by: Samuel Iglesias Gonsálvez
One comment: I cannot find patch v6 2/4 in my inbox nor in the archive [0].
Thanks,
Sam
[0] http://lists.freedesktop.org/archives/mesa-dev/2015-July/
On 27/07/15 15:22, Marta Lofstedt wrote:
> From: Marta Lofstedt
>
> Signed
Francisco Jerez writes:
> Jason Ekstrand writes:
>
>> On Fri, Feb 6, 2015 at 6:42 AM, Francisco Jerez
>> wrote:
>>> Fixes rewrite by the register coalesce pass of references to
>>> individual halves of 16-wide coalesced registers.
>>> ---
>>> src/mesa/drivers/dri/i965/brw_fs_register_coalesce
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