On 24 July 2017 at 15:51, Kenneth Graunke wrote:
> On Monday, July 24, 2017 3:54:11 AM PDT Emil Velikov wrote:
>> Hi Ken,
>>
>> Admittedly I'm not an expert in the area, so perhaps a rather silly question.
>>
>> On 22 July 2017 at 00:17, Kenneth Graunke wrote:
>>
>> > +#ifdef USE_SSE41
>> > +
On Monday, July 24, 2017 3:54:11 AM PDT Emil Velikov wrote:
> Hi Ken,
>
> Admittedly I'm not an expert in the area, so perhaps a rather silly question.
>
> On 22 July 2017 at 00:17, Kenneth Graunke wrote:
>
> > +#ifdef USE_SSE41
> > + if (!cache->bo->cache_coherent && cpu_has_sse4_1)
> > +
Hi Ken,
Admittedly I'm not an expert in the area, so perhaps a rather silly question.
On 22 July 2017 at 00:17, Kenneth Graunke wrote:
> +#ifdef USE_SSE41
> + if (!cache->bo->cache_coherent && cpu_has_sse4_1)
> + _mesa_streaming_load_memcpy(map, cache->map, cache->next_offset);
> +
Quoting Kenneth Graunke (2017-07-24 02:03:23)
> On Saturday, July 22, 2017 2:28:06 AM PDT Chris Wilson wrote:
> > Considering the prevalence of sse4.1, another candidate is
> > brw_get_buffer_subdata(), we could use a WC map there as well.
>
> Your thinking is...avoid polluting the CPU cache, sinc
On Saturday, July 22, 2017 2:28:06 AM PDT Chris Wilson wrote:
> Considering the prevalence of sse4.1, another candidate is
> brw_get_buffer_subdata(), we could use a WC map there as well.
Your thinking is...avoid polluting the CPU cache, since we're basically
going to be reading a continuous chunk
On Saturday, July 22, 2017 2:14:28 AM PDT Chris Wilson wrote:
> Quoting Kenneth Graunke (2017-07-22 00:17:47)
> > The non-LLC story was a horror show. We uploaded data via pwrite
> > (drm_intel_bo_subdata), which would stall if the cache BO was in
> > use (being read) by the GPU. Obviously, we wa
Quoting Kenneth Graunke (2017-07-22 00:17:47)
> src/mesa/drivers/dri/i965/brw_program_cache.c | 83
> +++
> 1 file changed, 21 insertions(+), 62 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_program_cache.c
> b/src/mesa/drivers/dri/i965/brw_program_cache.c
Quoting Kenneth Graunke (2017-07-22 00:17:47)
> The non-LLC story was a horror show. We uploaded data via pwrite
> (drm_intel_bo_subdata), which would stall if the cache BO was in
> use (being read) by the GPU. Obviously, we wanted to avoid that.
> So, we tried to detect whether the buffer was bu
