Reviewed-by: Marek Olšák
Marek
On Thu, Jul 14, 2016 at 10:43 PM, Rob Clark wrote:
> On Thu, Jul 14, 2016 at 4:41 PM, Gustaw Smolarczyk
> wrote:
>> 2016-07-14 22:14 GMT+02:00 Rob Clark :
>>> In d035d50 this changed to 64b.. which I'm pretty sure was
>>> unintentional. Revert it back to 32b so
On Thu, Jul 14, 2016 at 4:41 PM, Gustaw Smolarczyk wrote:
> 2016-07-14 22:14 GMT+02:00 Rob Clark :
>> In d035d50 this changed to 64b.. which I'm pretty sure was
>> unintentional. Revert it back to 32b so the entire state struct
>> is a nice round 64b (cache-line size).
> Actually, cache line size
2016-07-14 22:14 GMT+02:00 Rob Clark :
> In d035d50 this changed to 64b.. which I'm pretty sure was
> unintentional. Revert it back to 32b so the entire state struct
> is a nice round 64b (cache-line size).
Actually, cache line size, at least on most x86 and ARM processors, is
64B (bytes) not 64b
