Re: [Mesa-dev] [PATCH 3/4] i965: Fix execution size of scalar TCS barrier setup code.

2016-08-17 Thread Alejandro Piñeiro
Reviewed-by: Alejandro Piñeiro On 17/08/16 16:15, Kenneth Graunke wrote: > Previously, the scalar TCS backend was generating: > > mov(8) g17<1>UD 0xUD{ align1 WE_all 1Q compacted }; > and(8) g17.2<1>UD g0.2<0,1,0>UD 0x0001e000UD { align1 WE_all 1Q }; > shl(8) g17.2<1>U

[Mesa-dev] [PATCH 3/4] i965: Fix execution size of scalar TCS barrier setup code.

2016-08-17 Thread Kenneth Graunke
Previously, the scalar TCS backend was generating: mov(8) g17<1>UD 0xUD{ align1 WE_all 1Q compacted }; and(8) g17.2<1>UD g0.2<0,1,0>UD 0x0001e000UD { align1 WE_all 1Q }; shl(8) g17.2<1>UD g17.2<8,8,1>UD 0x000bUD { align1 WE_all 1Q }; or(8)g17.2<1>UD g17.2<8