Re: [Mesa-dev] [PATCH 3/3] i965/gen7: Don't use L3$ for render targets

2013-08-13 Thread Chad Versace
On 08/12/2013 06:07 AM, ville.syrj...@linux.intel.com wrote: From: Ville Syrjälä According to HSW Bspec L3$ evictions may land in LLC regardless of LLC MOCS/PTE settings. That means we shouldn't set scanout buffers as L3 cacheable when writing to them. So far I've been unable to observe this p

[Mesa-dev] [PATCH 3/3] i965/gen7: Don't use L3$ for render targets

2013-08-12 Thread ville . syrjala
From: Ville Syrjälä According to HSW Bspec L3$ evictions may land in LLC regardless of LLC MOCS/PTE settings. That means we shouldn't set scanout buffers as L3 cacheable when writing to them. So far I've been unable to observe this phenomenon on my IVB, but better safe than sorry. Especially sin