Re: [Mesa-dev] [PATCH 2/2] intel/isl/gen4: Make depth/stencil buffers Y-Tiled

2018-07-19 Thread Nanley Chery
On Thu, Jul 19, 2018 at 10:16:47AM -0700, Kenneth Graunke wrote: > On Tuesday, July 17, 2018 10:45:28 AM PDT Nanley Chery wrote: > > On Tue, Jul 17, 2018 at 08:19:30AM -0700, Kenneth Graunke wrote: > > > Personally, I'd be inclined to simply make this > > > > > >*flags &= ISL_TILING_Y0_BIT; >

Re: [Mesa-dev] [PATCH 2/2] intel/isl/gen4: Make depth/stencil buffers Y-Tiled

2018-07-19 Thread Kenneth Graunke
On Tuesday, July 17, 2018 10:45:28 AM PDT Nanley Chery wrote: > On Tue, Jul 17, 2018 at 08:19:30AM -0700, Kenneth Graunke wrote: > > Personally, I'd be inclined to simply make this > > > >*flags &= ISL_TILING_Y0_BIT; While I still think the above is simpler and perhaps safer, your patches see

Re: [Mesa-dev] [PATCH 2/2] intel/isl/gen4: Make depth/stencil buffers Y-Tiled

2018-07-17 Thread Nanley Chery
On Tue, Jul 17, 2018 at 01:29:26PM -0700, Kenneth Graunke wrote: > On Tuesday, July 17, 2018 10:45:28 AM PDT Nanley Chery wrote: > > On Tue, Jul 17, 2018 at 08:19:30AM -0700, Kenneth Graunke wrote: > > > Wow, I had no idea we were actually using linear depth buffers. > > > > Neither did I until Ma

Re: [Mesa-dev] [PATCH 2/2] intel/isl/gen4: Make depth/stencil buffers Y-Tiled

2018-07-17 Thread Kenneth Graunke
On Tuesday, July 17, 2018 10:45:28 AM PDT Nanley Chery wrote: > On Tue, Jul 17, 2018 at 08:19:30AM -0700, Kenneth Graunke wrote: > > Wow, I had no idea we were actually using linear depth buffers. > > Neither did I until Mark let me know that I regressed some tests after > landing commit fbe01625f

Re: [Mesa-dev] [PATCH 2/2] intel/isl/gen4: Make depth/stencil buffers Y-Tiled

2018-07-17 Thread Nanley Chery
On Tue, Jul 17, 2018 at 08:19:30AM -0700, Kenneth Graunke wrote: > On Monday, July 16, 2018 4:57:40 PM PDT Nanley Chery wrote: > > Rendering to a linear depth buffer on gen4 is causing a GPU hang in the > > CI system. Until a better explanation is found, assume that errata is > > applicable to all

Re: [Mesa-dev] [PATCH 2/2] intel/isl/gen4: Make depth/stencil buffers Y-Tiled

2018-07-17 Thread Kenneth Graunke
On Monday, July 16, 2018 4:57:40 PM PDT Nanley Chery wrote: > Rendering to a linear depth buffer on gen4 is causing a GPU hang in the > CI system. Until a better explanation is found, assume that errata is > applicable to all gen4 platforms. > > Fixes fbe01625f6bf2cef6742e1ff0d3d44a2afec003e > ("i

[Mesa-dev] [PATCH 2/2] intel/isl/gen4: Make depth/stencil buffers Y-Tiled

2018-07-16 Thread Nanley Chery
Rendering to a linear depth buffer on gen4 is causing a GPU hang in the CI system. Until a better explanation is found, assume that errata is applicable to all gen4 platforms. Fixes fbe01625f6bf2cef6742e1ff0d3d44a2afec003e ("i965/miptree: Share tiling_flags in miptree_create"). Reported-by: Mark