Re: [Mesa-dev] [PATCH 1/9] intel gen4-5: fix the vue view in the fs.

2012-07-27 Thread Olivier Galibert
On Thu, Jul 26, 2012 at 10:18:01AM -0700, Eric Anholt wrote: > Olivier Galibert writes: > > > In some cases the fragment shader view of the vue registers was out of > > sync with the builder. This fixes it. > > s/builder/SF outputs/ ? > > I'd love to see the pre-gen6 code get rearranged so the

Re: [Mesa-dev] [PATCH 1/9] intel gen4-5: fix the vue view in the fs.

2012-07-26 Thread Eric Anholt
Olivier Galibert writes: > In some cases the fragment shader view of the vue registers was out of > sync with the builder. This fixes it. s/builder/SF outputs/ ? I'd love to see the pre-gen6 code get rearranged so the FS walked the bitfield of FS inputs from SF and chose the urb offset for eac

[Mesa-dev] [PATCH 1/9] intel gen4-5: fix the vue view in the fs.

2012-07-19 Thread Olivier Galibert
In some cases the fragment shader view of the vue registers was out of sync with the builder. This fixes it. Signed-off-by: Olivier Galibert --- src/mesa/drivers/dri/i965/brw_fs.cpp |9 - src/mesa/drivers/dri/i965/brw_wm_pass2.c | 10 +- 2 files changed, 17 insertions(