On 06/22/2018 05:37 PM, Bas Nieuwenhuizen wrote:
I'm wondering whether we need to do this more often in pipeline barriers?
Yeah, you are right.
Also I'd really appreciate if you could add a check to see if there is
any CP DMA activity in the first place.
Sure, will do.
Thanks for your f
I'm wondering whether we need to do this more often in pipeline barriers?
Also I'd really appreciate if you could add a check to see if there is
any CP DMA activity in the first place.
On Thu, Jun 21, 2018 at 11:04 AM, Samuel Pitoiset
wrote:
> Ported from RadeonSI.
> This might fix some synchron
Ported from RadeonSI.
This might fix some synchronization issues.
I don't know if that will affect performance.
CC:
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_cmd_buffer.c | 6 ++
src/amd/vulkan/radv_private.h| 2 ++
src/amd/vulkan/si_cmd_buffer.c | 12 +++-
3 f