Hello Ian,
Since I am working on a direct SPIR-V to NV50 IR translator, ultimately to be
used for OpenCL kernels, I will still need the patch for that work. (I even
wrote that patch because I needed it when handling 64-bit addresses. :-) )
But thanks for the heads-up!
Pierre
On 02:07 pm - Oct 1
I know know if it will make this patch unnecessary, but I have a GLSL
IR-level lowering pass for 64-bit multiplication. I'm going to send
that out with the rest of the GL_ARB_gpu_shader_int64 series within the
next day or so.
On 10/15/2016 03:24 PM, Pierre Moreau wrote:
> Hardware does not suppor
On 06:38 pm - Oct 15 2016, Ilia Mirkin wrote:
> On Sat, Oct 15, 2016 at 6:24 PM, Pierre Moreau wrote:
> > Hardware does not support 64-bit integers MAD and MUL operations, so we need
> > to transform them in 32-bit operations.
> >
> > Signed-off-by: Pierre Moreau
> > ---
> > .../drivers/nouveau/
On Sat, Oct 15, 2016 at 6:24 PM, Pierre Moreau wrote:
> Hardware does not support 64-bit integers MAD and MUL operations, so we need
> to transform them in 32-bit operations.
>
> Signed-off-by: Pierre Moreau
> ---
> .../drivers/nouveau/codegen/nv50_ir_peephole.cpp | 121
>
Sorry, there should have been a v2 next to PATCH in the subject…
Pierre
On 12:24 am - Oct 16 2016, Pierre Moreau wrote:
> Hardware does not support 64-bit integers MAD and MUL operations, so we need
> to transform them in 32-bit operations.
>
> Signed-off-by: Pierre Moreau
> ---
> .../drivers
Hardware does not support 64-bit integers MAD and MUL operations, so we need
to transform them in 32-bit operations.
Signed-off-by: Pierre Moreau
---
.../drivers/nouveau/codegen/nv50_ir_peephole.cpp | 121 +
1 file changed, 121 insertions(+)
Tested with (the GPU result was
