On Wednesday, February 28, 2018 2:21:24 PM PST Emil Velikov wrote:
> On 27 February 2018 at 00:05, Kenneth Graunke wrote:
>
> > --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> > +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> > @@ -203,12 +203,23 @@ brw_emit_surface_state(struct
On 27 February 2018 at 00:05, Kenneth Graunke wrote:
> --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> @@ -203,12 +203,23 @@ brw_emit_surface_state(struct brw_context *brw,
> * FIXME: move to the point of assignment.
>
On 2018-02-26 16:05:46, Kenneth Graunke wrote:
> This allows most GPU objects to use the full 48-bit address space
> offered by Gen8+ platforms, rather than being stuck with 32-bit.
> This expands the available GPU memory from 4G to 256TB or so.
>
> A few objects - instruction, scratch, and vertex
Quoting Kenneth Graunke (2018-02-27 20:56:29)
> On Tuesday, February 27, 2018 12:35:32 AM PST Chris Wilson wrote:
> > Quoting Kenneth Graunke (2018-02-27 00:05:46)
> > > +static bool
> > > +gem_supports_48b_addresses(int fd)
> > > +{
> > > + struct drm_i915_gem_exec_object2 obj = {
> > > + .
On Tuesday, February 27, 2018 12:35:32 AM PST Chris Wilson wrote:
> Quoting Kenneth Graunke (2018-02-27 00:05:46)
> > +static bool
> > +gem_supports_48b_addresses(int fd)
> > +{
> > + struct drm_i915_gem_exec_object2 obj = {
> > + .flags = EXEC_OBJECT_SUPPORTS_48B_ADDRESS,
> > + };
> > +
>
Quoting Kenneth Graunke (2018-02-27 00:05:46)
> +static bool
> +gem_supports_48b_addresses(int fd)
> +{
> + struct drm_i915_gem_exec_object2 obj = {
> + .flags = EXEC_OBJECT_SUPPORTS_48B_ADDRESS,
> + };
> +
> + struct drm_i915_gem_execbuffer2 execbuf = {
> + .buffers_ptr = (uintptr_
This allows most GPU objects to use the full 48-bit address space
offered by Gen8+ platforms, rather than being stuck with 32-bit.
This expands the available GPU memory from 4G to 256TB or so.
A few objects - instruction, scratch, and vertex buffers - need to
remain pinned in the low 4GB of the ad