Re: [Mesa-dev] [PATCH] ac/nir: set number of channels for packed mrt exports

Reviewed-by: Bas Nieuwenhuizen On Thu, Mar 8, 2018 at 5:30 PM, Samuel Pitoiset wrote: > Bit 0 enables VSRC0 (R in low bits, G high) and bit 2 enables > VSRC1 (B in low bits, A high). > > Signed-off-by: Samuel Pitoiset > --- > src/amd/common/ac_nir_to_llvm.c | 5 + > 1 file changed, 5 inser

[Mesa-dev] [PATCH] ac/nir: set number of channels for packed mrt exports

Bit 0 enables VSRC0 (R in low bits, G high) and bit 2 enables VSRC1 (B in low bits, A high). Signed-off-by: Samuel Pitoiset --- src/amd/common/ac_nir_to_llvm.c | 5 + 1 file changed, 5 insertions(+) diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index c785244