On Tuesday 07 February 2017, Dave Airlie wrote:
> From: Dave Airlie
>
> This enables a transfer queue using the SDMA engine on
> CIK/VI/Polaris GPUs.
>
> TODO:
> decide what to do with HW limitations from radeonsi
> (fail to record?)
> add linear bounds check to the buffer->image copies
>
> dEQ
It may be time to start thinking about whether CS emit functions can be
shared between radv and the gallium winsys. This code has seen a lot of
subtle bug fixes over time, so duplication is not very nice.
Nicolai
On 07.02.2017 07:01, Dave Airlie wrote:
From: Dave Airlie
This enables a trans
From: Dave Airlie
This enables a transfer queue using the SDMA engine on
CIK/VI/Polaris GPUs.
TODO:
decide what to do with HW limitations from radeonsi
(fail to record?)
add linear bounds check to the buffer->image copies
dEQP-VK.synchronization.op.multi_queue.fence.*:
Passed:1294/2688
