R-b
On Sat, May 13, 2017 at 12:14 PM, Kenneth Graunke
wrote:
> Scalar mode has been default since Broadwell, and vector mode is getting
> increasingly unmaintained. There are a few things that don't even fully
> work in vector mode on Skylake, but we've never cared because nobody
> uses it. Th
Francisco Jerez writes:
> Anuj Phogat writes:
>
>> Cherryview and Broxton are always gt1. So, remove the redundant checks.
>>
>> Signed-off-by: Anuj Phogat
>> ---
>> src/intel/common/gen_l3_config.c | 10 --
>> 1 file changed, 4 insertions(+), 6 deletions(-)
>>
>> diff --git a/src/inte
Reviewed-by: Marek Olšák
Note that this is not meant for master, because master doesn't need this
fix anymore.
Marek
On Sat, May 13, 2017 at 12:07 AM, Mauro Rossi wrote:
> 'if (regs->counters)' expression at line 623 is always true,
> spotted because of an error when building android-x86.
>
>
Reviewed-by: Marek Olšák
Marek
On Sat, May 13, 2017 at 12:05 AM, Rob Herring wrote:
> Commit 3dfe61ed6ec6 ("gallium: decrease the size of pipe_box - 24 -> 16
> bytes") changed the size of pipe_box, but the virgl code was relying on
> pipe_box and drm_virtgpu_3d_box structs having the same size
We can easily use the upload BO for push constants on Gen7.5/Gen8 too,
at the cost of a relocation when emitting 3DSTATE_CONSTANT_XS. We can
simply switch to using constant buffer pointer 2 instead of pointer 0,
like we do on Gen9+.
Ivybridge and Baytrail can't do this trick because they require
I don't think CS push constant uploading uses the section of L3
controlled by 3DSTATE_PUSH_CONSTANT_ALLOC_XS. So I don't think
it needs to be re-emitted when that space is reallocated.
The programming note in gen7_allocate_push_constants doesn't
indicate this is necessary, at least.
---
src/mesa
Shaders can use quite a bit of uniform data. Better to put it in the
upload buffers, like we do for client vertex data, rather than the
batch buffer state area, which is primarly used for indirect state.
This should free up batch space, allowing us to emit more commands in a
batch before flushing
On Friday, May 12, 2017 4:38:25 PM PDT Anuj Phogat wrote:
> v1: By Ben Widawsky
> v2: Add the restriction for GS, HS and DS and make sure
> the allocated sizes are not multiple of 3.
>
> Signed-off-by: Anuj Phogat
> Cc: Ben Widawsky
> ---
> src/mesa/drivers/dri/i965/gen7_urb.c | 12 +++
Scalar mode has been default since Broadwell, and vector mode is getting
increasingly unmaintained. There are a few things that don't even fully
work in vector mode on Skylake, but we've never cared because nobody
uses it. There's no point in porting it forward to new platforms.
So, just ignore
Anuj Phogat writes:
> Cherryview and Broxton are always gt1. So, remove the redundant checks.
>
> Signed-off-by: Anuj Phogat
> ---
> src/intel/common/gen_l3_config.c | 10 --
> 1 file changed, 4 insertions(+), 6 deletions(-)
>
> diff --git a/src/intel/common/gen_l3_config.c
> b/src/int
On Friday, May 12, 2017 4:38:28 PM PDT Anuj Phogat wrote:
> Cherryview and Broxton are always gt1. So, remove the redundant checks.
>
> Signed-off-by: Anuj Phogat
> ---
> src/intel/common/gen_l3_config.c | 10 --
> 1 file changed, 4 insertions(+), 6 deletions(-)
>
> diff --git a/src/int
Saying nothing about the correctness, these two patches at least fix the
mesa build for me when running with clang/clang++ where-as they were broken
before when targetting i686-linux-gnu.
--Aaron
On Sat, May 13, 2017 at 4:20 AM, Jan Beich wrote:
> glsl/.libs/libstandalone.a(libmesautil_la-dis
On Fri, May 12, 2017 at 3:35 PM, Chad Versace
wrote:
> On Thu 11 May 2017, Jason Ekstrand wrote:
> > On Thu, May 11, 2017 at 9:08 PM, Chad Versace
> > wrote:
> >
> > > On Thu 11 May 2017, Jason Ekstrand wrote:
> > > > On Thu, May 11, 2017 at 7:03 AM, Pohjolainen, Topi <
> > > > topi.pohjolai...@
Jonas,
Welcome to mesa-dev!
On May 11, 2017 12:08:01 PM Jonas Kulla wrote:
Hello everyone,
I'm a student who's looking to create a small Vulkan demo for my computer
graphics class; my laptop (CPU: Intel N3540) has an integrated Bay Trail
chip if I looked that up right, which should be capabl
Totally independent.
Signed-off-by: Bas Nieuwenhuizen
Fixes: 0e6d532d327 "radv/meta: add support for save/restore meta without vertex
data."
---
src/amd/vulkan/radv_meta.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/src/amd/vulkan/radv_meta.c b/src/amd/vulkan/radv_m
Most of these still point to gen9 functions even though we have gen10
versions now. We should point to the gen10 versions. Yes, I know some of
that is in a later patch but I see no reason why we can't roll those into
this patch and also fix up blorp and the few other things in this patch
whil
On May 12, 2017 4:41:36 PM Anuj Phogat wrote:
Signed-off-by: Anuj Phogat
---
src/intel/compiler/brw_compiler.h | 2 +-
src/mesa/drivers/dri/i965/brw_program.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/intel/compiler/brw_compiler.h
b/src/intel/compiler/b
On May 12, 2017 4:41:22 PM Anuj Phogat wrote:
Signed-off-by: Anuj Phogat
---
src/intel/tools/aubinator.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/src/intel/tools/aubinator.c b/src/intel/tools/aubinator.c
index 53b2a27..d15476d 100644
--- a/src/intel/tools/au
If everything truely is the same here, I see no reason why we should add a
gen10 version. I know this appears to contradict what I said before but
the difference is that this file is handwritten and not just a recompile of
an already multi-gen file. We don't, for instance have separate gen7 an
On May 12, 2017 4:41:26 PM Anuj Phogat wrote:
Signed-off-by: Anuj Phogat
Reviewed-by: Jason Ekstrand
---
src/intel/genxml/gen_bits_header.py | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/intel/genxml/gen_bits_header.py
b/src/intel/genxml/gen_bits_header.py
i
In an ideal world, I would prefer the compiler to be less strict for
dump things like that, but it might require more work, so your solution
is fine by me.
I can confirm this fixes Dying Light, not sure why we didn't find this
before (we probably followed a wrong path), but it's a nice find. T
On 05/12/2017 03:39 PM, John Brooks wrote:
Conditional on allow_glsl_builtin_redeclaration driconf option.
Signed-off-by: John Brooks
---
src/compiler/glsl/ast_to_hir.cpp | 16
src/compiler/glsl/glsl_parser_extras.cpp | 2 ++
src/compiler/glsl/glsl_parser_extras.
I would rename to allow_glsl_builtin_variable_redeclaration.
On 05/12/2017 03:39 PM, John Brooks wrote:
This option will allow GLSL builtins to be redeclared verbatim (e.g.
redeclaring "in int gl_VertexID" in a vertex shader). This is not strictly
valid and would normally fail to compile, but so
Mmh, this can still crash if location is < -1 or greater than the number
of uniforms. How about:
struct gl_uniform_storage *uni = NULL;
if (_mesa_is_no_error_enabled(ctx)) {
if (location >= 0 && location < shProg->NumUniformRemapTable)
uni = shProg->UniformRemapTable[location];
if (!uni)
On Sat, May 13, 2017 at 09:01:49AM +0200, Jan Beich wrote:
> Jonathan Gray writes:
>
> > On Sat, May 13, 2017 at 02:22:30AM +0200, Jan Beich wrote:
> >
> >> "int" isn't large enough and lack of builtins only manifests at link time.
> >> This was breaking build on FreeBSD 11.0 i386 with Clang 3.8.
Jan Beich writes:
> "int" isn't large enough and lack of builtins only manifests at link time.
> This was breaking build on FreeBSD 11.0 i386 with Clang 3.8.0.
>
> glsl/.libs/libstandalone.a(libmesautil_la-disk_cache.o): In function
> `disk_cache_remove':
> disk_cache.c:(.text+0x763): undefined
glsl/.libs/libstandalone.a(libmesautil_la-disk_cache.o): In function
`disk_cache_remove':
disk_cache.c:(.text+0x763): undefined reference to `__atomic_fetch_add_8'
glsl/.libs/libstandalone.a(libmesautil_la-disk_cache.o): In function
`cache_put':
disk_cache.c:(.text+0xabc): undefined reference to
u_atomic.c:67:1: error: no previous prototype for function
'__atomic_fetch_add_8'
[-Werror,-Wmissing-prototypes]
__atomic_fetch_add_8(uint64_t *ptr, uint64_t val, int memorder)
^
u_atomic.c:73:1: error: no previous prototype for function
'__atomic_fetch_sub_8'
[-Werror,-Wmissing-proto
Jonathan Gray writes:
> commit a6a38a038bd62e6d9558905f00bef81b5e7e6fcc
> Author: Grazvydas Ignotas
> Date: Fri Mar 31 01:26:25 2017 +0300
>
> util/u_atomic: provide 64bit atomics where they're missing
>
> attempts to handle powerpc like situations, though not sync
> builtins being missing
https://bugs.freedesktop.org/show_bug.cgi?id=100259
Laurent carlier changed:
What|Removed |Added
Status|RESOLVED|REOPENED
Resolution|FIXED
https://bugs.freedesktop.org/show_bug.cgi?id=101028
Michel Dänzer changed:
What|Removed |Added
Resolution|--- |NOTABUG
QA Contact|mesa-dev@lis
Jonathan Gray writes:
> On Sat, May 13, 2017 at 02:22:30AM +0200, Jan Beich wrote:
>
>> "int" isn't large enough and lack of builtins only manifests at link time.
>> This was breaking build on FreeBSD 11.0 i386 with Clang 3.8.0.
>>
>> glsl/.libs/libstandalone.a(libmesautil_la-disk_cache.o): In f
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