https://bugs.freedesktop.org/show_bug.cgi?id=68380
--- Comment #1 from Pekka Paalanen ---
I would assume this is no longer a problem after we started using file
descriptors instead of flink names in wl_drm?
Is it even worth fixing the flink path, considering it's insecure to begin
with?
--
You
https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=848895
there's a really strange and comprehensively cross-application
intermittent bug that's only occurring on opengl-based applications,
that's been introduced some time in the past year. to be absolutely
honest nobody's even sure it's actually
On 04/03/2017 11:09 PM, Rob Clark wrote:
> On Mon, Apr 3, 2017 at 4:57 PM, Rob Clark wrote:
>> On Mon, Apr 3, 2017 at 4:06 PM, Thomas Hellstrom
>> wrote:
>>> On 04/03/2017 07:33 PM, Thomas Hellstrom wrote:
On 04/03/2017 07:13 PM, Rob Clark wrote:
> On Mon, Apr 3, 2017 at 12:56 PM, Thoma
Just documenting these here, I'm out for a few days so might not get
time to fix them:
I've sent a patch for the first.
1. Small 1D mipmapped textures tests all failed after
Fixes: 36149998 amdgpu/addrlib: Rewrite tile mode optimization code
This looks like the 1D base level gets reduced to a li
On 04/04/17 13:54, Bartosz Tomczyk wrote:
Thank you Timothy.
Sorry about that, I'm still quite to new git/Mesa workflow. I will do
better in future.
Not a problem :) Thanks for the patches.
On Apr 4, 2017 01:54, "Timothy Arceri" mailto:tarc...@itsqueeze.com>> wrote:
I've pushed this.
Thank you Timothy.
Sorry about that, I'm still quite to new git/Mesa workflow. I will do
better in future.
On Apr 4, 2017 01:54, "Timothy Arceri" wrote:
I've pushed this. Thanks!
In future please add the version to the subject when sending new revisions.
You can do this with the -v option whe
From: Dave Airlie
The below commit caused a regression on radv with 1D textures,
this was because the base level for these small textures was
being degraded to a linear level due to this code. This stops
the degradation to linear when the pow2Pad bit it set (this
is set when there are miplevels).
On Mon, Apr 3, 2017 at 10:01 PM, Boyan Ding wrote:
> 2017-04-01 1:14 GMT+08:00 Nicolai Hähnle :
>> From: Ilia Mirkin
>>
>> v2 (Nicolai):
>> - BALLOT isn't per-channel
>> - expand the documentation (also for VOTE_*)
>>
>> Signed-off-by: Ilia Mirkin
>> Signed-off-by: Nicolai Hähnle
>> ---
>> src
2017-04-01 1:14 GMT+08:00 Nicolai Hähnle :
> From: Ilia Mirkin
>
> v2 (Nicolai):
> - BALLOT isn't per-channel
> - expand the documentation (also for VOTE_*)
>
> Signed-off-by: Ilia Mirkin
> Signed-off-by: Nicolai Hähnle
> ---
> src/gallium/auxiliary/tgsi/tgsi_info.c | 6 +--
> src/gallium/
On Mon 13 Mar 2017, Jason Ekstrand wrote:
> Things are about to get more complicated, especially as far as
> semaphores are concerned.
> ---
> src/intel/Makefile.sources| 1 +
> src/intel/vulkan/Makefile.sources | 86 +++
> src/intel/vulkan/anv_device.c | 440 ---
On Mon 13 Mar 2017, Jason Ekstrand wrote:
> v2 (chadv):
> - Rebase.
> - Fix vkGetPhysicalDeviceImageFormatProperties2KHR when
> handleType == 0.
> - Move handleType-independency comments out of handleType-switch, in
> vkGetPhysicalDeviceExternalBufferPropertiesKHX. Reduces diff in
>
On Mon, Apr 3, 2017 at 5:19 PM, Chad Versace
wrote:
> On Wed 15 Mar 2017, Jason Ekstrand wrote:
> > This cache allows us to easily ensure that we have a unique anv_bo for
> > each gem handle. We'll need this in order to support multiple-import of
> > memory objects and semaphores.
> >
> > v2 (Ja
On Wed 15 Mar 2017, Jason Ekstrand wrote:
> This cache allows us to easily ensure that we have a unique anv_bo for
> each gem handle. We'll need this in order to support multiple-import of
> memory objects and semaphores.
>
> v2 (Jason Ekstrand):
> - Reject BO imports if the size doesn't match t
On Mon 13 Mar 2017, Jason Ekstrand wrote:
> ---
> src/intel/vulkan/anv_device.c | 27 ---
> src/intel/vulkan/anv_image.c | 2 +-
> src/intel/vulkan/anv_intel.c | 14 ++
> src/intel/vulkan/anv_private.h | 4 +++-
> src/intel/vulkan/anv_wsi.c | 6 +++--
On Mon, Apr 3, 2017 at 4:43 PM, Ilia Mirkin wrote:
> On Mon, Apr 3, 2017 at 7:24 PM, Jason Ekstrand
> wrote:
> > ---
> > src/intel/compiler/brw_vec4_nir.cpp | 4
> > 1 file changed, 4 insertions(+)
> >
> > diff --git a/src/intel/compiler/brw_vec4_nir.cpp
> b/src/intel/compiler/brw_vec4_nir
I've pushed this. Thanks!
In future please add the version to the subject when sending new
revisions. You can do this with the -v option when using git send-email
e.g -v2 will result in [PATCH v2]
Also please add changes to the patch since v1 in the commit message. e.g.
V2: set batch->used =
On Mon, Apr 3, 2017 at 7:24 PM, Jason Ekstrand wrote:
> ---
> src/intel/compiler/brw_vec4_nir.cpp | 4
> 1 file changed, 4 insertions(+)
>
> diff --git a/src/intel/compiler/brw_vec4_nir.cpp
> b/src/intel/compiler/brw_vec4_nir.cpp
> index 2384265..613c695 100644
> --- a/src/intel/compiler/br
Thank you. These coverity warnings have been coming back repeatedly it seems.
Reviewed-by: Matt Turner
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On 04/04/17 05:12, Bartosz Tomczyk wrote:
Address sanitizer reports lot of misaligned access:
SUMMARY: AddressSanitizer: undefined-behavior main/marshal.c:276:31 in
main/marshal.c:276:31: runtime error: load of misaligned address 0x631000104866
for type
'const GLuint' (aka 'const unsigned int')
On Mon, Apr 3, 2017 at 4:26 PM, Chad Versace
wrote:
> On Wed 15 Mar 2017, Jason Ekstrand wrote:
> > This cache allows us to easily ensure that we have a unique anv_bo for
> > each gem handle. We'll need this in order to support multiple-import of
> > memory objects and semaphores.
> >
> > v2 (Ja
On Wed 15 Mar 2017, Jason Ekstrand wrote:
> This cache allows us to easily ensure that we have a unique anv_bo for
> each gem handle. We'll need this in order to support multiple-import of
> memory objects and semaphores.
>
> v2 (Jason Ekstrand):
> - Reject BO imports if the size doesn't match t
On Mon, Apr 3, 2017 at 3:45 PM, Chad Versace
wrote:
> On Mon 03 Apr 2017, Jason Ekstrand wrote:
> > On Mon, Apr 3, 2017 at 12:31 PM, Chad Versace
> > wrote:
> >
> > > On Fri 31 Mar 2017, Chad Versace wrote:
> > > > On Wed 15 Mar 2017, Jason Ekstrand wrote:
> > > > > This cache allows us to easil
---
src/intel/compiler/brw_vec4_nir.cpp | 4
1 file changed, 4 insertions(+)
diff --git a/src/intel/compiler/brw_vec4_nir.cpp
b/src/intel/compiler/brw_vec4_nir.cpp
index 2384265..613c695 100644
--- a/src/intel/compiler/brw_vec4_nir.cpp
+++ b/src/intel/compiler/brw_vec4_nir.cpp
@@ -1310,6 +1
Decoding with aubinator encountered a command of 0x. With the
previous code, it caused aubinator to jump 255 + 2 dwords to start
decoding again.
Instead we can attempt to detect the known instruction formats. If the
format is not recognized, then we can advance just 1 dword.
Signed-off-by
Pushed, Thanks!
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Signed-off-by: Jordan Justen
---
src/intel/tools/aubinator.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/intel/tools/aubinator.c b/src/intel/tools/aubinator.c
index a64bce7a536..0d33c392384 100644
--- a/src/intel/tools/aubinator.c
+++ b/src/intel/tools/aubinator.c
@
From BDW PRM, Volume 6: Command Stream Programming, 'Render Command
Header Format'.
Signed-off-by: Jordan Justen
---
src/intel/common/gen_decoder.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/src/intel/common/gen_decoder.c b/src/intel/common/gen_decoder.c
in
Hi Tomasz,
2017-04-03 10:00 GMT+02:00 Tomasz Figa :
> Hi Mauro,
>
> On Mon, Apr 3, 2017 at 2:48 AM, Mauro Rossi wrote:
> >
> >
> > 2017-03-31 13:05 GMT+02:00 Tapani Pälli :
> >>
> >>
> >>
> >> On 03/31/2017 10:12 AM, Tapani Pälli wrote:
> >>>
> >>>
> >>>
> >>> On 03/31/2017 09:06 AM, Tapani Päll
On Mon 03 Apr 2017, Jason Ekstrand wrote:
> On Mon, Apr 3, 2017 at 12:31 PM, Chad Versace
> wrote:
>
> > On Fri 31 Mar 2017, Chad Versace wrote:
> > > On Wed 15 Mar 2017, Jason Ekstrand wrote:
> > > > This cache allows us to easily ensure that we have a unique anv_bo for
> > > > each gem handle.
Am 03.04.2017 um 17:11 schrieb Alex Deucher:
> On Sun, Apr 2, 2017 at 2:00 PM, Marek Olšák wrote:
>> From: Marek Olšák
>>
>> Also:
>>
>> pipe_transfer: 48 -> 40 bytes.
>> pipe_blit_info = 176 -> 160 bytes.
>> ---
>> src/gallium/include/pipe/p_state.h | 8
>> 1 file changed, 4 insertions
On Mon, Apr 3, 2017 at 1:37 PM, Mark Janes wrote:
>
> This commit appears to intermittently provoke gpu hangs on 32-bit Intel
> systems when running
>
> piglit.shaders.glsl-max-varyings >max_varying_components
>
> Since the behavior is intermittent, I may have identified the wrong
> patch. Please
On Mon, Apr 3, 2017 at 4:57 PM, Rob Clark wrote:
> On Mon, Apr 3, 2017 at 4:06 PM, Thomas Hellstrom
> wrote:
>> On 04/03/2017 07:33 PM, Thomas Hellstrom wrote:
>>> On 04/03/2017 07:13 PM, Rob Clark wrote:
On Mon, Apr 3, 2017 at 12:56 PM, Thomas Hellstrom
wrote:
> Hi, Rob,
>
>
On Mon, Apr 3, 2017 at 12:31 PM, Chad Versace
wrote:
> On Fri 31 Mar 2017, Chad Versace wrote:
> > On Wed 15 Mar 2017, Jason Ekstrand wrote:
> > > This cache allows us to easily ensure that we have a unique anv_bo for
> > > each gem handle. We'll need this in order to support multiple-import
> o
On Mon, Apr 3, 2017 at 4:06 PM, Thomas Hellstrom wrote:
> On 04/03/2017 07:33 PM, Thomas Hellstrom wrote:
>> On 04/03/2017 07:13 PM, Rob Clark wrote:
>>> On Mon, Apr 3, 2017 at 12:56 PM, Thomas Hellstrom
>>> wrote:
Hi, Rob,
On 03/24/2017 10:21 PM, Rob Clark wrote:
> It's kinda
This commit appears to intermittently provoke gpu hangs on 32-bit Intel
systems when running
piglit.shaders.glsl-max-varyings >max_varying_components
Since the behavior is intermittent, I may have identified the wrong
patch. Please let me know if this patch seems unlikely to affect the
test.
Ma
Reviewed-by: Jason Ekstrand
On April 3, 2017 12:36:16 PM Bas Nieuwenhuizen wrote:
Just enabling the driver-independent implementation that Jason did.
Signed-off-by: Bas Nieuwenhuizen
---
src/amd/vulkan/radv_device.c | 4
src/amd/vulkan/radv_entrypoints_gen.py | 1 +
src/a
On Mon, Apr 3, 2017 at 4:06 PM, Thomas Hellstrom wrote:
> On 04/03/2017 07:33 PM, Thomas Hellstrom wrote:
>> On 04/03/2017 07:13 PM, Rob Clark wrote:
>>> On Mon, Apr 3, 2017 at 12:56 PM, Thomas Hellstrom
>>> wrote:
Hi, Rob,
On 03/24/2017 10:21 PM, Rob Clark wrote:
> It's kinda
This is pretty much the same tool as what i-g-t has, only with a more
fancy decoding of the instructions/registers. It also doesn't support
anything before gen4.
v2 (from Matt): Drop authors
Remove undefined automake variable
v3: Fix incorrect offsets for dword > 1 (Jordan)
Signe
On 04/03/2017 07:33 PM, Thomas Hellstrom wrote:
> On 04/03/2017 07:13 PM, Rob Clark wrote:
>> On Mon, Apr 3, 2017 at 12:56 PM, Thomas Hellstrom
>> wrote:
>>> Hi, Rob,
>>>
>>> On 03/24/2017 10:21 PM, Rob Clark wrote:
It's kinda sad that (a) we don't have debug_backtrace support on !X86
a
On Mar 30, 2017 16:16, "Lionel Landwerlin"
wrote:
While exercising reading report with moderate load, we might have to
wait for all the reports to land in the OA buffer, otherwise we might
miss some reports. That means we need to keep on reading the OA stream
until the last report we read has a t
Series is
Reviewed-by: Bas Nieuwenhuizen
Not really a fan of yet another flag in the command buffer, but not
sure what would be the best solution.
On Mon, Apr 3, 2017 at 5:44 AM, Dave Airlie wrote:
> From: Dave Airlie
>
> The current code was broken, and I decided to redesign it instead.
>
>
Just enabling the driver-independent implementation that Jason did.
Signed-off-by: Bas Nieuwenhuizen
---
src/amd/vulkan/radv_device.c | 4
src/amd/vulkan/radv_entrypoints_gen.py | 1 +
src/amd/vulkan/radv_wsi.c | 11 ++-
3 files changed, 15 insertions(+), 1
On Fri 31 Mar 2017, Chad Versace wrote:
> On Wed 15 Mar 2017, Jason Ekstrand wrote:
> > This cache allows us to easily ensure that we have a unique anv_bo for
> > each gem handle. We'll need this in order to support multiple-import of
> > memory objects and semaphores.
> >
> > v2 (Jason Ekstrand)
Series is:
Reviewed-by: Bas Nieuwenhuizen
On Mon, Apr 3, 2017 at 5:46 AM, Dave Airlie wrote:
> From: Dave Airlie
>
> This fixes:
> dEQP-VK.glsl.texture_functions.texture.samplercubearray*
>
> Signed-off-by: Dave Airlie
> ---
> src/amd/common/ac_nir_to_llvm.c | 6 +-
> 1 file changed, 5 i
---
src/mesa/main/glthread.c | 15 +--
1 file changed, 9 insertions(+), 6 deletions(-)
diff --git a/src/mesa/main/glthread.c b/src/mesa/main/glthread.c
index 3f07c420d4..c4d3f4a434 100644
--- a/src/mesa/main/glthread.c
+++ b/src/mesa/main/glthread.c
@@ -53,7 +53,8 @@ glthread_allocate
Reviewed-by: Bas Nieuwenhuizen
On Mon, Apr 3, 2017 at 8:57 PM, Dave Airlie wrote:
> From: Dave Airlie
>
> Get rid of usage of SI.vs.load.input.
>
> Signed-off-by: Dave Airlie
> ---
> src/amd/common/ac_nir_to_llvm.c | 13 +
> 1 file changed, 5 insertions(+), 8 deletions(-)
>
> diff
Address sanitizer reports lot of misaligned access:
SUMMARY: AddressSanitizer: undefined-behavior main/marshal.c:276:31 in
main/marshal.c:276:31: runtime error: load of misaligned address 0x631000104866
for type
'const GLuint' (aka 'const unsigned int'), which requires 4 byte alignment
0x631000104
On 03.04.2017 20:53, Bartosz Tomczyk wrote:
Actually, I can just set only batch->used to 0, but it seems to error
prone. When someone adds some fields to batch struct, it will be easy to
miss that it should be initialized in glthread_unmarshal_batch.
Better to have it fail early and loudly with
From: Dave Airlie
Get rid of usage of SI.vs.load.input.
Signed-off-by: Dave Airlie
---
src/amd/common/ac_nir_to_llvm.c | 13 +
1 file changed, 5 insertions(+), 8 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 520e4cf..da38331 1006
Actually, I can just set only batch->used to 0, but it seems to error
prone. When someone adds some fields to batch struct, it will be easy to
miss that it should be initialized in glthread_unmarshal_batch.
Anyway I can change it if you want to.
On Mon, Apr 3, 2017 at 8:42 PM, Nicolai Hähnle wro
On 3 April 2017 at 19:52, Marek Olšák wrote:
> From: Marek Olšák
radv uses i32zero and i32one, it might be nice to be consistent, but I
don't mind which way.
Dave.
>
> ---
> src/gallium/drivers/radeonsi/si_shader.c | 88
> ++
> .../drivers/radeonsi/si_shader_tgsi
On 2 April 2017 at 21:48, Rhys Kidd wrote:
> Per comments by Travis-CI, the apt addon is only really needed for the
> container-based Precise builds, as they don't yet support Trusty on that
> platform.
>
> Mesa currently uses Trusty fully-virtualized environment (due to sudo:
> required).
>
> S
Hi Rob,
On 24 March 2017 at 21:21, Rob Clark wrote:
> It's kinda sad that (a) we don't have debug_backtrace support on !X86
> and that (b) we re-invent our own crude backtrace support in the first
> place. If available, use libunwind instead. The backtrace format is
> based on what xserver and
On 03.04.2017 20:38, Bartosz Tomczyk wrote:
---
src/mesa/main/glthread.c | 15 +--
1 file changed, 9 insertions(+), 6 deletions(-)
diff --git a/src/mesa/main/glthread.c b/src/mesa/main/glthread.c
index 3f07c420d4..aa14292e59 100644
--- a/src/mesa/main/glthread.c
+++ b/src/mesa/main/
Both are
Reviewed-by: Matt Turner
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---
src/mesa/main/glthread.c | 15 +--
1 file changed, 9 insertions(+), 6 deletions(-)
diff --git a/src/mesa/main/glthread.c b/src/mesa/main/glthread.c
index 3f07c420d4..aa14292e59 100644
--- a/src/mesa/main/glthread.c
+++ b/src/mesa/main/glthread.c
@@ -53,7 +53,8 @@ glthread_allocate
Reviewed-by: Emil Velikov
-Emil
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On 3 April 2017 at 17:09, Brian Paul wrote:
> To silence
> C:\Users\Brian\projects\mesa\src\util/u_vector.h(41) : warning C4146: unary
> minus operator applied to unsigned type, result still unsigned
For the series:
Reviewed-by: Emil Velikov
-Emil
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Reviewed-by: Bas Nieuwenhuizen
On Mon, Apr 3, 2017 at 7:17 AM, Dave Airlie wrote:
> From: Dave Airlie
>
> This fixes an old bug that seems to get triggered by
> dEQP-VK.memory.requirements.image.sparse_tiling_optimal
>
> We return early when allocating S8_UINT due to there being
> no color or d
On Thu, Mar 30, 2017 at 3:47 PM, Matt Turner wrote:
> On Thu, Mar 30, 2017 at 3:26 PM, Grazvydas Ignotas
wrote:
>> There are still some distributions trying to support unfortunate people
>> with old or exotic CPUs that don't have 64bit atomic operations. When
>> compiling for such a machine, gcc
We supported more generally. Decreased the dynamic buffers though, as
we only support 16 for uniform+storage.
Signed-off-by: Bas Nieuwenhuizen
---
src/amd/vulkan/radv_device.c | 28 ++--
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/src/amd/vulkan/radv_d
---
src/compiler/glsl/blob.h | 11 +++
src/compiler/glsl/shader_cache.cpp | 2 +-
src/compiler/glsl/tests/blob_test.c | 8
src/mesa/state_tracker/st_shader_cache.c | 2 +-
4 files changed, 17 insertions(+), 6 deletions(-)
diff --git a/src/compiler/gl
On 04/03/2017 07:13 PM, Rob Clark wrote:
> On Mon, Apr 3, 2017 at 12:56 PM, Thomas Hellstrom
> wrote:
>> Hi, Rob,
>>
>> On 03/24/2017 10:21 PM, Rob Clark wrote:
>>> It's kinda sad that (a) we don't have debug_backtrace support on !X86
>>> and that (b) we re-invent our own crude backtrace support
On Mon, Apr 3, 2017 at 10:13 AM, Rob Clark wrote:
> On Mon, Apr 3, 2017 at 12:56 PM, Thomas Hellstrom
> wrote:
>> Hi, Rob,
>>
>> On 03/24/2017 10:21 PM, Rob Clark wrote:
>>> It's kinda sad that (a) we don't have debug_backtrace support on !X86
>>> and that (b) we re-invent our own crude backtrac
On Mon, Apr 3, 2017 at 12:56 PM, Thomas Hellstrom wrote:
> Hi, Rob,
>
> On 03/24/2017 10:21 PM, Rob Clark wrote:
>> It's kinda sad that (a) we don't have debug_backtrace support on !X86
>> and that (b) we re-invent our own crude backtrace support in the first
>> place. If available, use libunwind
Hi, Rob,
On 03/24/2017 10:21 PM, Rob Clark wrote:
> It's kinda sad that (a) we don't have debug_backtrace support on !X86
> and that (b) we re-invent our own crude backtrace support in the first
> place. If available, use libunwind instead. The backtrace format is
> based on what xserver and wes
On Mon, Apr 3, 2017 at 7:44 AM, Jason Ekstrand wrote:
> On Mon, Apr 3, 2017 at 5:02 AM, Juan A. Suarez Romero > wrote:
>
>> On Wed, 2017-03-29 at 12:06 -0700, Jason Ekstrand wrote:
>> > Looking over the patch, I think I've convinced myself that it's
>> correct. (I honestly wasn't expecting to c
On Mon, Apr 3, 2017 at 9:40 AM, Kristian Høgsberg
wrote:
> On Wed, Mar 29, 2017 at 12:06 PM, Jason Ekstrand
> wrote:
> > Looking over the patch, I think I've convinced myself that it's
> correct. (I
> > honestly wasn't expecting to come to that conclusion without more
> > iteration.) That said
Replace "nore" by "more".
---
bin/get-fixes-pick-list.sh | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/bin/get-fixes-pick-list.sh b/bin/get-fixes-pick-list.sh
index 59bcae4..75242a2 100755
--- a/bin/get-fixes-pick-list.sh
+++ b/bin/get-fixes-pick-list.sh
@@ -27,7 +27,7 @@ do
On Apr 3, 2017 5:11 PM, "Alex Deucher" wrote:
On Sun, Apr 2, 2017 at 2:00 PM, Marek Olšák wrote:
> From: Marek Olšák
>
> Also:
>
> pipe_transfer: 48 -> 40 bytes.
> pipe_blit_info = 176 -> 160 bytes.
> ---
> src/gallium/include/pipe/p_state.h | 8
> 1 file changed, 4 insertions(+), 4 d
On Wed, Mar 29, 2017 at 12:06 PM, Jason Ekstrand wrote:
> Looking over the patch, I think I've convinced myself that it's correct. (I
> honestly wasn't expecting to come to that conclusion without more
> iteration.) That said, this raises some interesting questions. I added
> Kristian to the Cc
https://bugs.freedesktop.org/show_bug.cgi?id=100259
--- Comment #14 from Emil Velikov ---
Ouch that is some nasty bug in Slackware packaging.
Note you want /usr/local/ and /usr/ in the same order across
--with-pkg-config-dir and --with-system-libdir.
--
You are receiving this mail because:
You
On Apr 3, 2017 4:04 PM, "Brian Paul" wrote:
I need to test this series on Windows and with MinGW first. I'm worried
about enums with bitfields.
Hopefully it'll work. Enums without bitfields always occupy 4 bytes. If
bitfields don't work with those, we'll have to stop using enums in these
cases
On 03/04/17 17:09, Brian Paul wrote:
Otherwise, we were getting the definition for 'inline' by chance from
some other preceeding #include.
---
src/util/list.h | 1 +
src/util/mesa-sha1.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/src/util/list.h b/src/util/list.h
index 07eb9f3..6
On Mon, Apr 3, 2017 at 8:55 AM, Nanley Chery wrote:
> On Mon, Apr 03, 2017 at 08:02:54AM +0200, Iago Toral wrote:
> > Can anyone review this one?
> >
> > On Wed, 2017-03-29 at 08:58 +0200, Iago Toral Quiroga wrote:
> > > Writing and testing are two different things and they can be set
> > > separ
To silence
C:\Users\Brian\projects\mesa\src\util/u_vector.h(41) : warning C4146: unary
minus operator applied to unsigned type, result still unsigned
---
src/util/u_vector.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/util/u_vector.h b/src/util/u_vector.h
index f97a8b4.
To follow the convention of other header include guards.
---
src/util/mesa-sha1.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/util/mesa-sha1.h b/src/util/mesa-sha1.h
index a81aba9..d3f7aff 100644
--- a/src/util/mesa-sha1.h
+++ b/src/util/mesa-sha1.h
@@ -20,8 +20,8 @
Otherwise, we were getting the definition for 'inline' by chance from
some other preceeding #include.
---
src/util/list.h | 1 +
src/util/mesa-sha1.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/src/util/list.h b/src/util/list.h
index 07eb9f3..6edb750 100644
--- a/src/util/list.h
+++
On Wed, Mar 22, 2017 at 03:13:56PM -0700, Jason Ekstrand wrote:
> That pass hasn't existed since dd4db84640bbb694f180dd50850c3388f67228be
> but the prototype stuck around for no reason.
> ---
> src/intel/vulkan/anv_nir.h | 3 ---
> 1 file changed, 3 deletions(-)
>
This patch is
Reviewed-by: Nanl
Signed-off-by: Karol Herbst
---
src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
index 4c92a1efb5.
Signed-off-by: Karol Herbst
---
src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 6 ++
1 file changed, 6 insertions(+)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
index bd60a84998..0de84fe9fc 1006
With the shader cache, compilation time matters less.
As a side effect we can write more optimizations to produce better optimized
code.
total instructions in shared programs : 3931743 -> 3917512 (-0.36%)
total gprs used in shared programs: 481460 -> 481680 (0.05%)
total local used in shared
Slowly we are getting to the point, that we miss enough optimization
opportunities as the result of our own passes.
For this we need to fix AlgebraicOpt to be able to handle mods on sources
without creating new issues.
The last patch enables looping opts.
v2: update commit author
Karol Herbst (
Slowly we are getting to the point, that we miss enough optimization
opportunities as the result of our own passes.
For this we need to fix AlgebraicOpt to be able to handle mods on sources
without creating new issues.
The last patch enables looping opts.
Karol Herbst (3):
nv50/ir: fix Algebra
Signed-off-by: Karol Herbst
---
src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 6 ++
1 file changed, 6 insertions(+)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
index bd60a84998..0de84fe9fc 1006
From: Karol Herbst
With the shader cache, compilation time matters less.
As a side effect we can write more optimizations to produce better optimized
code.
total instructions in shared programs : 3931743 -> 3917512 (-0.36%)
total gprs used in shared programs: 481460 -> 481680 (0.05%)
total
From: Karol Herbst
Signed-off-by: Karol Herbst
---
src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.
On Mon, Apr 03, 2017 at 08:02:54AM +0200, Iago Toral wrote:
> Can anyone review this one?
>
> On Wed, 2017-03-29 at 08:58 +0200, Iago Toral Quiroga wrote:
> > Writing and testing are two different things and they can be set
> > separately
> > by the application. If an application wants to record d
On Sun, Apr 2, 2017 at 2:00 PM, Marek Olšák wrote:
> From: Marek Olšák
>
> Also:
>
> pipe_transfer: 48 -> 40 bytes.
> pipe_blit_info = 176 -> 160 bytes.
> ---
> src/gallium/include/pipe/p_state.h | 8
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/src/gallium/include
On 04/02/2017 12:00 PM, Marek Olšák wrote:
From: Marek Olšák
Also:
pipe_transfer: 48 -> 40 bytes.
pipe_blit_info = 176 -> 160 bytes.
---
src/gallium/include/pipe/p_state.h | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/src/gallium/include/pipe/p_state.h
b/src/g
Hi,
On 3 April 2017 at 15:45, Jason Ekstrand wrote:
> On Mon, Apr 3, 2017 at 1:54 AM, Daniel Stone wrote:
>> Very scrupulous version check, but you forgot to actually use
>> wl_surface_damage_buffer. ;)
>
> Gah!!! I'll get that fixed. Assuming that change, now that you've looked
> at it all, w
Sorry. I thought I had.
Reviewed-by: Jason Ekstrand
On Sun, Apr 2, 2017 at 11:02 PM, Iago Toral wrote:
> Can anyone review this one?
>
> On Wed, 2017-03-29 at 08:58 +0200, Iago Toral Quiroga wrote:
> > Writing and testing are two different things and they can be set
> > separately
> > by the
On Mon, Apr 3, 2017 at 1:54 AM, Daniel Stone wrote:
> Hi Jason,
>
> On 1 April 2017 at 06:37, Jason Ekstrand wrote:
> > @@ -594,7 +595,19 @@ wsi_wl_swapchain_queue_present(struct
> wsi_swapchain *wsi_chain,
> >
> > assert(image_index < chain->base.image_count);
> > wl_surface_attach(chai
On Mon, Apr 3, 2017 at 5:02 AM, Juan A. Suarez Romero
wrote:
> On Wed, 2017-03-29 at 12:06 -0700, Jason Ekstrand wrote:
> > Looking over the patch, I think I've convinced myself that it's
> correct. (I honestly wasn't expecting to come to that conclusion without
> more iteration.) That said, th
I need to test this series on Windows and with MinGW first. I'm worried
about enums with bitfields.
-Brian
On Mon, Apr 3, 2017 at 2:46 AM, Nicolai Hähnle wrote:
> Some of these are a bit subtle, but I think they're fine. Series is:
>
> Reviewed-by: Nicolai Hähnle
>
>
> On 02.04.2017 20:00, M
On Wed, 2017-03-29 at 12:06 -0700, Jason Ekstrand wrote:
> Looking over the patch, I think I've convinced myself that it's correct. (I
> honestly wasn't expecting to come to that conclusion without more iteration.)
> That said, this raises some interesting questions. I added Kristian to the
>
v2 (Andreas Boll):
- Mark GL 4.1 as supported by i965/gen7+
- Mark GL_ARB_shader_precision as supported by i965/gen7+
- Update release notes
---
docs/features.txt | 4 ++--
docs/relnotes/17.1.0.html | 3 +++
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/docs/features.txt b
https://bugs.freedesktop.org/show_bug.cgi?id=100402
Vedran Miletić changed:
What|Removed |Added
CC||ved...@miletic.net
--
You are receivi
Am 03.04.2017 um 12:08 schrieb Marek Olšák:
From: Marek Olšák
It silences the following radeonsi LLVM warning due to a previous
commit adding an LLVM workaround:
"mesa: for the -simplifycfg-sink-common option: may only occur zero or one
times!"
Cc: 17.0
Reviewed-by: Christian König
For the series:
Reviewed-by: Marek Olšák
Marek
On Sun, Apr 2, 2017 at 7:33 PM, Constantine Kharlamov
wrote:
> Specifically, non-line primitives skipped, and defaulting to reset on
> each packet.
>
> The skip of non-line primitives saves ≈110 resetting of
> PA_SC_LINE_STIPPLE register per frame
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