ISTR having suggested this during review of the recent FP64 changes to
the SIMD lowering pass, but it doesn't look like it was taken into
account in the end. Using the fs_reg::component_size helper instead
of this open-coded variant makes sure that the stride is taken into
account correctly. Fixe
Thanks for cleaning this up. Series is
Reviewed-by: Jason Ekstrand
Cc: "12.0"
On Jun 10, 2016 8:02 PM, "Nanley Chery" wrote:
> From: Nanley Chery
>
> Add guards to prevent dereferencing NULL dynamic pipeline state. Asserts
> of pCreateInfo members are moved to the earliest points at which th
From: Nanley Chery
Add guards to prevent dereferencing NULL dynamic pipeline state. Asserts
of pCreateInfo members are moved to the earliest points at which they
should not be NULL.
This fixes a segfault seen in the McNopper demo, VKTS_Example09.
v3 (Jason Ekstrand):
- Fix disabled rasteriza
From: Nanley Chery
To reduce confusion, clarify that the state being copied is not dynamic.
This agrees with the Vulkan spec's usage of the term. Various sections
specify that the various pipeline state which have VkDynamicState enums
(e.g. viewport, scissor, etc.) may or may not be dynamic.
Si
On Fri, Jun 10, 2016 at 06:19:12PM -0700, Jason Ekstrand wrote:
> On Fri, Jun 10, 2016 at 6:03 PM, Nanley Chery wrote:
>
> > From: Nanley Chery
> >
> > Add guards to prevent dereferencing NULL dynamic pipeline state. Asserts
> > of pCreateInfo members are moved to the earliest points at which th
On Fri, Jun 10, 2016 at 6:03 PM, Nanley Chery wrote:
> From: Nanley Chery
>
> Add guards to prevent dereferencing NULL dynamic pipeline state. Asserts
> of pCreateInfo members are moved to the earliest points at which they
> should not be NULL.
>
> This fixes a segfault seen in the McNopper demo
From: Nanley Chery
Add guards to prevent dereferencing NULL dynamic pipeline state. Asserts
of pCreateInfo members are moved to the earliest points at which they
should not be NULL.
This fixes a segfault seen in the McNopper demo, VKTS_Example09.
v2: Fix disabled rasterization check (Jason Ekst
From: Nanley Chery
To reduce confusion, clarify that the state being copied is not dynamic.
This agrees with the Vulkan spec's usage of the term. Various sections
specify that the various pipeline state which have VkDynamicState enums
(e.g. viewport, scissor, etc.) may or may not be dynamic.
Si
Signed-off-by: Ilia Mirkin
Reviewed-by: Brian Paul (v1)
---
v1 -> v2:
- rename EnabledRects -> NumWindowRects
- add dlist support
src/mesa/main/attrib.c | 7 ++
src/mesa/main/config.h | 7 --
src/mesa/main/dlist.c| 36 ++
On Fri, Jun 10, 2016 at 5:59 AM, Nicolai Hähnle wrote:
> On 10.06.2016 05:48, Ilia Mirkin wrote:
>>
>> This was fixed in revision 47 of the ARB_dsa spec in Oct 22, 2015. Since
>> it's horrible to have differing APIs across library versions, we should
>> attempt to minimize the impact by backportin
Previously used core-avx-i was for ivybridge;
corei7-avx allows sandybridge.
v2: move flag check up to configure.ac; attempt to use gcc 4.9+
documented flags instead of the older architecture naming.
---
configure.ac| 33 +
src/gallium/drive
On Fri, Jun 10, 2016 at 04:33:06PM -0700, Jason Ekstrand wrote:
> On Fri, Jun 10, 2016 at 4:12 PM, Nanley Chery wrote:
>
> > From: Nanley Chery
> >
> > Add guards to prevent dereferencing NULL dynamic pipeline state.
> >
> > This fixes a segfault seen in the McNopper demo, VKTS_Example09.
> >
>
On Fri, Jun 10, 2016 at 4:12 PM, Nanley Chery wrote:
> From: Nanley Chery
>
> Add guards to prevent dereferencing NULL dynamic pipeline state.
>
> This fixes a segfault seen in the McNopper demo, VKTS_Example09.
>
> Signed-off-by: Nanley Chery
> Cc: "12.0"
> ---
> src/intel/vulkan/anv_pipelin
From: Roland Scheidegger
The gallium contract would be that bind flags must indicate all possible
bindings a resource might get used, but fact is the mesa state tracker does
not set bind flags correctly, and this is more or less unfixable due to GL.
This caused a bug with piglit arb_uniform_buff
From: Nanley Chery
To reduce confusion, clarify that the state being copied is not dynamic.
This agrees with the Vulkan spec's usage of the term. Various sections
specify that the various pipeline state which have VkDynamicState enums
(e.g. viewport, scissor, etc.) may or may not be dynamic.
Si
From: Nanley Chery
This is useful for the next commit which will use this information.
Signed-off-by: Nanley Chery
Cc: "12.0"
---
src/intel/vulkan/anv_pipeline.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipe
From: Nanley Chery
Add guards to prevent dereferencing NULL dynamic pipeline state.
This fixes a segfault seen in the McNopper demo, VKTS_Example09.
Signed-off-by: Nanley Chery
Cc: "12.0"
---
src/intel/vulkan/anv_pipeline.c | 51 ++---
1 file changed, 37 i
---
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 27 ++-
1 file changed, 18 insertions(+), 9 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index 1262977..99709a6 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_ni
---
src/mesa/drivers/dri/i965/intel_extensions.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c
b/src/mesa/drivers/dri/i965/intel_extensions.c
index 5be4787..d61692d 100644
--- a/src/mesa/drivers/dri/i965/intel_extensions.c
+++ b/src/mesa/drivers/
---
src/compiler/nir_types.cpp | 6 ++
src/compiler/nir_types.h | 1 +
2 files changed, 7 insertions(+)
diff --git a/src/compiler/nir_types.cpp b/src/compiler/nir_types.cpp
index 4ea7a2f..2d46ed2 100644
--- a/src/compiler/nir_types.cpp
+++ b/src/compiler/nir_types.cpp
@@ -251,6 +251,12 @@ g
---
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index 2890f74..1262977 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
+++ b/src/mesa/dri
Here we add a new param to the type_size functions in order to pass
in the size of a varying once packing is taken into account.
---
src/compiler/nir/nir.h | 6 +++--
src/compiler/nir/nir_lower_io.c| 37 +-
src/mesa/drivers/dri/i965/
---
docs/GL3.txt | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/docs/GL3.txt b/docs/GL3.txt
index 0204695..b0573c8 100644
--- a/docs/GL3.txt
+++ b/docs/GL3.txt
@@ -193,11 +193,11 @@ GL 4.4, GLSL 4.40:
GL_MAX_VERTEX_ATTRIB_STRIDE DONE (all drive
---
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index ccacfb5..dbb3638 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
+++ b/src/m
---
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 38 +++-
1 file changed, 33 insertions(+), 5 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index e3db675..ccacfb5 100644
--- a/src/mesa/drivers/dri/i965/brw_
---
src/compiler/glsl/link_varyings.cpp | 16 +---
src/compiler/nir/nir_lower_io.c | 16
2 files changed, 29 insertions(+), 3 deletions(-)
diff --git a/src/compiler/glsl/link_varyings.cpp
b/src/compiler/glsl/link_varyings.cpp
index 22dc2d8..7c0d93a 100644
--- a/s
This offset is used for packing.
---
src/compiler/nir/nir.h| 6 ++
src/compiler/nir/nir_intrinsics.h | 8
src/compiler/nir/nir_lower_io.c | 8
src/compiler/nir/nir_print.c | 3 +++
4 files changed, 21 insertions(+), 4 deletions(-)
diff --git a/src/compiler
---
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 33
1 file changed, 29 insertions(+), 4 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index dbb3638..95d5802 100644
--- a/src/mesa/drivers/dri/i965/brw_
---
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 18 +++---
1 file changed, 15 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index 95d5802..2890f74 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
+++
This will be used to store the total number of components used at this location
when packing via ARB_enhanced_layouts.
---
src/compiler/glsl/glsl_to_nir.cpp | 1 +
src/compiler/glsl/ir.h | 5 +++
src/compiler/glsl/link_varyings.cpp | 74 -
src/c
---
src/mesa/drivers/dri/i965/brw_fs.h | 2 +-
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 22 ++
2 files changed, 19 insertions(+), 5 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h
b/src/mesa/drivers/dri/i965/brw_fs.h
index fc85206..0c72802 100644
--- a/s
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 20
src/mesa/drivers/dri/i965/brw_fs.h | 5 +++--
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 29 -
3 files changed, 35 insertions(+), 19 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_f
Since this extension allows more than one varying to share a single
location we can't just count the number of slots a varying takes and
add it to the total.
Instead we now reuse the reserved varyings bitfield to determine how
many slots are reserved for explicit locations instead.
---
src/compil
V2:
- validation fixes patches 1-2
- added support for packing doubles now that explicit location
fixes have landed.
- fix various issues with intel debug output with new COMPONENT const index.
This adds component packing support for Gen8+.
Series can be found in my component_packing_backend4 br
---
src/compiler/nir/nir.h| 4 ++--
src/compiler/nir/nir_lower_io.c | 28 ++--
src/mesa/drivers/dri/i965/brw_nir.c | 8 +---
src/mesa/drivers/dri/i965/brw_program.c | 4 ++--
src/mesa/state_tracker/st_glsl_to_nir.cpp | 3 +++
5
This changes make sure to use the type with arrays removed
when checking if type is a double.
The check for the end of the first slot of a multi-slot double
is also fixed by bumping the check to 4 rather than 3.
Previously we were we not reserving the last component.
---
src/compiler/glsl/link_va
Am 10.06.2016 um 20:39 schrieb Alan Thomas:
> Thanks so much for the quick and thorough reply.
>
> Also, texture filtering is very slow compared to gpu hw already (in
> comparison to shader arithmetic), so most likely the performance hit
> will be quite large, making this only really u
Pulling DF inputs from the URB generates messages like:
send(8) g23<1>DFg1<8,8,1>UD
urb 3 SIMD8 read mlen 1 rlen 2 { align1 1Q };
which makes the simulator angry:
"For 64-bit Align1 operation or multiplication of dwords in CHV,
source horizontal
From: Samuel Iglesias Gonsálvez
Pulling DF uniforms from pull constant buffer generates messages like:
send(4) g12<1>DFg12<0,1,0>F
sampler ld SIMD4x2 Surface = 1 Sampler = 0 mlen 1 rlen 1
which produces GPU hangs in Cherryview/Braswell:
"For 64-bit Align1 operat
Cherryview/Broxton annoyingly have a minimum number of VS URB entries
of 34, which is not a multiple of 8. When the VS size is less than 9,
the number of VS entries has to be a multiple of 8.
Notably, BLORP programmed the minimum number of VS URB entries (34), with
a size of 1 (less than 9), whic
Cherryview and Broxton don't support DW x DW multiplication. We have
piles of code to handle this, but apparently weren't retyping in the
immediate case.
For example,
tests/spec/arb_tessellation_shader/execution/dvec3-vs-tcs-tes
makes the simulator angry about instructions such as:
mul(8) r18
Am 10.06.2016 um 20:58 schrieb Brian Paul:
> This basically disallows all 8-bit x 3 and 16-bit x 3 formats for
> textures and render targets. Some 3-component formats were already
> disallowed before. This avoids problems with GL_ARB_copy_image.
>
> v2: the previous version of this patch disallo
> On Jun 10, 2016, at 3:49 PM, Ilia Mirkin wrote:
>
> On Fri, Jun 10, 2016 at 4:48 PM, Rowley, Timothy O
> wrote:
>>
>>> On Jun 10, 2016, at 3:37 PM, Rowley, Timothy O
>>> wrote:
>>>
On Jun 10, 2016, at 3:01 PM, Emil Velikov wrote:
On 10 June 2016 at 20:43, Tim Rowley
On Fri, Jun 10, 2016 at 4:48 PM, Rowley, Timothy O
wrote:
>
>> On Jun 10, 2016, at 3:37 PM, Rowley, Timothy O
>> wrote:
>>
>>>
>>> On Jun 10, 2016, at 3:01 PM, Emil Velikov wrote:
>>>
>>> On 10 June 2016 at 20:43, Tim Rowley wrote:
Previously used core-avx-i was for ivybridge;
corei7
> On Jun 10, 2016, at 3:37 PM, Rowley, Timothy O
> wrote:
>
>>
>> On Jun 10, 2016, at 3:01 PM, Emil Velikov wrote:
>>
>> On 10 June 2016 at 20:43, Tim Rowley wrote:
>>> Previously used core-avx-i was for ivybridge;
>>> corei7-avx allows sandybridge.
>> Which GCC version was required by the
On Fri, Jun 10, 2016 at 1:30 PM, Anuj Phogat wrote:
> On Fri, Jun 10, 2016 at 10:38 AM, Anuj Phogat
> wrote:
> > On Fri, Jun 10, 2016 at 7:43 AM, Jason Ekstrand
> wrote:
> >> Reviewed-by: Jason Ekstrand
> >>
> >> Is there a test or bug this fixes? If so, that should be mentioned in
> the
> >>
> On Jun 10, 2016, at 3:01 PM, Emil Velikov wrote:
>
> On 10 June 2016 at 20:43, Tim Rowley wrote:
>> Previously used core-avx-i was for ivybridge;
>> corei7-avx allows sandybridge.
> Which GCC version was required by the previous and which by the
> current version ?
Both options work back to
On Fri, Jun 10, 2016 at 10:38 AM, Anuj Phogat wrote:
> On Fri, Jun 10, 2016 at 7:43 AM, Jason Ekstrand wrote:
>> Reviewed-by: Jason Ekstrand
>>
>> Is there a test or bug this fixes? If so, that should be mentioned in the
>> commit message and you should cc stable.
>>
> Looks like there is no te
On Fri, Jun 10, 2016 at 1:16 PM, Emil Velikov
wrote:
> On 10 June 2016 at 01:31, Dylan Baker wrote:
> > This replaces the current bash generator with a python based generator
> > using mako. It's quite fast and works with both python 2.7 and python
> > 3.5, and should work with 3.3+ and maybe ev
On Fri, Jun 10, 2016 at 1:14 PM, Emil Velikov
wrote:
> On 10 June 2016 at 20:57, Jason Ekstrand wrote:
> > This reworks the #if guards a bit. When Emil originally wrote them, he
> > just guarded everything. However, part of what anv_entrypoints_gen.py
> > generates is a hash table for looking
From: Emil Velikov
When building from a release tarball (where the generated/built files
are in srcdir) in an OOT fashion we need to have both builddir and
srcdir in the includes list.
Otherwise we'll error out, as the file (header gen_knobs.h in this case)
won't be in the location where we are
On 10 June 2016 at 01:31, Dylan Baker wrote:
> This replaces the current bash generator with a python based generator
> using mako. It's quite fast and works with both python 2.7 and python
> 3.5, and should work with 3.3+ and maybe even 3.2.
>
> It produces an almost identical file except for a m
On 10 June 2016 at 20:57, Jason Ekstrand wrote:
> This reworks the #if guards a bit. When Emil originally wrote them, he
> just guarded everything. However, part of what anv_entrypoints_gen.py
> generates is a hash table for looking up entrypoints based on their name.
> This table *cannot* get o
On 10 June 2016 at 20:57, Jason Ekstrand wrote:
> This is a bit cleaner than generating the types ourselves when making the
> table.
>
> Signed-off-by: Jason Ekstrand
> Cc: "12.0"
Haven't checked the generated output, but the idea sounds great. I've
even did a similar thing for the GLVND 'genera
I don't know that anything actually guarantees this, but if we exceed
the limits, we may end up overflowing and trashing random buffers that
happen to be nearby in the VMA space, leading to rendering corruption,
hangs, or worse.
We should really fix this properly. However, the pitfall has existed
We'll use this for compute shader thread counts and scratch space
calculations shortly.
Note that subslices are referred to as "half slices" on Ivybridge.
Cc: "12.0"
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/intel_screen.c | 5 -
1 file changed, 4 insertions(+), 1 deleti
These are linear, not powers of two, and much more limited.
Cc: "12.0"
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 6 ++
src/mesa/drivers/dri/i965/gen7_cs_state.c | 6 --
2 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/
Curro figured this out by investigating the simulator. Apparently
there's also a workaround in the Windows driver. I'm not sure it's
actually documented anywhere.
We were underallocating the scratch buffer by a factor of 128/70.
Cc: "12.0"
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/
We were allocating enough space for the number of threads per subslice,
when we should have been allocating space for the number of threads in
the entire GPU.
Even though we currently run with a reduced thread count (due to a bug),
we might still overflow the scratch buffer because the address
cal
We were programming the number of threads per subslice, when we should
have been programming the total number of threads on the GPU as a whole.
Thanks to Curro and Jordan for helping track this down!
On Skylake GT3e:
- Improves performance in Unreal's Elemental Demo by roughly 1.5-1.7x.
- Improve
Most scratch stages use power of two sizes, in kilobytes, where
0 means 1kB. But compute shaders on Haswell have a minimum of 2kB,
and use a representation where 0 = 2kB.
This meant that we were effectively telling the hardware to allocate
each thread twice as much space as we meant to, while sim
Skylake changes the representation of shared local memory size:
Size | 0 kB | 1 kB | 2 kB | 4 kB | 8 kB | 16 kB | 32 kB | 64 kB |
---
Gen7-8 |0 | none | none |1 |2 | 4 | 8 |16 |
--
On Fri, Jun 10, 2016 at 3:43 PM, Tim Rowley wrote:
> Previously used core-avx-i was for ivybridge;
> corei7-avx allows sandybridge.
> ---
> src/gallium/drivers/swr/Makefile.am | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/src/gallium/drivers/swr/Makefile.am
> b/src/gal
On 10 June 2016 at 20:43, Tim Rowley wrote:
> Previously used core-avx-i was for ivybridge;
> corei7-avx allows sandybridge.
Which GCC version was required by the previous and which by the
current version ?
> ---
> src/gallium/drivers/swr/Makefile.am | 2 +-
> 1 file changed, 1 insertion(+), 1 d
This reworks the #if guards a bit. When Emil originally wrote them, he
just guarded everything. However, part of what anv_entrypoints_gen.py
generates is a hash table for looking up entrypoints based on their name.
This table *cannot* get out of sync between C and python regardless of
preprocesso
This is a bit cleaner than generating the types ourselves when making the
table.
Signed-off-by: Jason Ekstrand
Cc: "12.0"
---
src/intel/vulkan/anv_entrypoints_gen.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/intel/vulkan/anv_entrypoints_gen.py
b/src/intel/vulkan/a
Previously used core-avx-i was for ivybridge;
corei7-avx allows sandybridge.
---
src/gallium/drivers/swr/Makefile.am | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/swr/Makefile.am
b/src/gallium/drivers/swr/Makefile.am
index d211f2e..8156cf2 100644
--- a/sr
Hi,
Reading the mailing list about that issue, I get the following remarks:
. WL_bind_wayland_display support is advertised for dri3, but contrary
to all other
advertisers, it doesn't implement the authenticate function. It seems wrong,
and it should do like wayland, where on render nodes it p
On 06/10/2016 01:18 PM, Ilia Mirkin wrote:
On Fri, Jun 10, 2016 at 11:16 AM, Ilia Mirkin wrote:
On Fri, Jun 10, 2016 at 9:47 AM, Brian Paul wrote:
Otherwise the series looks good.
Reviewed-by: Brian Paul
Thanks!
Bleh, just realized I totally forgot about display lists. I remembered
whil
On Fri, Jun 10, 2016 at 11:16 AM, Ilia Mirkin wrote:
> On Fri, Jun 10, 2016 at 9:47 AM, Brian Paul wrote:
>> Otherwise the series looks good.
>>
>> Reviewed-by: Brian Paul
>
> Thanks!
Bleh, just realized I totally forgot about display lists. I remembered
while I was initially writing it, but th
With the addition of mcpu:
Reviewed-by: Chuck Atkins
Tested-by: Chuck Atkins
- Chuck
On Fri, Jun 10, 2016 at 2:23 PM, Chuck Atkins
wrote:
> Should probably also add mcpu for good measure
>
> - Chuck
>
> On Fri, Jun 10, 2016 at 1:54 PM, Emil Velikov
> wrote:
>
>> From: Emil Velikov
>>
>> Ot
This basically disallows all 8-bit x 3 and 16-bit x 3 formats for
textures and render targets. Some 3-component formats were already
disallowed before. This avoids problems with GL_ARB_copy_image.
v2: the previous version of this patch disallowed all 3-component formats
Reviewed-by: Charmaine L
On 2016-06-10 11:44:01, Kenneth Graunke wrote:
> On Thursday, June 9, 2016 1:34:15 PM PDT Francisco Jerez wrote:
> > Kenneth Graunke writes:
> >
> > > We'll use this for compute shader thread counts shortly.
> > >
> > > Cc: "12.0"
> > > Signed-off-by: Kenneth Graunke
> > > ---
> > > src/mesa/d
On Thursday, June 9, 2016 1:34:15 PM PDT Francisco Jerez wrote:
> Kenneth Graunke writes:
>
> > We'll use this for compute shader thread counts shortly.
> >
> > Cc: "12.0"
> > Signed-off-by: Kenneth Graunke
> > ---
> > src/mesa/drivers/dri/i965/intel_screen.c | 5 -
> > 1 file changed, 4 i
On 06/09/2016 11:02 PM, Mathias Fröhlich wrote:
Hi,
On Thursday, June 09, 2016 12:35:52 Brian Paul wrote:
> On 06/09/2016 12:10 PM, Brian Paul wrote:
> > On 06/09/2016 09:35 AM, Brian Paul wrote:
> >> On 06/08/2016 11:03 PM, mathias.froehl...@gmx.net wrote:
> >>> From: Mathias Fröhlich
Thanks so much for the quick and thorough reply.
Also, texture filtering is very slow compared to gpu hw already (in
> comparison to shader arithmetic), so most likely the performance hit
> will be quite large, making this only really useful in few cases.
This is something I hadn't really consid
https://bugs.freedesktop.org/show_bug.cgi?id=95529
Nicolai Hähnle changed:
What|Removed |Added
Resolution|--- |FIXED
Status|NEW
Should probably also add mcpu for good measure
- Chuck
On Fri, Jun 10, 2016 at 1:54 PM, Emil Velikov
wrote:
> From: Emil Velikov
>
> Otherwise drivers such as SWR that depend on providing their own values
> will fail to build.
>
> Cc: "11.2 12.0"
> Cc: Tim Rowley
> Signed-off-by: Emil Veliko
From: Emil Velikov
Otherwise drivers such as SWR that depend on providing their own values
will fail to build.
Cc: "11.2 12.0"
Cc: Tim Rowley
Signed-off-by: Emil Velikov
---
configure.ac | 2 ++
1 file changed, 2 insertions(+)
diff --git a/configure.ac b/configure.ac
index 33d1fef..9e95f7b
From: Emil Velikov
Will allows us to catch missing files and build issues before getting
the tarball out for general consumption.
Cc: "11.2 12.0"
Cc: Tim Rowley
Signed-off-by: Emil Velikov
---
Makefile.am | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Makefile.am b/Makef
On Fri, Jun 10, 2016 at 7:43 AM, Jason Ekstrand wrote:
> Reviewed-by: Jason Ekstrand
>
> Is there a test or bug this fixes? If so, that should be mentioned in the
> commit message and you should cc stable.
>
Looks like there is no test hitting this. So, I'll add a small piglit test
verifying the
Am 10.06.2016 um 18:01 schrieb Alan Thomas:
> Hi mesa-dev,
>
> Working through a current server-side OpenGL rendering project, our team
> is running into hurdles with regard to anisotropic filtering. Aniso is a
> hard dependency for our rendering needs, but softpipe/swrast (which
> support aniso)
https://bugs.freedesktop.org/show_bug.cgi?id=96358
--- Comment #7 from gregory.hain...@gmail.com ---
Forgot to say that interface_type won't match neither again due to arrayness.
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https://bugs.freedesktop.org/show_bug.cgi?id=96358
--- Comment #6 from gregory.hain...@gmail.com ---
Using "strcpy(s, t + 1)" is better. But another check is failling below.
if (producer_var->type != consumer_var->type ||
producer_var->interpolation != consumer_var->interpolation
On 06/10/2016 05:18 AM, Nicolai Hähnle wrote:
Ping?
LGTM. I assume there's no piglit regressions. In any case, let's be on
the lookout for any other regressions that might fall out. Like I said
before, this code is kind of delicate.
Reviewed-by: Brian Paul
On 06.06.2016 23:28, Nicol
https://bugs.freedesktop.org/show_bug.cgi?id=96358
gregory.hain...@gmail.com changed:
What|Removed |Added
Status|NEEDINFO|ASSIGNED
--- Comment #5 from
In order to support the WL_bind_wayland_display extension it's necessary to
make use of render nodes, as DRI3 doesn't provide a mechanism for authenticating
client opened device node fds. However, this doesn't apply when Wayland support
is disabled, since the extension is no longer exposed.
Change
On 10/06/16 14:32, Emil Velikov wrote:
On 10 June 2016 at 12:25, Martin Peres wrote:
On 10/06/16 13:30, Frank Binns wrote:
In order to support the WL_bind_wayland_display extension it's necessary
to
make use of render nodes as DRI3 doesn't provide a mechanism for
authenticating
client opened f
On 10/06/16 12:25, Martin Peres wrote:
On 10/06/16 13:30, Frank Binns wrote:
In order to support the WL_bind_wayland_display extension it's
necessary to
make use of render nodes as DRI3 doesn't provide a mechanism for
authenticating
client opened fds. However, this does not apply when Wayland s
Hi mesa-dev,
Working through a current server-side OpenGL rendering project, our team is
running into hurdles with regard to anisotropic filtering. Aniso is a hard
dependency for our rendering needs, but softpipe/swrast (which support
aniso) are too slow performance-wise. Llvmpipe doesn't currentl
https://bugs.freedesktop.org/show_bug.cgi?id=96480
--- Comment #6 from Dieter Nützel ---
Argh...
'GLU' was slipped through.
Sorry, for the noise.
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https://bugs.freedesktop.org/show_bug.cgi?id=96480
--- Comment #5 from Dieter Nützel ---
Where...
Can't find it in master.
Or how long does it take to sync 'your' master and 'master'...;-)
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On Fri, Jun 10, 2016 at 11:32 AM, Jan Vesely wrote:
> On Fri, 2016-06-10 at 11:20 -0400, Ilia Mirkin wrote:
>> On Fri, Jun 10, 2016 at 6:28 AM, Stephan Bergmann > m> wrote:
>> > On 06/10/2016 12:09 PM, Eric Engestrom wrote:
>> > >
>> > > On Thu, Jun 09, 2016 at 05:13:20PM +0200, Stephan Bergmann w
On 06/10/2016 05:20 PM, Ilia Mirkin wrote:
It's pretty easy for me to fix up before I apply it too, but if I "git
am" your email, it'll be attributed to the one you sent it from,
unless that From line is there as line 1 of the email body. Just let
me know if you want me to fix it up. Despite the
Signed-off-by: Nayan Deshmukh
---
src/gallium/state_trackers/vdpau/mixer.c | 8
src/gallium/state_trackers/vdpau/query.c | 8
2 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/src/gallium/state_trackers/vdpau/mixer.c
b/src/gallium/state_trackers/vdpau/mixer.c
index
On Fri, 2016-06-10 at 11:20 -0400, Ilia Mirkin wrote:
> On Fri, Jun 10, 2016 at 6:28 AM, Stephan Bergmann m> wrote:
> > On 06/10/2016 12:09 PM, Eric Engestrom wrote:
> > >
> > > On Thu, Jun 09, 2016 at 05:13:20PM +0200, Stephan Bergmann wrote:
> > >
> > > Since you didn't send this patch from yo
Build mesa 1567 completed
Commit 2b4cee0571 by Jose Fonseca on 6/10/2016 2:42 PM:
gallivm: Never emit llvm.fmuladd on LLVM 3.3.\n\nBesides the old JIT bug, it seems the X86 backend on LLVM 3.3 doesn't\nhandle llvm.fmuladd and instead it fall backs to a C functi
On Fri, Jun 10, 2016 at 6:28 AM, Stephan Bergmann wrote:
> On 06/10/2016 12:09 PM, Eric Engestrom wrote:
>>
>> On Thu, Jun 09, 2016 at 05:13:20PM +0200, Stephan Bergmann wrote:
>>
>> Since you didn't send this patch from your primary email account,
>> you might want to add this line here, otherwis
On Fri, Jun 10, 2016 at 9:47 AM, Brian Paul wrote:
> On 06/09/2016 09:37 PM, Ilia Mirkin wrote:
>>
>> Signed-off-by: Ilia Mirkin
>> ---
>> src/mesa/main/attrib.c | 7 ++
>> src/mesa/main/config.h | 7 --
>> src/mesa/main/extensions_table.h | 1 +
>> src/mesa/ma
https://bugs.freedesktop.org/show_bug.cgi?id=96480
Brian Paul changed:
What|Removed |Added
Status|REOPENED|RESOLVED
Resolution|---
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