[Mesa-dev] [PATCH 2/2] mesa/st: disable ARB_framebuffer_object when no driver support.

2013-09-07 Thread Ilia Mirkin
When PIPE_CAP_MIXED_FRAMEBUFFER_SIZES is not provided, parts of ARB_framebuffer_object can't be supported, such as on NV30. Signed-off-by: Ilia Mirkin --- src/mesa/state_tracker/st_extensions.c | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/src/mesa/state_tracker/st_e

[Mesa-dev] [PATCH 1/2] gallium: add PIPE_CAP_MIXED_FRAMEBUFFER_SIZES

2013-09-07 Thread Ilia Mirkin
This CAP will determine whether ARB_framebuffer_object can be enabled. The nv30 driver does not allow mixing swizzled and linear zsbuf/cbufs. Signed-off-by: Ilia Mirkin --- Christoph, this is what I understood you suggested I do. Hopefully I got it right. I've split this up into two patches, one

Re: [Mesa-dev] [PATCH 4/5] glsl: Implement MESA_shader_integer_mix extension.

2013-09-07 Thread Matt Turner
On Fri, Sep 6, 2013 at 10:53 PM, Kenneth Graunke wrote: >> +2) Should we mix() to select between boolean components? > > > I feel like there should be a word between "Should we" and "mix()". Perhaps > "Should we allow mix() to select between boolean components"? Yes, definitely missing a word

[Mesa-dev] [Bug 69071] New: _eglGetNativePlatform should not fall back to build-time configuration

2013-09-07 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=69071 Priority: medium Bug ID: 69071 Assignee: mesa-dev@lists.freedesktop.org Summary: _eglGetNativePlatform should not fall back to build-time configuration Severity: minor Cl

Re: [Mesa-dev] [PATCH 4/4] glsl: Disallow relinking if a program is used by an active XFB object.

2013-09-07 Thread Marek Olšák
On Sat, Sep 7, 2013 at 1:40 AM, Kenneth Graunke wrote: > Paused transform feedback objects may refer to a program other than the > current program. If any active objects refer to a program, LinkProgram > must reject the request to relink. > > The code to detect this is ugly since _mesa_HashWalk i

Re: [Mesa-dev] [PATCH 1/2] radeon/winsys: pad IBs to a multiple of 8 DWs

2013-09-07 Thread Christian König
Am 06.09.2013 23:00, schrieb Alex Deucher: This aligns the gfx, compute, and dma IBs to 8 DW boundries. This aligns the the IB to the fetch size of the CP for optimal performance. Additionally, r6xx hardware requires at least 4 DW alignment to avoid a hw bug. This also aligns the DMA IBs to 8 DW

Re: [Mesa-dev] [PATCH 2/3] i965/gen7: Set MOCS L3 cacheability for IVB/BYT

2013-09-07 Thread Vedran Rodic
On Tue, Sep 3, 2013 at 9:19 PM, Ville Syrjälä wrote: > On Thu, Aug 15, 2013 at 10:39:31PM +0200, Vedran Rodic wrote: >> > We do have the set_caching ioctl. It's enough to flip the PTEs to UC and >> > let MOCS manage things. I actually did a few experiments on my IVB. I >> > made all Mesa's buffers