[Mesa-dev] vbo code and flush explicit mapping

I've been playing with a gallium driver, and started looking at some wierd gears behaviour, The vbo code maps the buffer with GL_MAP_FLUSH_EXPLICIT_BIT which to me requires that at some point we call ctx->Driver.FlushMappedBufferRange. Now the code attempts to call it in vbo_exec_vtx_unmap but fro

Re: [Mesa-dev] [PATCH 05/14] glsl: Add constant evaluation of bit built-ins.

For the series: Reviewed-by: Chris Forbes On Mon, Apr 29, 2013 at 10:29 AM, Matt Turner wrote: > v2: Order bits from LSB end (31 - count) for ir_unop_find_msb. > --- > src/glsl/ir_constant_expression.cpp | 123 > > 1 file changed, 123 insertions(+) > > dif

[Mesa-dev] [PATCH 14/14] i965: Lower bitfieldInsert.

v2: Only lower bitfieldInsert to BFM+BFI (and don't lower bitfieldExtract at all) since three-source instructions are now usable in the vertex shader. --- src/mesa/drivers/dri/i965/brw_shader.cpp | 9 + 1 file changed, 9 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_sha

[Mesa-dev] [PATCH 13/14] i965/vs: Add support for bit instructions.

v2: Rebase on LRP addition. Use fix_3src_operand() when emitting BFE and BFI2. Add BFE and BFI2 to is_3src_inst check in brw_vec4_copy_propagation.cpp. Subtract result of FBH from 31 (unless an error) to convert MSB counts to LSB counts --- src/mesa/drivers/dri/i965/brw_vec

[Mesa-dev] [PATCH 12/14] i965/fs: Add support for bit instructions.

Don't bother scalarizing ir_binop_bfm, since its results are identical for all channels. v2: Subtract result of FBH from 31 (unless an error) to convert MSB counts to LSB counts. --- src/mesa/drivers/dri/i965/brw_fs.cpp | 7 src/mesa/drivers/dri/i965/brw_fs.h

[Mesa-dev] [PATCH 06/14] glsl: Add a pass to lower bitfield-insert into bfm+bfi.

i965/Gen7+ and Radeon/Evergreen+ have bfm/bfi instructions to implement bitfieldInsert() from ARB_gpu_shader5. v2: Add ir_binop_bfm and ir_triop_bfi to st_glsl_to_tgsi.cpp. Remove spurious temporary assignment and dereference. --- src/glsl/ir.cpp| 2 ++ src/glsl/i

[Mesa-dev] [PATCH 05/14] glsl: Add constant evaluation of bit built-ins.

v2: Order bits from LSB end (31 - count) for ir_unop_find_msb. --- src/glsl/ir_constant_expression.cpp | 123 1 file changed, 123 insertions(+) diff --git a/src/glsl/ir_constant_expression.cpp b/src/glsl/ir_constant_expression.cpp index c09e56a..66b0a64 10064

[Mesa-dev] [PATCH 04/14] glsl: Add support for new bit built-ins in ARB_gpu_shader5.

v2: Move use of ir_binop_bfm and ir_triop_bfi to a later patch. --- src/glsl/ir.cpp| 8 +++- src/glsl/ir.h | 21 - src/glsl/ir_validate.cpp | 26 ++ src/glsl/opt_algebraic.cp

[Mesa-dev] [PATCH 10/10] mesa: update comments, simplify code in vtxfmt.c

--- src/mesa/main/vtxfmt.c | 14 ++ 1 files changed, 6 insertions(+), 8 deletions(-) diff --git a/src/mesa/main/vtxfmt.c b/src/mesa/main/vtxfmt.c index d7bf98e..8864b8c 100644 --- a/src/mesa/main/vtxfmt.c +++ b/src/mesa/main/vtxfmt.c @@ -39,14 +39,12 @@ /** - * Use the per-vert

[Mesa-dev] [PATCH 09/10] mesa: update GLvertexformat comments

--- src/mesa/main/dd.h | 27 +++ 1 files changed, 7 insertions(+), 20 deletions(-) diff --git a/src/mesa/main/dd.h b/src/mesa/main/dd.h index 1c716a2..454a18c 100644 --- a/src/mesa/main/dd.h +++ b/src/mesa/main/dd.h @@ -848,28 +848,17 @@ struct dd_function_table { /

[Mesa-dev] [PATCH 08/10] mesa: remove GLvertexformat::EvalMesh1(), EvalMesh2()

See previous commit comments. --- src/mesa/main/dd.h| 16 -- src/mesa/main/dlist.c |2 - src/mesa/main/eval.c | 10 + src/mesa/main/eval.h |3 +- src/mesa/main/vtxfmt.c|2 +- src/mesa/vbo/vbo_exec_api.c | 107

[Mesa-dev] [PATCH 07/10] mesa: remove GLvertexformat::Rectf()

As with the glDraw* functions, this doesn't have to be in GLvertexformat. --- src/mesa/main/dd.h|2 -- src/mesa/main/dlist.c |5 ++--- src/mesa/main/vtxfmt.c|2 -- src/mesa/vbo/vbo_exec_api.c | 23 --- src/mesa/vbo/vbo_exec_array.c |

[Mesa-dev] [PATCH 06/10] mesa: simplify dispatch for glDraw* functions

Remove all the glDraw* functions from the GLvertexformat structure. The point of that dispatch struct is to handle all the functions which dispatch differently depending on whether we're inside glBegin/End. glDraw* are never allowed inside glBegin/End so we can remove those entries. This simplifie

[Mesa-dev] [PATCH 05/10] vbo: add new vbo_initialize_exec_dispatch(), vbo_initialize_save_dispatch()

First step in simplifying the vertex array / glDraw dispatch code. --- src/mesa/vbo/vbo.h|9 + src/mesa/vbo/vbo_exec_array.c | 41 + src/mesa/vbo/vbo_save_api.c | 18 ++ 3 files changed, 68 insertions(+), 0 delet

[Mesa-dev] [PATCH 04/10] mesa: remove _MESA_INIT_EVAL_VTXFMT() macro

--- src/mesa/main/dlist.c |9 - src/mesa/main/eval.h| 12 src/mesa/vbo/vbo_exec_api.c |9 - src/mesa/vbo/vbo_noop.c |9 - src/mesa/vbo/vbo_save_api.c |9 - 5 files changed, 32 insertions(+), 16 deletions(-) diff --gi

[Mesa-dev] [PATCH 03/10] mesa: remove _MESA_INIT_ARRAYELT_VTXFMT() macro

--- src/mesa/main/api_arrayelt.h |4 src/mesa/main/dlist.c|2 +- src/mesa/vbo/vbo_exec_api.c |2 +- src/mesa/vbo/vbo_noop.c |2 +- src/mesa/vbo/vbo_save_api.c |2 +- 5 files changed, 4 insertions(+), 8 deletions(-) diff --git a/src/mesa/main/api_arrayelt.h

[Mesa-dev] [PATCH 02/10] mesa: remove _MESA_INIT_DLIST_VTXFMT() macro

Just expand the code. --- src/mesa/main/dlist.c |3 ++- src/mesa/main/dlist.h |6 -- src/mesa/vbo/vbo_exec_api.c |4 +++- src/mesa/vbo/vbo_noop.c |3 ++- src/mesa/vbo/vbo_save_api.c |3 ++- 5 files changed, 9 insertions(+), 10 deletions(-) diff --git a/src/

[Mesa-dev] [PATCH 01/10] mesa: change _mesa_inside_dlist_begin_end() to handle PRIM_UNKNOWN

If the currently compiled primitive state is PRIM_UNKNOWN we should not return true from _mesa_inside_dlist_begin_end(). This lets us simplify the calls to that function. Note, the call to _mesa_inside_dlist_begin_end() in vbo_save_EndList() should have probably been checking for PRIM_UNKNOWN too

Re: [Mesa-dev] [PATCH 2/3] r600g/compute: Use the GFX ring for compute

Am 26.04.2013 19:21, schrieb Tom Stellard: From: Tom Stellard Only Cayman has a separate compute ring, but it has some hw bugs, so to be safe we will stick with the GFX. The other two patches look good, but this one is a NAK. The fact that the Cayman compute rings are buggy should be handled

Re: [Mesa-dev] [PATCH 2/2] i965/vs: Add instruction scheduling.

On 04/23/2013 04:56 PM, Eric Anholt wrote: While this doesn't have the detail that the FS scheduler does, and is ignorant of dependency control, it's still good for a 0.60% +/- 0.15% performance improvement on GLBenchmark 2.7 (n=45/47, outliers removed) --- src/mesa/drivers/dri/i965/Makefile.so

[Mesa-dev] [PATCH] i965: Move is_math/is_tex/is_control_flow() to backend_instruction.

These are entirely based on the opcode, which is available in backend_instruction. It makes sense to only implement them in one place. This changes the VS implementation of is_tex() slightly, which now accepts FS_OPCODE_TXB and SHADER_OPCODE_LOD. However, since those aren't generated in the VS a

Re: [Mesa-dev] [PATCH] radeon/llvm: Use LLVM C API for compiling LLVM IR to ISA.

- Original Message - > > Hi, > > On Thursday, April 25, 2013 10:29:27 Jose Fonseca wrote: > > - There are a bunch of options that need to be set via globals, (see > > lp_set_target_options), so app/drivers could tamper with each other > > options. > > > > - llvm::cl::ParseCommandLineOpt

Re: [Mesa-dev] [PATCH 2/2] i965: Implement color clears using a simple shader in blorp.

On 04/18/2013 02:25 PM, Eric Anholt wrote: The upside is less CPU overhead in fiddling with GL error handling, the ability to use the constant color write message in most cases, and no GLSL clear shaders appearing in MESA_GLSL=dump output. The downside is more batch flushing and a total recomput

Re: [Mesa-dev] [PATCH 1/2] mesa: Make a Mesa core function for sRGB render encoding handling.

On 04/18/2013 02:25 PM, Eric Anholt wrote: --- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 27 +-- src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 29 ++--- src/mesa/main/blend.c |8 ++ src/mesa/main/blend.h

Re: [Mesa-dev] swrast MapTextureImage fetches

On 04/22/2013 09:14 AM, Eric Anholt wrote: 34 files changed, 311 insertions(+), 889 deletions(-) Also, swrast_dri.so now passes two FXT1 tests that failed before, and i915's vertex shader texturing works. I haven't tested the radeon/nouveau code, nor have I been as invasive as I could be, bec

Re: [Mesa-dev] [PATCH 07/17] swrast: Replace ImageOffsets with an ImageSlices pointer.

On 04/22/2013 09:14 AM, Eric Anholt wrote: This is a step toward allowing drivers to use their normal mapping paths, instead of requiring that all slice mappings come from an aligned offset from the first slice's map. This incidentally fixes missing slice handling in FXT1 swrast. It looks like