Fix uninitialized pointer field defect reported by Coverity.
Signed-off-by: Vinson Lee
---
src/glsl/opt_dead_functions.cpp |2 --
1 file changed, 2 deletions(-)
diff --git a/src/glsl/opt_dead_functions.cpp b/src/glsl/opt_dead_functions.cpp
index 017a286..f503493 100644
--- a/src/glsl/opt_de
Hi,
I made some changes in my code, and it works, but doesn't work
properly. There are obviously errors in my code, but I don't know to
how correct them. I commented out the gbm_surface_lock_front_buffer().
There is something covered the triangle near the top edge of the
monitor (screenshot is her
Hello,
I downloaded and modified the code here
(http://cgit.freedesktop.org/~krh/mesa-demos/tree/src/egl/opengl/eglkms.c?h=gbm-surface),
in order to continuous display in the loop. But it doesn't work. The
output message is:
EGL_VERSION = 1.4 (DRI2)
1
handle=14, stride=7680
2
handle=17, stride=7
Here we created a new miptree thus we should update the draw offset
based on the newly created miptree instead of the old one.
This would fix the two webglc test cases on 965 platforms:
conformance/limits/gl-max-texture-dimensions.html
conformance/textures/texture-size.html
NOTE: This is a ca
On 04/24/2012 12:23 PM, Paul Berry wrote:
> When the user attaches a texture to one of the depth/stencil
> attachment points (GL_STENCIL_ATTACHMENT or GL_DEPTH_ATTACHMENT), we
> check to see if the same texture is also attached to the other
> attachment point, and if so, we re-use the existing text
A few comments below.
On 04/24/2012 12:23 PM, Paul Berry wrote:
> When rendering to a miplevel other than 0 within a color, depth,
> stencil, or HiZ buffer, we need to tell the GPU to render to an offset
> within the buffer, so that the data is written into the correct
> miplevel. We do this usin
https://bugs.freedesktop.org/show_bug.cgi?id=49088
--- Comment #3 from Iaroslav 2012-04-26 16:30:31 PDT ---
Created attachment 60641
--> https://bugs.freedesktop.org/attachment.cgi?id=60641
hd6770+mesa-git
Opera+hd6770+mesa-git looks fine, i see no problem.
--
Configure bugmail: https://bugs
https://bugs.freedesktop.org/show_bug.cgi?id=49088
Kenneth Graunke changed:
What|Removed |Added
Summary|MapsGL labels doen't render |MapsGL labels doen't render
https://bugs.freedesktop.org/show_bug.cgi?id=49088
Karl Tomlinson changed:
What|Removed |Added
Summary|MapsGL labels doen't render |MapsGL labels doen't render
https://bugs.freedesktop.org/show_bug.cgi?id=49088
Karl Tomlinson changed:
What|Removed |Added
AssignedTo|nouveau@lists.freedesktop.o |mesa-dev@lists.freedesktop.
On Thu, Apr 26, 2012 at 8:54 PM, Jose Fonseca wrote:
> - Original Message -
>> ---
>> src/mesa/state_tracker/st_context.c | 4 +++-
>> src/mesa/state_tracker/st_context.h | 1 +
>> src/mesa/state_tracker/st_draw.c | 5 +
>> src/mesa/state_tracker/st_extensions.c |
- Original Message -
> ---
> src/mesa/state_tracker/st_context.c|4 +++-
> src/mesa/state_tracker/st_context.h|1 +
> src/mesa/state_tracker/st_draw.c |5 +
> src/mesa/state_tracker/st_extensions.c |4
> 4 files changed, 13 insertions(+), 1 deletions(
From: Michel Dänzer
Signed-off-by: Michel Dänzer
---
src/gallium/winsys/radeon/drm/radeon_drm_bo.c | 19 +--
1 file changed, 13 insertions(+), 6 deletions(-)
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
index e2d
From: Michel Dänzer
Otherwise we'll likely end up with an ever increasing amount of ever smaller
holes.
Requires keeping the list ordered wrt offsets.
Signed-off-by: Michel Dänzer
---
src/gallium/winsys/radeon/drm/radeon_drm_bo.c | 43 +
1 file changed, 36 insertions
From: Michel Dänzer
Signed-off-by: Michel Dänzer
---
src/gallium/winsys/radeon/drm/radeon_drm_bo.c | 13 -
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
index feea957..f
From: Michel Dänzer
If a hole exactly matches the allocated size plus alignment, we would fail to
preserve the alignment as a hole. This would result in never being able to use
the alignment area for an allocation again.
Signed-off-by: Michel Dänzer
---
src/gallium/winsys/radeon/drm/radeon_drm
On 04/26/2012 08:26 AM, Kenneth Graunke wrote:
On 04/25/2012 04:07 PM, Eric Anholt wrote:
The index is also used for GL_ARB_blend_func_extended. Cloning in
i965 was dropping a non-ARB_explicit_attrib_location index.
---
src/glsl/ir_clone.cpp | 7 +--
1 file changed, 1 insertion(+), 6 deletion
Tested with piglit fbo-draw-buffers-blend and intel oglconform.
---
docs/GL3.txt |2 +-
src/mesa/drivers/dri/i965/gen6_cc.c | 12 ++--
src/mesa/drivers/dri/intel/intel_extensions.c |4
3 files changed, 11 insertions(+), 7 deletions(
On 26.04.2012 16:40, Tom Stellard wrote:
On Thu, Apr 26, 2012 at 08:46:52AM -0400, Tom Stellard wrote:
Setting this flag will skip the merge_inst_groups() function.
---
src/gallium/drivers/r600/r600_asm.c |3 ++-
src/gallium/drivers/r600/r600_asm.h | 10 ++
2 files changed, 12
On Thu, Apr 26, 2012 at 08:46:52AM -0400, Tom Stellard wrote:
> Setting this flag will skip the merge_inst_groups() function.
> ---
> src/gallium/drivers/r600/r600_asm.c |3 ++-
> src/gallium/drivers/r600/r600_asm.h | 10 ++
> 2 files changed, 12 insertions(+), 1 deletions(-)
>
> di
In i965 Gen7, Mesa has for a long time used the "depth coordinate
offset X/Y" settings (in 3DSTATE_DEPTH_BUFFER) to cause the GPU to
render to miplevels other than 0. Unfortunately, this doesn't work,
because these offsets must be aligned to multiples of 8, and miplevels
in the depth buffer are on
In i965 Gen6, Mesa has for a long time used the "depth coordinate
offset X/Y" settings (in 3DSTATE_DEPTH_BUFFER) to cause the GPU to
render to miplevels other than 0. Unfortunately, this doesn't work,
because these offsets must be aligned to multiples of 8, and miplevels
in the depth buffer are on
From: Adam Rak
---
src/gallium/drivers/r600/r600_asm.c | 13 ++---
1 files changed, 6 insertions(+), 7 deletions(-)
diff --git a/src/gallium/drivers/r600/r600_asm.c
b/src/gallium/drivers/r600/r600_asm.c
index d1a0a4a..d3c46df 100644
--- a/src/gallium/drivers/r600/r600_asm.c
+++ b/src
---
src/gallium/winsys/radeon/drm/radeon_drm_winsys.c | 10 ++
src/gallium/winsys/radeon/drm/radeon_winsys.h |1 +
2 files changed, 11 insertions(+), 0 deletions(-)
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.
---
src/gallium/drivers/r600/r600_shader.c | 37
1 files changed, 37 insertions(+), 0 deletions(-)
diff --git a/src/gallium/drivers/r600/r600_shader.c
b/src/gallium/drivers/r600/r600_shader.c
index 5dbc4dd..b901ba0 100644
--- a/src/gallium/drivers/r600/r600_sha
---
src/gallium/drivers/r600/r600_shader.c | 10 ++
1 files changed, 10 insertions(+), 0 deletions(-)
diff --git a/src/gallium/drivers/r600/r600_shader.c
b/src/gallium/drivers/r600/r600_shader.c
index b4953bb..5dbc4dd 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/galliu
This is a pseudo instruction that enables the LLVM backend to encode
instructions and pass it through r600_bytecode_build()
---
src/gallium/drivers/r600/eg_asm.c |4
src/gallium/drivers/r600/r600_asm.c |7 +++
src/gallium/drivers/r600/r600_asm.h |9 +
3 files changed
Setting this flag will skip the merge_inst_groups() function.
---
src/gallium/drivers/r600/r600_asm.c |3 ++-
src/gallium/drivers/r600/r600_asm.h | 10 ++
2 files changed, 12 insertions(+), 1 deletions(-)
diff --git a/src/gallium/drivers/r600/r600_asm.c
b/src/gallium/drivers/r600/r
Hi,
This patch series contains changes to r600g that are needed for the new
compute implementation.
-Tom
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Only images created with intel_create_image() had the field properly
set. Set it also on intel_dup_image(), intel_create_image_from_name()
and intel_create_image_from_renderbuffer().
---
src/mesa/drivers/dri/intel/intel_screen.c | 15 +++
1 files changed, 15 insertions(+), 0 deletion
---
src/mesa/drivers/dri/intel/intel_screen.c |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/src/mesa/drivers/dri/intel/intel_screen.c
b/src/mesa/drivers/dri/intel/intel_screen.c
index e823792..ac21e96 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.c
+++ b/src/me
On 04/25/2012 11:12 PM, Vinson Lee wrote:
Fix uninitialized pointer field defect reported by Coverity.
Signed-off-by: Vinson Lee
---
src/glsl/opt_structure_splitting.cpp |1 -
1 file changed, 1 deletion(-)
diff --git a/src/glsl/opt_structure_splitting.cpp
b/src/glsl/opt_structure_splitt
On 04/25/2012 04:07 PM, Eric Anholt wrote:
The index is also used for GL_ARB_blend_func_extended. Cloning in
i965 was dropping a non-ARB_explicit_attrib_location index.
---
src/glsl/ir_clone.cpp |7 +--
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/src/glsl/ir_clone.cpp
On Thu, Apr 26, 2012 at 12:07 AM, Eric Anholt wrote:
> The index is also used for GL_ARB_blend_func_extended. Cloning in
> i965 was dropping a non-ARB_explicit_attrib_location index.
LGTM
Reviewed-by: Dave Airlie
Dave.
> ---
> src/glsl/ir_clone.cpp | 7 +--
> 1 file changed, 1 insert
34 matches
Mail list logo