Author: johannes
Date: Thu Aug 9 12:27:48 2007
New Revision: 40965
URL: http://llvm.org/viewvc/llvm-project?rev=40965&view=rev
Log:
Update per review comments.
Modified:
llvm/trunk/include/llvm/Target/TargetLowering.h
llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
Modified: llvm/tr
Author: evancheng
Date: Thu Aug 9 13:05:17 2007
New Revision: 40970
URL: http://llvm.org/viewvc/llvm-project?rev=40970&view=rev
Log:
GR16_ sub-register class should be GR8_, not GR8. That is, it should only be
8-bit registers in 32-bit mode. Ditto for GR32_.
Modified:
llvm/trunk/lib/Target/
Author: lattner
Date: Thu Aug 9 14:05:49 2007
New Revision: 40971
URL: http://llvm.org/viewvc/llvm-project?rev=40971&view=rev
Log:
when we see a unaligned load from an insufficiently aligned global or
alloca, increase the alignment of the load, turning it into an aligned load.
This allows us to
Evan,
I don't think that this change is working quite correctly, and may
not be needed, given the way that the subreg code uses those values.
This is currently causing regressions in dejagnu.
The register classes in the SubRegClassList are used when new subreg
vregs are created. The key i
Author: evancheng
Date: Thu Aug 9 16:59:35 2007
New Revision: 40972
URL: http://llvm.org/viewvc/llvm-project?rev=40972&view=rev
Log:
divb / mulb outputs to ah. Under x86-64 it's not legal to read ah if the
instruction requires a rex prefix (i.e. outputs to r8b, etc.). So issue shift
right by 8
On Aug 9, 2007, at 2:45 PM, Christopher Lamb wrote:
Evan,
I don't think that this change is working quite correctly, and may
not be needed, given the way that the subreg code uses those values.
This is currently causing regressions in dejagnu.
The register classes in the SubRegClassList
Author: evancheng
Date: Thu Aug 9 17:25:35 2007
New Revision: 40973
URL: http://llvm.org/viewvc/llvm-project?rev=40973&view=rev
Log:
Temporarily backing out this change until we know why some dejagnu tests are
failing.
Modified:
llvm/trunk/lib/Target/X86/X86RegisterInfo.td
Modified: llvm/t
On Aug 9, 2007, at 3:20 PM, Evan Cheng wrote:
On Aug 9, 2007, at 2:45 PM, Christopher Lamb wrote:
Evan,
I don't think that this change is working quite correctly, and may
not be needed, given the way that the subreg code uses those
values. This is currently causing regressions in dejagn
Author: johannes
Date: Thu Aug 9 17:51:36 2007
New Revision: 40974
URL: http://llvm.org/viewvc/llvm-project?rev=40974&view=rev
Log:
Patch 10 for long double. Doing constants right needs expanding ConstantFP
to handle values bigger than double. If we assume host==target and host
long double work
> Patch 10 for long double. Doing constants right needs expanding
> ConstantFP
> to handle values bigger than double. If we assume host==target and
> host
> long double works correctly, this is not too bad, but we don't want to
> have that limitation longterm. I could implement accepting dou
Author: evancheng
Date: Thu Aug 9 18:14:39 2007
New Revision: 40975
URL: http://llvm.org/viewvc/llvm-project?rev=40975&view=rev
Log:
Bug fix. ~1U marks the val# dead.
Modified:
llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp
Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp
> -ValueNumberInfo[VN].def = RHSValNoInfo.def;
> +ValueNumberInfo[VN]->def = ~1U; // Now this val# is
> dead.
Is .def equivalent to ->def here, or is this another change?
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Something else changed. But not checked in. :-) Will fix. Thx.
Evan
On Aug 9, 2007, at 4:19 PM, Dale Johannesen wrote:
>
>> -ValueNumberInfo[VN].def = RHSValNoInfo.def;
>> +ValueNumberInfo[VN]->def = ~1U; // Now this val# is
>> dead.
>
> Is .def equivalent to ->def here,
Author: lattner
Date: Thu Aug 9 18:55:17 2007
New Revision: 40976
URL: http://llvm.org/viewvc/llvm-project?rev=40976&view=rev
Log:
unbreak the build
Modified:
llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp
Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp
URL:
http://llvm.
On Aug 9, 2007, at 4:58 PM, Chris Lattner wrote:
> Using host long double is an acceptable hack for now. Alternatively:
OK, I'll do that.
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Author: dpatel
Date: Thu Aug 9 19:59:03 2007
New Revision: 40979
URL: http://llvm.org/viewvc/llvm-project?rev=40979&view=rev
Log:
Remove unncessary duplication.
Modified:
llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp
Modified: llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp
URL:
Author: dpatel
Date: Thu Aug 9 19:33:50 2007
New Revision: 40977
URL: http://llvm.org/viewvc/llvm-project?rev=40977&view=rev
Log:
ExitCondition and Induction variable are loop constraints
not split condition constraints.
Modified:
llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp
Modifie
Author: dpatel
Date: Thu Aug 9 19:53:35 2007
New Revision: 40978
URL: http://llvm.org/viewvc/llvm-project?rev=40978&view=rev
Log:
Calculate exit and start value of true loop and false loop respectively.
Modified:
llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp
Modified: llvm/trunk/lib/T
Author: void
Date: Fri Aug 10 01:22:27 2007
New Revision: 40982
URL: http://llvm.org/viewvc/llvm-project?rev=40982&view=rev
Log:
Adding SSSE3 intrinsics.
Modified:
llvm/trunk/include/llvm/IntrinsicsX86.td
llvm/trunk/lib/Target/X86/X86InstrSSE.td
Modified: llvm/trunk/include/llvm/Intrinsi
Author: lattner
Date: Fri Aug 10 01:22:25 2007
New Revision: 40981
URL: http://llvm.org/viewvc/llvm-project?rev=40981&view=rev
Log:
minor simplifications.
Modified:
llvm/trunk/lib/VMCore/PassManager.cpp
Modified: llvm/trunk/lib/VMCore/PassManager.cpp
URL:
http://llvm.org/viewvc/llvm-project
Author: lattner
Date: Fri Aug 10 01:54:38 2007
New Revision: 40983
URL: http://llvm.org/viewvc/llvm-project?rev=40983&view=rev
Log:
small speedup in the case where a smallvector is default ctor'd from
an empty vector. This speeds up llc slightly.
Modified:
llvm/trunk/include/llvm/ADT/SmallVe
Author: lattner
Date: Fri Aug 10 01:17:04 2007
New Revision: 40980
URL: http://llvm.org/viewvc/llvm-project?rev=40980&view=rev
Log:
avoid copying strings.
Modified:
llvm/trunk/include/llvm/PassManagers.h
llvm/trunk/lib/VMCore/PassManager.cpp
Modified: llvm/trunk/include/llvm/PassManagers
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