Changes in directory llvm/lib/Transforms/Scalar:
InstructionCombining.cpp updated: 1.710 -> 1.711
---
Log message:
1. Make sure the use of ConstantInt::getZExtValue() for getting shift
amount is safe.
2. Use new method on ConstantInt instead of (? :) operator.
3. Use new method uge() on Cons
Changes in directory llvm/docs:
AliasAnalysis.html updated: 1.27 -> 1.28
DeveloperPolicy.html updated: 1.37 -> 1.38
ExceptionHandling.html updated: 1.1 -> 1.2
GarbageCollection.html updated: 1.8 -> 1.9
LangRef.html updated: 1.217 -> 1.218
ProgrammersManual.html updated: 1.130 -> 1.131
SystemLibr
Duncan,
A Couple notes ..
On Fri, 2007-03-30 at 07:22 -0500, Duncan Sands wrote:
>
> Index: llvm/docs/DeveloperPolicy.html
> diff -u llvm/docs/DeveloperPolicy.html:1.37
> llvm/docs/DeveloperPolicy.html:1.38
> --- llvm/docs/DeveloperPolicy.html:1.37 Thu Mar 1 20:57:34 2007
> +++ llvm/do
Hi Reid,
> > -possible, by bugpoint or
> > +possible, by bugpoint or
>
> These aren't the same document. If the bugpoint.html document isn't
> there its an artifact of not generating the HTML version from the POD
> version. This isn't a huge deal for the link, but do we have a larger
> i
Chris Lattner wrote:
>> Use the stat information in the Path object, if it is already
>> obtained. This
>> avoids a call to ::fstat by MappedFile when the file size
>> information was
>> already obtained by the Path object.
>>
>
> Interesting approach. The problem is that fstat is signifi
Hi Duncan,
On Fri, 2007-03-30 at 16:39 +0200, Duncan Sands wrote:
> Hi Reid,
>
> > > -possible, by bugpoint
> > > or
> > > +possible, by bugpoint or
> >
> > These aren't the same document. If the bugpoint.html document isn't
> > there its an artifact of not generating the HTML version f
Changes in directory llvm/docs:
LangRef.html updated: 1.218 -> 1.219
---
Log message:
Remove reference to checkpoint.
---
Diffs of the changes: (+1 -11)
LangRef.html | 12 +---
1 files changed, 1 insertion(+), 11 deletions(-)
Index: llvm/docs/LangRef.html
diff -u llvm/docs/Lang
> > There is no checkpoints section, there is only "Data Layout". However
> > "Data Layout" talks only of checkpoints. Would you like me to delete it?
...
> Yes, delete that whole and the doc_subsection too
> if that's the only paragraph in it. The checkpoint thing is not
> supported any more.
Changes in directory llvm/lib/ExecutionEngine/Interpreter:
ExternalFunctions.cpp updated: 1.96 -> 1.97
---
Log message:
For PR1293: http://llvm.org/PR1293 :
* Rename the FunctionType* parameter from M to FT on all the functions.
* Implement a fix for PR1293: http://llvm.org/PR1293 by just asse
On Mar 30, 2007, at 7:49 AM, Jeff Cohen wrote:
> Chris Lattner wrote:
>>> Use the stat information in the Path object, if it is already
>>> obtained. This
>>> avoids a call to ::fstat by MappedFile when the file size
>>> information was
>>> already obtained by the Path object.
>>>
>>
>> Int
Changes in directory llvm/include/llvm:
Constants.h updated: 1.142 -> 1.143
---
Log message:
Make sure this method just return value equal or less than Limit.
---
Diffs of the changes: (+2 -1)
Constants.h |3 ++-
1 files changed, 2 insertions(+), 1 deletion(-)
Index: llvm/include/llv
Changes in directory llvm/lib/Transforms/Scalar:
InstructionCombining.cpp updated: 1.711 -> 1.712
---
Log message:
Make sure the use of ConstantInt::getZExtValue() for shift amount safe.
---
Diffs of the changes: (+20 -18)
InstructionCombining.cpp | 38 ---
The attached patch contains:
- Cleanups in the DAGCombiner.cpp ROTL/ROTR combine code, primarily
helping me to fix 80col violations (benefiting the code as a whole).
- Detect sign/zext/any-extended versions of ROTL/ROTR patterns.
- Allow custom lowering for ROTL/ROTR (needed in the CellSPU's
Spotted what was probably a long-standing bug, since some of my cleanups
were simple substitutions.
-scooter
Index: lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
===
--- lib/CodeGen/SelectionDAG/LegalizeDAG.cpp(.../trunk) (revisio
Changes in directory llvm/test/CodeGen/ARM:
2007-03-30-RegScavengerAssert.ll added (r1.1)
---
Log message:
Test case for PR1279: http://llvm.org/PR1279 (part 2).
---
Diffs of the changes: (+101 -0)
2007-03-30-RegScavengerAssert.ll | 101 +++
1 files cha
Changes in directory llvm/lib/CodeGen:
LiveIntervalAnalysis.cpp updated: 1.230 -> 1.231
---
Log message:
Bug fix for PR1279: http://llvm.org/PR1279 . When isDead is propagate by copy
coalescing, we keep length
of dead def live interval at 1 to avoid multiple def's targeting the same
register.
Changes in directory llvm/lib/CodeGen:
VirtRegMap.cpp updated: 1.107 -> 1.108
---
Log message:
Don't add the same MI to register reuse "last def/use" twice if it reads the
register more than once.
---
Diffs of the changes: (+4 -1)
VirtRegMap.cpp |5 -
1 files changed, 4 insertions(+
Changes in directory llvm-test/MultiSource/Benchmarks/MiBench/consumer-lame:
lame.c updated: 1.2 -> 1.3
---
Log message:
fix compilation on darwin
---
Diffs of the changes: (+2 -0)
lame.c |2 ++
1 files changed, 2 insertions(+)
Index: llvm-test/MultiSource/Benchmarks/MiBench/consumer
Changes in directory llvm/test/CodeGen/X86:
2007-03-15-GEP-Idx-Sink.ll added (r1.1)
---
Log message:
add a testcase for x86
---
Diffs of the changes: (+73 -0)
2007-03-15-GEP-Idx-Sink.ll | 73 +
1 files changed, 73 insertions(+)
Index: llvm/te
Hello, Everyone.
Attached patch will correctly set "sret" attribute for functions like:
'struct foo bar(void)' or 'struct foo bar()'. Testcase is attached.
--
With best regards, Anton Korobeynikov.
Faculty of Mathematics & Mechanics, Saint Petersburg State University.
diff -r e1f510b2fded gcc
Changes in directory llvm/lib/CodeGen/SelectionDAG:
DAGCombiner.cpp updated: 1.283 -> 1.284
SelectionDAG.cpp updated: 1.393 -> 1.394
---
Log message:
Fix incorrect combination of different loads. Reenable zext-over-truncate
combination.
---
Diffs of the changes: (+71 -75)
DAGCombiner.cpp
> First cut trivial re-materialization support.
Woot!
> unsigned reg = rep(mop.getReg());
> mii->getOperand(i).setReg(reg);
>
> +// If the definition instruction is re-materializable,
> its spill
> +// weight is zero.
> LiveInterval
>
> Index: llvm/test/CodeGen/ARM/trunc_ldr.ll
> diff -u llvm/test/CodeGen/ARM/trunc_ldr.ll:1.1 llvm/test/CodeGen/
> ARM/trunc_ldr.ll:1.2
> --- llvm/test/CodeGen/ARM/trunc_ldr.ll:1.1Wed Mar 21 15:14:56 2007
> +++ llvm/test/CodeGen/ARM/trunc_ldr.llWed Mar 21 20:55:16 2007
> @@ -1,27 +1,2
Changes in directory llvm/docs:
GettingStartedVS.html updated: 1.9 -> 1.10
---
Log message:
This is working again.
---
Diffs of the changes: (+2 -3)
GettingStartedVS.html |5 ++---
1 files changed, 2 insertions(+), 3 deletions(-)
Index: llvm/docs/GettingStartedVS.html
diff -u llvm/doc
On Mar 30, 2007, at 2:44 PM, Chris Lattner wrote:
>> First cut trivial re-materialization support.
>
> Woot!
>
>> unsigned reg = rep(mop.getReg());
>> mii->getOperand(i).setReg(reg);
>>
>> +// If the definition instruction is re-
>> materializable, its spill
Changes in directory llvm/test/CodeGen/ARM:
trunc_ldr.ll updated: 1.2 -> 1.3
---
Log message:
Missing '&&'
---
Diffs of the changes: (+1 -1)
trunc_ldr.ll |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/test/CodeGen/ARM/trunc_ldr.ll
diff -u llvm/test/CodeGen/ARM/trun
On Mar 30, 2007, at 3:03 PM, Evan Cheng wrote:
>>> unsigned reg = rep(mop.getReg());
>>> mii->getOperand(i).setReg(reg);
>>>
>>> +// If the definition instruction is re-
>>> materializable, its spill
>>> +// weight is zero.
>>> LiveI
On Mar 30, 2007, at 3:09 PM, Chris Lattner wrote:
>
> On Mar 30, 2007, at 3:03 PM, Evan Cheng wrote:
>
unsigned reg = rep(mop.getReg());
mii->getOperand(i).setReg(reg);
+// If the definition instruction is re-
materializable, its spi
> - (mop.isUse() + mop.isDef()) * pow(10.0F, (int)
> loopDepth);
> +if (!RegInt.remat) {
> + RegInt.weight +=
> +(mop.isUse() + mop.isDef()) * pow(10.0F, (int)
> loopDepth);
> +}
Should it real
Changes in directory llvm/lib/CodeGen/SelectionDAG:
TargetLowering.cpp updated: 1.103 -> 1.104
---
Log message:
add one addressing mode description hook to rule them all.
---
Diffs of the changes: (+34 -0)
TargetLowering.cpp | 34 ++
1 files changed, 34 in
Changes in directory llvm/include/llvm/Target:
TargetLowering.h updated: 1.117 -> 1.118
---
Log message:
add one addressing mode description hook to rule them all.
---
Diffs of the changes: (+21 -1)
TargetLowering.h | 22 +-
1 files changed, 21 insertions(+), 1 deleti
Changes in directory llvm/lib/Target/ARM:
ARMISelLowering.cpp updated: 1.32 -> 1.33
ARMISelLowering.h updated: 1.9 -> 1.10
---
Log message:
implement the new addressing mode description hook.
---
Diffs of the changes: (+42 -0)
ARMISelLowering.cpp | 38
Changes in directory llvm/lib/Target/PowerPC:
PPCISelLowering.cpp updated: 1.264 -> 1.265
PPCISelLowering.h updated: 1.63 -> 1.64
---
Log message:
implement the new addressing mode description hook.
---
Diffs of the changes: (+38 -1)
PPCISelLowering.cpp | 35 +
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.382 -> 1.383
X86ISelLowering.h updated: 1.94 -> 1.95
---
Log message:
implement the new addressing mode description hook.
---
Diffs of the changes: (+49 -0)
X86ISelLowering.cpp | 45 +
Hello, Everyone.
Please ignore my prev. patch, it's definitely wrong.
You might find attached new patch + testcase.
--
With best regards, Anton Korobeynikov.
Faculty of Mathematics & Mechanics, Saint Petersburg State University.
diff -r 6942c57f1ff9 gcc/llvm-types.cpp
--- a/gcc/llvm-types.cpp
Changes in directory llvm/lib/CodeGen:
LLVMTargetMachine.cpp updated: 1.10 -> 1.11
---
Log message:
Add a -print-lsr-output option to LLC, to print the output of the LSR pass.
---
Diffs of the changes: (+9 -1)
LLVMTargetMachine.cpp | 10 +-
1 files changed, 9 insertions(+), 1 del
Changes in directory llvm/lib/Target/X86:
X86CallingConv.td updated: 1.11 -> 1.12
---
Log message:
Match GCC's MMX calling convention.
---
Diffs of the changes: (+4 -0)
X86CallingConv.td |4
1 files changed, 4 insertions(+)
Index: llvm/lib/Target/X86/X86CallingConv.td
diff -u ll
Changes in directory llvm/lib/Transforms/Scalar:
InstructionCombining.cpp updated: 1.712 -> 1.713
---
Log message:
Use APInt operators to calculate the carry bits, remove this loop.
---
Diffs of the changes: (+2 -16)
InstructionCombining.cpp | 18 ++
1 files changed, 2 in
Changes in directory llvm/lib/Transforms/Scalar:
InstructionCombining.cpp updated: 1.713 -> 1.714
---
Log message:
Delete dead code.
---
Diffs of the changes: (+0 -1)
InstructionCombining.cpp |1 -
1 files changed, 1 deletion(-)
Index: llvm/lib/Transforms/Scalar/InstructionCombining.
On Mar 30, 2007, at 6:04 PM, Bill Wendling wrote:
>
> + // The first 8 MMX vector arguments are passed in MMX registers.
> + CCIfType<[v8i8, v4i16, v2i32, v1i64],
> + CCAssignToReg<[RDI, RSI, RDX, RCX, R8 , R9 ]>>,
> +
Please update the comment to match the code.
-Chris
_
> Use APInt operators to calculate the carry bits, remove this loop.
Nice :)
-Chris
>
>
> ---
> Diffs of the changes: (+2 -16)
>
> InstructionCombining.cpp | 18 ++
> 1 files changed, 2 insertions(+), 16 deletions(-)
>
>
> Index: llvm/lib/Transforms/Scalar/InstructionCombinin
Changes in directory llvm/lib/VMCore:
ValueTypes.cpp updated: 1.15 -> 1.16
---
Log message:
add a method to turn a type into a VT.
---
Diffs of the changes: (+28 -0)
ValueTypes.cpp | 28
1 files changed, 28 insertions(+)
Index: llvm/lib/VMCore/ValueTypes.cp
Changes in directory llvm/include/llvm/CodeGen:
ValueTypes.h updated: 1.30 -> 1.31
---
Log message:
add a method to turn a type into a VT.
---
Diffs of the changes: (+5 -0)
ValueTypes.h |5 +
1 files changed, 5 insertions(+)
Index: llvm/include/llvm/CodeGen/ValueTypes.h
diff -u l
Changes in directory llvm/lib/CodeGen/SelectionDAG:
TargetLowering.cpp updated: 1.104 -> 1.105
---
Log message:
switch TL::getValueType to use MVT::getValueType.
---
Diffs of the changes: (+0 -22)
TargetLowering.cpp | 22 --
1 files changed, 22 deletions(-)
Index: l
Changes in directory llvm/include/llvm/Target:
TargetLowering.h updated: 1.118 -> 1.119
---
Log message:
switch TL::getValueType to use MVT::getValueType.
---
Diffs of the changes: (+4 -1)
TargetLowering.h |5 -
1 files changed, 4 insertions(+), 1 deletion(-)
Index: llvm/include/
Changes in directory llvm/include/llvm/Transforms:
Scalar.h updated: 1.77 -> 1.78
---
Log message:
Split the sdisel code munging stuff out into its own opt-pass, CodeGenPrepare.
---
Diffs of the changes: (+7 -1)
Scalar.h |8 +++-
1 files changed, 7 insertions(+), 1 deletion(-)
In
Changes in directory llvm/include/llvm:
LinkAllPasses.h updated: 1.10 -> 1.11
---
Log message:
Split the sdisel code munging stuff out into its own opt-pass, CodeGenPrepare.
---
Diffs of the changes: (+1 -0)
LinkAllPasses.h |1 +
1 files changed, 1 insertion(+)
Index: llvm/include/ll
Changes in directory llvm/lib/Transforms/Scalar:
CodeGenPrepare.cpp added (r1.1)
---
Log message:
Split the sdisel code munging stuff out into its own opt-pass, CodeGenPrepare.
---
Diffs of the changes: (+548 -0)
CodeGenPrepare.cpp | 548 +++
Changes in directory llvm/lib/CodeGen:
LLVMTargetMachine.cpp updated: 1.11 -> 1.12
---
Log message:
move a bunch of code out of the sdisel pass into its own opt pass
"codegenprepare".
---
Diffs of the changes: (+20 -2)
LLVMTargetMachine.cpp | 22 --
1 files changed,
Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAGISel.cpp updated: 1.399 -> 1.400
---
Log message:
move a bunch of code out of the sdisel pass into its own opt pass
"codegenprepare".
---
Diffs of the changes: (+1 -483)
SelectionDAGISel.cpp | 484 ---
Changes in directory llvm/lib/Target/PowerPC:
README.txt updated: 1.113 -> 1.114
---
Log message:
add a note
---
Diffs of the changes: (+23 -0)
README.txt | 23 +++
1 files changed, 23 insertions(+)
Index: llvm/lib/Target/PowerPC/README.txt
diff -u llvm/lib/Target/P
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