Changes in directory llvm/lib/Target/PowerPC:
PPCTargetAsmInfo.cpp updated: 1.6 -> 1.7
---
Log message:
Use S_debug for dwarf info.
---
Diffs of the changes: (+11 -11)
PPCTargetAsmInfo.cpp | 22 +++---
1 files changed, 11 insertions(+), 11 deletions(-)
Index: llvm/lib/Ta
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.58 -> 1.59
ARMRegisterInfo.cpp updated: 1.20 -> 1.21
---
Log message:
add FCPYS and FCPYD
---
Diffs of the changes: (+16 -3)
ARMInstrInfo.td |5 +
ARMRegisterInfo.cpp | 14 +++---
2 files changed, 16
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.59 -> 1.60
README.txt updated: 1.7 -> 1.8
---
Log message:
add FSTD and FSTS
---
Diffs of the changes: (+12 -3)
ARMInstrInfo.td | 13 +++--
README.txt |2 +-
2 files changed, 12 insertions(+), 3 deletio
Changes in directory llvm/test/Regression/CodeGen/ARM:
fp.ll updated: 1.8 -> 1.9
---
Log message:
add FSTD and FSTS
---
Diffs of the changes: (+16 -2)
fp.ll | 18 --
1 files changed, 16 insertions(+), 2 deletions(-)
Index: llvm/test/Regression/CodeGen/ARM/fp.ll
diff -u
Changes in directory llvm/include/llvm/CodeGen:
AsmPrinter.h updated: 1.52 -> 1.53
---
Log message:
Basic support for getGlobalLinkName.
---
Diffs of the changes: (+8 -1)
AsmPrinter.h |9 -
1 files changed, 8 insertions(+), 1 deletion(-)
Index: llvm/include/llvm/CodeGen/AsmPri
Changes in directory llvm/lib/CodeGen:
AsmPrinter.cpp updated: 1.109 -> 1.110
DwarfWriter.cpp updated: 1.80 -> 1.81
---
Log message:
Basic support for getGlobalLinkName.
---
Diffs of the changes: (+12 -2)
AsmPrinter.cpp | 10 ++
DwarfWriter.cpp |4 ++--
2 files changed, 12 in
Changes in directory llvm/test/Regression/CodeGen/ARM:
long.ll updated: 1.6 -> 1.7
---
Log message:
add the immediate to the Offset in eliminateFrameIndex
---
Diffs of the changes: (+7 -0)
long.ll |7 +++
1 files changed, 7 insertions(+)
Index: llvm/test/Regression/CodeGen/ARM/lo
Changes in directory llvm/lib/Target/ARM:
ARMRegisterInfo.cpp updated: 1.21 -> 1.22
---
Log message:
add the immediate to the Offset in eliminateFrameIndex
---
Diffs of the changes: (+2 -2)
ARMRegisterInfo.cpp |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
Index: llvm/lib/
Changes in directory llvm/lib/CodeGen/SelectionDAG:
DAGCombiner.cpp updated: 1.226 -> 1.227
---
Log message:
Make sure operand does have size and element type operands.
---
Diffs of the changes: (+2 -1)
DAGCombiner.cpp |3 ++-
1 files changed, 2 insertions(+), 1 deletion(-)
Index: llv
Changes in directory llvm/include/llvm/CodeGen:
AsmPrinter.h updated: 1.53 -> 1.54
---
Log message:
Clean up interface to getGlobalLinkName.
---
Diffs of the changes: (+1 -2)
AsmPrinter.h |3 +--
1 files changed, 1 insertion(+), 2 deletions(-)
Index: llvm/include/llvm/CodeGen/AsmPrint
Changes in directory llvm/lib/CodeGen:
BranchFolding.cpp updated: 1.11 -> 1.12
---
Log message:
Reenable this pass, fixing the bugs in it.
It now correctly deletes unreachable blocks and blocks that are empty.
---
Diffs of the changes: (+32 -23)
BranchFolding.cpp | 55 ++
Changes in directory llvm/lib/CodeGen:
AsmPrinter.cpp updated: 1.110 -> 1.111
DwarfWriter.cpp updated: 1.81 -> 1.82
---
Log message:
Clean up interface to getGlobalLinkName.
---
Diffs of the changes: (+4 -4)
AsmPrinter.cpp |5 +++--
DwarfWriter.cpp |3 +--
2 files changed, 4 insert
Changes in directory llvm/test/Regression/CodeGen/ARM:
fpmem.ll added (r1.1)
---
Log message:
initial implementation of addressing mode 5
---
Diffs of the changes: (+14 -0)
fpmem.ll | 14 ++
1 files changed, 14 insertions(+)
Index: llvm/test/Regression/CodeGen/ARM/fpmem.ll
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.cpp updated: 1.24 -> 1.25
---
Log message:
add support for inserting an uncond branch
---
Diffs of the changes: (+8 -2)
PPCInstrInfo.cpp | 10 --
1 files changed, 8 insertions(+), 2 deletions(-)
Index: llvm/lib/Target/P
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.23 -> 1.24
ARMISelDAGToDAG.cpp updated: 1.71 -> 1.72
ARMInstrInfo.td updated: 1.60 -> 1.61
---
Log message:
initial implementation of addressing mode 5
---
Diffs of the changes: (+48 -11)
ARMAsmPrinter.cpp | 19
Changes in directory llvm/lib/CodeGen:
BranchFolding.cpp updated: 1.12 -> 1.13
---
Log message:
Enable deleting branches to successor blocks. With the previous patches,
branch folding can now compile stuff like this:
void foo(int W, int X, int Y, int Z) {
if (W & 1) {
for (; X;--X) bar(
Changes in directory llvm-test/SingleSource/UnitTests/Vector/SSE:
Makefile updated: 1.2 -> 1.3
---
Log message:
Set some FP tolerance for these tests.
---
Diffs of the changes: (+1 -0)
Makefile |1 +
1 files changed, 1 insertion(+)
Index: llvm-test/SingleSource/UnitTests/Vector/SSE/M
Changes in directory llvm/test/Regression/CodeGen/PowerPC:
branch-opt.ll added (r1.1)
---
Log message:
new testcase
---
Diffs of the changes: (+93 -0)
branch-opt.ll | 93 ++
1 files changed, 93 insertions(+)
Index: llvm/test/Regre
Changes in directory llvm/test/Regression/CodeGen/ARM:
fpmem.ll updated: 1.1 -> 1.2
---
Log message:
remove extra [] in stores
---
Diffs of the changes: (+10 -3)
fpmem.ll | 13 ++---
1 files changed, 10 insertions(+), 3 deletions(-)
Index: llvm/test/Regression/CodeGen/ARM/fpmem
Changes in directory llvm-test/SingleSource/UnitTests/Vector/SSE:
Makefile updated: 1.3 -> 1.4
---
Log message:
Adjust the FP tolerance so that it actually quashes the fp differences.
Also, disable CBE for now in these tests bacause the CWriter doesn't know
how to deal with vector instructions.
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.61 -> 1.62
---
Log message:
remove extra [] in stores
---
Diffs of the changes: (+2 -2)
ARMInstrInfo.td |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
Index: llvm/lib/Target/ARM/ARMInstrInfo.td
diff -u ll
This fixes PR946:
Index: llvm-convert.cpp
===
--- llvm-convert.cpp(revision 119000)
+++ llvm-convert.cpp(working copy)
@@ -3475,7 +3475,7 @@
// The second arg of llvm.va_copy is a pointer to a valist.
Value *Arg2;
Changes in directory llvm/lib/CodeGen/SelectionDAG:
DAGCombiner.cpp updated: 1.227 -> 1.228
SelectionDAG.cpp updated: 1.352 -> 1.353
SelectionDAGPrinter.cpp updated: 1.38 -> 1.39
---
Log message:
Make it simplier to dump DAGs while in DAGCombiner. Remove a nasty
optimization.
---
Diffs of th
Changes in directory llvm/test/Regression/CodeGen/ARM:
fp.ll updated: 1.9 -> 1.10
fpcmp.ll updated: 1.4 -> 1.5
fpconv.ll updated: 1.3 -> 1.4
---
Log message:
cleanup some tests
---
Diffs of the changes: (+43 -45)
fp.ll | 34 +++---
fpcmp.ll |8 +--
Changes in directory llvm/lib/Target/X86:
X86ATTAsmPrinter.cpp updated: 1.67 -> 1.68
X86AsmPrinter.cpp updated: 1.201 -> 1.202
---
Log message:
Adding linkonce linkage codegeneration support for mingw32\cygwin
targets.
---
Diffs of the changes: (+26 -1)
X86ATTAsmPrinter.cpp | 14 +++
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.62 -> 1.63
---
Log message:
add FABSS and FABSD
---
Diffs of the changes: (+8 -0)
ARMInstrInfo.td |8
1 files changed, 8 insertions(+)
Index: llvm/lib/Target/ARM/ARMInstrInfo.td
diff -u llvm/lib/Target/ARM/
Changes in directory llvm/test/Regression/CodeGen/ARM:
fparith.ll updated: 1.4 -> 1.5
---
Log message:
add FABSS and FABSD
---
Diffs of the changes: (+16 -0)
fparith.ll | 16
1 files changed, 16 insertions(+)
Index: llvm/test/Regression/CodeGen/ARM/fparith.ll
diff -u l
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.72 -> 1.73
---
Log message:
expand ISD::SDIV, ISD::UDIV, ISD::SREM and ISD::UREM
---
Diffs of the changes: (+4 -0)
ARMISelDAGToDAG.cpp |4
1 files changed, 4 insertions(+)
Index: llvm/lib/Target/ARM/ARMISel
Changes in directory llvm/include/llvm/CodeGen:
SelectionDAG.h updated: 1.138 -> 1.139
SelectionDAGNodes.h updated: 1.154 -> 1.155
---
Log message:
Split PRE_INDEXED to PRE_INC / PRE_DEC and similarly for POST_INDEXED.
---
Diffs of the changes: (+14 -8)
SelectionDAG.h |1 +
Selecti
Changes in directory llvm/test/Regression/CodeGen/ARM:
div.ll added (r1.1)
---
Log message:
expand ISD::SDIV, ISD::UDIV, ISD::SREM and ISD::UREM
---
Diffs of the changes: (+29 -0)
div.ll | 29 +
1 files changed, 29 insertions(+)
Index: llvm/test/Regression/C
Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAGPrinter.cpp updated: 1.39 -> 1.40
---
Log message:
Fix printer for StoreSDNode.
---
Diffs of the changes: (+5 -4)
SelectionDAGPrinter.cpp |9 +
1 files changed, 5 insertions(+), 4 deletions(-)
Index: llvm/lib/Code
Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAG.cpp updated: 1.353 -> 1.354
---
Log message:
Reflect MemOpAddrMode change; added a helper to create pre-indexed load.
---
Diffs of the changes: (+68 -4)
SelectionDAG.cpp | 72 +
Changes in directory llvm/lib/CodeGen/SelectionDAG:
DAGCombiner.cpp updated: 1.228 -> 1.229
---
Log message:
Fix CodeGen/PowerPC/2006-10-17-brcc-miscompile.ll
---
Diffs of the changes: (+1 -1)
DAGCombiner.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/CodeG
Changes in directory llvm/test/Regression/CodeGen/PowerPC:
2006-10-17-brcc-miscompile.ll added (r1.1)
---
Log message:
new testcase, miscompilation of llvm with itself.
---
Diffs of the changes: (+24 -0)
2006-10-17-brcc-miscompile.ll | 24
1 files changed, 24 ins
Changes in directory llvm/include/llvm/CodeGen:
MachineDebugInfo.h updated: 1.39 -> 1.40
---
Log message:
minor cleanups
---
Diffs of the changes: (+1 -5)
MachineDebugInfo.h |6 +-
1 files changed, 1 insertion(+), 5 deletions(-)
Index: llvm/include/llvm/CodeGen/MachineDebugInfo.h
Changes in directory llvm/lib/CodeGen:
DwarfWriter.cpp updated: 1.82 -> 1.83
MachineDebugInfo.cpp updated: 1.48 -> 1.49
---
Log message:
Do not leak all of the SourceLineInfo objects. Do not bother mallocing each
one separately.
---
Diffs of the changes: (+15 -14)
DwarfWriter.cpp |
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.63 -> 1.64
---
Log message:
add the FPUnaryOp and DFPUnaryOp classes
---
Diffs of the changes: (+14 -15)
ARMInstrInfo.td | 29 ++---
1 files changed, 14 insertions(+), 15 deletions(-)
Index: ll
Changes in directory llvm/include/llvm/Target:
TargetInstrInfo.h updated: 1.94 -> 1.95
---
Log message:
update comment
---
Diffs of the changes: (+4 -2)
TargetInstrInfo.h |6 --
1 files changed, 4 insertions(+), 2 deletions(-)
Index: llvm/include/llvm/Target/TargetInstrInfo.h
dif
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.h updated: 1.17 -> 1.18
---
Log message:
expose DWARF_LABEL opcode# so the branch folder can update debug info properly.
---
Diffs of the changes: (+7 -0)
PPCInstrInfo.h |7 +++
1 files changed, 7 insertions(+)
Index: ll
Changes in directory llvm/include/llvm/Target:
TargetInstrInfo.h updated: 1.95 -> 1.96
---
Log message:
expose DWARF_LABEL opcode# so the branch folder can update debug info properly.
---
Diffs of the changes: (+7 -0)
TargetInstrInfo.h |7 +++
1 files changed, 7 insertions(+)
In
Changes in directory llvm/lib/Target/X86:
X86InstrInfo.cpp updated: 1.62 -> 1.63
X86InstrInfo.h updated: 1.55 -> 1.56
---
Log message:
expose DWARF_LABEL opcode# so the branch folder can update debug info properly.
---
Diffs of the changes: (+12 -0)
X86InstrInfo.cpp |7 +++
X86Ins
Changes in directory llvm/include/llvm/CodeGen:
DwarfWriter.h updated: 1.40 -> 1.41
MachineDebugInfo.h updated: 1.40 -> 1.41
---
Log message:
Do not leak all of the SourceLineInfo objects. Do not bother mallocing each
one separately.
---
Diffs of the changes: (+8 -3)
DwarfWriter.h |
Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAG.cpp updated: 1.354 -> 1.355
---
Log message:
Trivial patch to speed up legalizing common i64 constants.
---
Diffs of the changes: (+7 -0)
SelectionDAG.cpp |7 +++
1 files changed, 7 insertions(+)
Index: llvm/lib/Cod
Changes in directory llvm/include/llvm/CodeGen:
MachineDebugInfo.h updated: 1.41 -> 1.42
---
Log message:
add a method to remove a line # record.
---
Diffs of the changes: (+5 -0)
MachineDebugInfo.h |5 +
1 files changed, 5 insertions(+)
Index: llvm/include/llvm/CodeGen/MachineDe
Changes in directory llvm/lib/CodeGen:
BranchFolding.cpp updated: 1.13 -> 1.14
---
Log message:
Teach the branch folder to update debug info if it removes blocks with line
# notes in it.
---
Diffs of the changes: (+23 -2)
BranchFolding.cpp | 25 +++--
1 files changed,
This llvm-gcc4 patch enabled predicate simplification pass. And now
loop unrolling is enabled only at -O2 or when -funroll-loops is used.
Index: llvm-backend.cpp
===
--- llvm-backend.cpp(revision 119002)
+++ llvm-backend.cpp
Changes in directory llvm/lib/CodeGen:
MachineDebugInfo.cpp updated: 1.49 -> 1.50
---
Log message:
add a method to remove a line # record.
---
Diffs of the changes: (+14 -0)
MachineDebugInfo.cpp | 14 ++
1 files changed, 14 insertions(+)
Index: llvm/lib/CodeGen/MachineDebug
Anton, are you sure this is right? linkonce is probably !=
".linkonce". Please check the semantics carefully, can you cite some
docs on what ".linkonce" does?
Emitting LLVM linkonce symbols the same as LLVM weak symbols should
always be safe.
Thanks,
-Chris
On Oct 17, 2006, at 1:30 PM,
Changes in directory llvm/lib/Target/PowerPC:
PPCISelLowering.cpp updated: 1.212 -> 1.213
---
Log message:
Expand alloca for ppc64
---
Diffs of the changes: (+2 -1)
PPCISelLowering.cpp |3 ++-
1 files changed, 2 insertions(+), 1 deletion(-)
Index: llvm/lib/Target/PowerPC/PPCISelLower
Changes in directory llvm/lib/Target/PowerPC:
PPCISelLowering.cpp updated: 1.213 -> 1.214
---
Log message:
set the ppc64 stack pointer right, dynamic alloca now works for ppc64
---
Diffs of the changes: (+5 -1)
PPCISelLowering.cpp |6 +-
1 files changed, 5 insertions(+), 1 deletio
Changes in directory llvm/test/Regression/CodeGen/PowerPC:
2006-10-17-ppc64-alloca.ll added (r1.1)
---
Log message:
new testcase
---
Diffs of the changes: (+6 -0)
2006-10-17-ppc64-alloca.ll |6 ++
1 files changed, 6 insertions(+)
Index: llvm/test/Regression/CodeGen/PowerPC/2006-1
Now, loop unrolling is enable at -O2 only if it is not explicitly set/
reset using -f[no-]unroll-loops.
-
Devang
Index: opts.c
===
--- opts.c (revision 118611)
+++ opts.c (working copy)
@@ -548,6 +548,11 @@ void set_flags_
Changes in directory llvm/lib/VMCore:
AsmWriter.cpp updated: 1.207 -> 1.208
---
Log message:
Add support for the new "target data" information in .ll files. This provides
a better encoding of the targets data layout, rather than trying to guess it
from the endianness and pointersize like befo
Changes in directory llvm/lib/AsmParser:
llvmAsmParser.y updated: 1.265 -> 1.266
Lexer.l updated: 1.77 -> 1.78
---
Log message:
Add support for the new "target data" information in .ll files. This provides
a better encoding of the targets data layout, rather than trying to guess it
from the e
Owen,
Some comments ..
On Tue, 2006-10-17 at 21:20 -0500, Owen Anderson wrote:
>
> Changes in directory llvm/lib/AsmParser:
>
> llvmAsmParser.y updated: 1.265 -> 1.266
> Lexer.l updated: 1.77 -> 1.78
> ---
> Log message:
>
> Add support for the new "target data" information in .ll files. This
Changes in directory llvm/include/llvm:
Module.h updated: 1.73 -> 1.74
---
Log message:
Add support for the new "target data" information in .ll files. This provides
a better encoding of the targets data layout, rather than trying to guess it
from the endianness and pointersize like before.
Changes in directory llvm/docs:
Lexicon.html updated: 1.14 -> 1.15
---
Log message:
Add LCSSA to the LLVM lexicon.
---
Diffs of the changes: (+4 -1)
Lexicon.html |5 -
1 files changed, 4 insertions(+), 1 deletion(-)
Index: llvm/docs/Lexicon.html
diff -u llvm/docs/Lexicon.html:1.1
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