Changes in directory llvm/lib/CodeGen/SelectionDAG:
ScheduleDAGRRList.cpp updated: 1.4 -> 1.5
---
Log message:
Turn on -sched-commute-nodes by default.
---
Diffs of the changes: (+2 -7)
ScheduleDAGRRList.cpp |9 ++---
1 files changed, 2 insertions(+), 7 deletions(-)
Index: llvm/li
Changes in directory llvm-test:
Makefile.programs updated: 1.212 -> 1.213
---
Log message:
Set x86 llcbeta to -sched=list-tdrr
---
Diffs of the changes: (+1 -1)
Makefile.programs |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm-test/Makefile.programs
diff -u llvm-test
Changes in directory llvm/test/Regression/CodeGen/X86:
2006-05-11-InstrSched.ll updated: 1.1 -> 1.2
---
Log message:
-sched-commute-nodes is now on by default.
---
Diffs of the changes: (+1 -2)
2006-05-11-InstrSched.ll |3 +--
1 files changed, 1 insertion(+), 2 deletions(-)
Index: llv
Changes in directory llvm/test/Regression/CodeGen/ARM:
---
Log message:
Directory /var/cvs/llvm/llvm/test/Regression/CodeGen/ARM added to the repository
---
Diffs of the changes: (+0 -0)
0 files changed
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Changes in directory llvm/test/Regression/CodeGen/ARM:
dg.exp added (r1.1)
ret0.ll added (r1.1)
---
Log message:
create test/Regression/CodeGen/ARM/ and add a minimal test to it
---
Diffs of the changes: (+7 -0)
dg.exp |3 +++
ret0.ll |4
2 files changed, 7 insertions(+)
In
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.7 -> 1.8
---
Log message:
port the ARM backend to use ISD::CALL instead of LowerCallTo
---
Diffs of the changes: (+3 -12)
ARMISelDAGToDAG.cpp | 15 +++
1 files changed, 3 insertions(+), 12 deletions(-)
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.2 -> 1.3
---
Log message:
implement initial version of ARMAsmPrinter::printOperand
---
Diffs of the changes: (+31 -1)
ARMAsmPrinter.cpp | 32 +++-
1 files changed, 31 insertions(+), 1 delet
Changes in directory llvm/lib/Target/PowerPC:
PPCISelDAGToDAG.cpp updated: 1.189 -> 1.190
---
Log message:
Fix Benchmarks/MallocBench/cfrac
---
Diffs of the changes: (+2 -0)
PPCISelDAGToDAG.cpp |2 ++
1 files changed, 2 insertions(+)
Index: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
Changes in directory llvm-test/SingleSource/Benchmarks/Shootout:
fib2.c updated: 1.2 -> 1.3
---
Log message:
Fix fib2 in the PPC JIT
---
Diffs of the changes: (+3 -3)
fib2.c |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
Index: llvm-test/SingleSource/Benchmarks/Shootout/
Changes in directory llvm/lib/Target/PowerPC:
PPCISelDAGToDAG.cpp updated: 1.190 -> 1.191
---
Log message:
Fix build failure of povray
---
Diffs of the changes: (+2 -0)
PPCISelDAGToDAG.cpp |2 ++
1 files changed, 2 insertions(+)
Index: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
diff
Changes in directory llvm-test/SingleSource/Benchmarks/Shootout:
fib2.c updated: 1.3 -> 1.4
---
Log message:
Restore the problem size
---
Diffs of the changes: (+2 -2)
fib2.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
Index: llvm-test/SingleSource/Benchmarks/Shootout/f
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.212 -> 1.213
---
Log message:
Build breakage.
---
Diffs of the changes: (+11 -15)
X86ISelLowering.cpp | 26 +++---
1 files changed, 11 insertions(+), 15 deletions(-)
Index: llvm/lib/Target/X86/
Changes in directory llvm/utils/TableGen:
DAGISelEmitter.cpp updated: 1.206 -> 1.207
---
Log message:
Can't trust NodeDepth when checking for possibility of load folding creating
a cycle. This increase the search space and will increase compile time (in
practice it appears to be small, e.g. 176
Changes in directory llvm/test/Regression/CodeGen/X86:
2006-05-25-CycleInDAG.ll added (r1.1)
---
Log message:
New test case. x86 isel was creating a cycle in the DAG.
---
Diffs of the changes: (+21 -0)
2006-05-25-CycleInDAG.ll | 21 +
1 files changed, 21 insertions(+)
Changes in directory llvm/test/Regression/Transforms/InstCombine:
2006-05-10-InvalidIndexUndef.ll updated: 1.1 -> 1.2
---
Log message:
The patch corresponding to this test had to be reverted as unsafe.
---
Diffs of the changes: (+1 -0)
2006-05-10-InvalidIndexUndef.ll |1 +
1 files cha
Changes in directory llvm/lib/Transforms/Utils:
Local.cpp updated: 1.56 -> 1.57
---
Log message:
Revert a patch that is unsafe, due to out of range array accesses in inner
array scopes possibly accessing valid memory in outer subscripts.
---
Diffs of the changes: (+2 -2)
Local.cpp |4 +
Changes in directory llvm/lib/Target/X86:
X86ATTAsmPrinter.cpp updated: 1.47 -> 1.48
X86AsmPrinter.cpp updated: 1.181 -> 1.182
X86AsmPrinter.h updated: 1.18 -> 1.19
X86Subtarget.cpp updated: 1.26 -> 1.27
---
Log message:
X86 / Cygwin asm / alignment fixes.
Patch contributed by Anton Korobeyniko
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.213 -> 1.214
---
Log message:
Remove some dead code.
---
Diffs of the changes: (+0 -21)
X86ISelLowering.cpp | 21 -
1 files changed, 21 deletions(-)
Index: llvm/lib/Target/X86/X86ISelLowering.c
Changes in directory llvm/lib/Target/Sparc:
SparcISelDAGToDAG.cpp updated: 1.96 -> 1.97
---
Log message:
Add support for the missing FP condition codes
---
Diffs of the changes: (+12 -6)
SparcISelDAGToDAG.cpp | 18 --
1 files changed, 12 insertions(+), 6 deletions(-)
In
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.214 -> 1.215
---
Log message:
Some clean up.
---
Diffs of the changes: (+3 -4)
X86ISelLowering.cpp |7 +++
1 files changed, 3 insertions(+), 4 deletions(-)
Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff
Changes in directory llvm/test/Regression/Transforms/InstCombine:
vec_shuffle.ll updated: 1.2 -> 1.3
---
Log message:
new testcases
---
Diffs of the changes: (+12 -0)
vec_shuffle.ll | 12
1 files changed, 12 insertions(+)
Index: llvm/test/Regression/Transforms/InstCombine/
Changes in directory llvm/lib/Transforms/Scalar:
InstructionCombining.cpp updated: 1.483 -> 1.484
---
Log message:
extract element from a shuffle vector can be trivially turned into an
extractelement from the SV's source. This implement vec_shuffle.ll:test[45]
---
Diffs of the changes: (+41
Changes in directory llvm/test/Regression/Transforms/InstCombine:
vec_shuffle.ll updated: 1.3 -> 1.4
---
Log message:
new testcase
---
Diffs of the changes: (+8 -0)
vec_shuffle.ll |8
1 files changed, 8 insertions(+)
Index: llvm/test/Regression/Transforms/InstCombine/vec_shu
Changes in directory llvm/lib/Transforms/Scalar:
InstructionCombining.cpp updated: 1.484 -> 1.485
---
Log message:
Turn (cast (shuffle (cast)) -> shuffle (cast) if it reduces the # casts in
the program. This exposes more opportunities for the instcombiner, and
implements
vec_shuffle.ll:test6
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.215 -> 1.216
---
Log message:
Consistency
---
Diffs of the changes: (+3 -0)
X86ISelLowering.cpp |3 +++
1 files changed, 3 insertions(+)
Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/
Changes in directory llvm/lib/Transforms/Scalar:
InstructionCombining.cpp updated: 1.485 -> 1.486
---
Log message:
Introduce a helper function that simplifies interpretation of shuffle masks.
No functionality change.
---
Diffs of the changes: (+64 -91)
InstructionCombining.cpp | 155 +
Changes in directory llvm/lib/Transforms/Scalar:
InstructionCombining.cpp updated: 1.486 -> 1.487
---
Log message:
Transform things like (splat(splat)) -> splat
---
Diffs of the changes: (+50 -4)
InstructionCombining.cpp | 54 +++
1 files chang
Changes in directory llvm/lib/Target/X86:
X86AsmPrinter.cpp updated: 1.182 -> 1.183
---
Log message:
Minor bug caught by Ashwin Chandra
---
Diffs of the changes: (+1 -1)
X86AsmPrinter.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Target/X86/X86AsmPrinter.cp
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