Changes in directory llvm/utils/TableGen:
CodeGenTarget.cpp updated: 1.63 -> 1.64
CodeGenTarget.h updated: 1.25 -> 1.26
DAGISelEmitter.cpp updated: 1.202 -> 1.203
---
Log message:
Allow patterns to refer to physical registers that belong to multiple
register classes.
---
Diffs of the changes:
Changes in directory llvm:
configure updated: 1.228 -> 1.229
---
Log message:
Make sure to default ${prefix} to /usr/local if the user didn't specify it.
This assists with getting around configure's late binding values so that
our LLVM variables don't end up with a "NONE" prefix.
---
Diffs of
Changes in directory llvm/autoconf:
configure.ac updated: 1.225 -> 1.226
---
Log message:
Make sure to default ${prefix} to /usr/local if the user didn't specify it.
This assists with getting around configure's late binding values so that
our LLVM variables don't end up with a "NONE" prefix.
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.203 -> 1.204
---
Log message:
Fix a bug I introduced yesterday, which broke functions with *no* arguments.
---
Diffs of the changes: (+7 -0)
X86ISelLowering.cpp |7 +++
1 files changed, 7 insertions(+)
Index
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.204 -> 1.205
---
Log message:
Implement the custom lowering hook right, returning values for all of the
arguments at once.
---
Diffs of the changes: (+5 -1)
X86ISelLowering.cpp |6 +-
1 files changed, 5 insert
Changes in directory llvm/test/Regression/CodeGen/X86:
lea.ll (r1.2) removed
---
Log message:
Remove this xfail-d test, which doesn't make any sense
---
Diffs of the changes: (+0 -0)
0 files changed
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Changes in directory llvm/lib/CodeGen/SelectionDAG:
DAGCombiner.cpp updated: 1.169 -> 1.170
---
Log message:
Move this code to a common place
---
Diffs of the changes: (+14 -238)
DAGCombiner.cpp | 252 +++-
1 files changed, 14 insertions(
Changes in directory llvm/lib/Target/Alpha:
AlphaISelLowering.cpp updated: 1.48 -> 1.49
---
Log message:
Move this code to a common place
---
Diffs of the changes: (+4 -148)
AlphaISelLowering.cpp | 152 +-
1 files changed, 4 insertions(+), 14
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.39 -> 1.40
---
Log message:
Move this code to a common place
---
Diffs of the changes: (+0 -3)
IA64ISelDAGToDAG.cpp |3 ---
1 files changed, 3 deletions(-)
Index: llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp
diff
Changes in directory llvm/include/llvm/Target:
TargetLowering.h updated: 1.71 -> 1.72
---
Log message:
Move this code to a common place
---
Diffs of the changes: (+10 -0)
TargetLowering.h | 10 ++
1 files changed, 10 insertions(+)
Index: llvm/include/llvm/Target/TargetLowering.h
Changes in directory llvm/lib/Target:
TargetLowering.cpp updated: 1.62 -> 1.63
---
Log message:
Move this code to a common place
---
Diffs of the changes: (+265 -0)
TargetLowering.cpp | 265 +
1 files changed, 265 insertions(+)
Index: l
Changes in directory llvm/lib/Target:
TargetLowering.cpp updated: 1.63 -> 1.64
---
Log message:
this should be 128 I think
---
Diffs of the changes: (+1 -1)
TargetLowering.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Target/TargetLowering.cpp
diff -u llvm/
Changes in directory llvm/lib/Target/PowerPC:
PPCISelLowering.cpp updated: 1.171 -> 1.172
PPCISelLowering.h updated: 1.47 -> 1.48
---
Log message:
Switch the PPC backend over to using FORMAL_ARGUMENTS for formal argument
handling. This makes the lower argument code significantly simpler (we
on
Changes in directory llvm/test/Regression/CodeGen/PowerPC:
vec_vrsave.ll updated: 1.1 -> 1.2
---
Log message:
Another testcase that shouldn't need vrsave twiddling
---
Diffs of the changes: (+7 -1)
vec_vrsave.ll |8 +++-
1 files changed, 7 insertions(+), 1 deletion(-)
Index: llvm
Changes in directory llvm/lib/Target/PowerPC:
PPCISelLowering.cpp updated: 1.172 -> 1.173
---
Log message:
Vector args passed in registers don't reserve stack space.
---
Diffs of the changes: (+26 -11)
PPCISelLowering.cpp | 37 ++---
1 files changed, 26 in
Changes in directory llvm/lib/Target/PowerPC:
PPCISelLowering.cpp updated: 1.173 -> 1.174
---
Log message:
Simplify the dead argument handling code.
---
Diffs of the changes: (+11 -28)
PPCISelLowering.cpp | 39 +++
1 files changed, 11 insertions(+), 28
Changes in directory llvm/lib/Target/PowerPC:
PPCISelLowering.cpp updated: 1.174 -> 1.175
---
Log message:
Simplify the argument counting logic by only incrementing the index.
---
Diffs of the changes: (+11 -14)
PPCISelLowering.cpp | 25 +++--
1 files changed, 11 ins
Changes in directory llvm/include/llvm/Target:
TargetLowering.h updated: 1.72 -> 1.73
---
Log message:
There is now a default impl of this method
---
Diffs of the changes: (+1 -1)
TargetLowering.h |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/include/llvm/Target/
Changes in directory llvm/include/llvm/CodeGen:
SelectionDAGNodes.h updated: 1.131 -> 1.132
---
Log message:
Add a new CALL node.
---
Diffs of the changes: (+7 -0)
SelectionDAGNodes.h |7 +++
1 files changed, 7 insertions(+)
Index: llvm/include/llvm/CodeGen/SelectionDAGNodes.h
di
Changes in directory llvm/lib/CodeGen/SelectionDAG:
LegalizeDAG.cpp updated: 1.374 -> 1.375
SelectionDAG.cpp updated: 1.307 -> 1.308
SelectionDAGISel.cpp updated: 1.242 -> 1.243
---
Log message:
Add a new ISD::CALL node, make the default impl of TargetLowering::LowerCallTo
produce it.
---
Dif
Changes in directory llvm/lib/Target/PowerPC:
PPCISelLowering.cpp updated: 1.175 -> 1.176
PPCISelLowering.h updated: 1.48 -> 1.49
---
Log message:
Instead of implementing LowerCallTo directly, let the default impl produce an
ISD::CALL node, then custom lower that. This means that we only have
Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAGISel.cpp updated: 1.243 -> 1.244
---
Log message:
Add support for calls that pass and return legal vectors.
---
Diffs of the changes: (+60 -3)
SelectionDAGISel.cpp | 63 ---
1
Changes in directory llvm/lib/Target/PowerPC:
PPCISelDAGToDAG.cpp updated: 1.184 -> 1.185
PPCISelLowering.cpp updated: 1.176 -> 1.177
---
Log message:
implement passing/returning vector regs to calls, at least non-varargs calls.
---
Diffs of the changes: (+54 -29)
PPCISelDAGToDAG.cpp | 7
Changes in directory llvm/lib/Target/PowerPC:
PPCISelLowering.cpp updated: 1.177 -> 1.178
---
Log message:
3 changes, 2 of which are cleanup one of which changes codegen:
1. Rearrange code a bit so that the special case doesn't require indenting lots
of code.
2. Add comments describing PPC
Changes in directory llvm/test/Regression/CodeGen/PowerPC:
vec_call.ll added (r1.1)
---
Log message:
test for support to pass/return vectors to calls.
---
Diffs of the changes: (+11 -0)
vec_call.ll | 11 +++
1 files changed, 11 insertions(+)
Index: llvm/test/Regression/CodeGen/
Changes in directory llvm/test/Regression/CodeGen/PowerPC:
calls.ll added (r1.1)
---
Log message:
new test for various forms of calls
---
Diffs of the changes: (+23 -0)
calls.ll | 23 +++
1 files changed, 23 insertions(+)
Index: llvm/test/Regression/CodeGen/PowerPC/
Changes in directory llvm/test/Regression/CodeGen/PowerPC:
calls.ll updated: 1.1 -> 1.2
---
Log message:
add an external symbol testcase
---
Diffs of the changes: (+6 -1)
calls.ll |7 ++-
1 files changed, 6 insertions(+), 1 deletion(-)
Index: llvm/test/Regression/CodeGen/PowerPC/
Changes in directory llvm/lib/Target/PowerPC:
PPCISelDAGToDAG.cpp updated: 1.185 -> 1.186
PPCISelLowering.cpp updated: 1.178 -> 1.179
PPCInstrInfo.td updated: 1.218 -> 1.219
---
Log message:
Switch PPC over to a call-selection model where the lowering code creates
the copyto/fromregs instead of
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