Changes in directory llvm/lib/Target/PowerPC:
PPCInstrAltivec.td updated: 1.1 -> 1.2
---
Log message:
implement a bunch of intrinsics
---
Diffs of the changes: (+34 -3)
PPCInstrAltivec.td | 37 ++---
1 files changed, 34 insertions(+), 3 deletions(-)
Inde
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.131 -> 1.132
X86ISelLowering.h updated: 1.42 -> 1.43
X86InstrSSE.td updated: 1.30 -> 1.31
---
Log message:
Build arbitrary vector with more than 2 distinct scalar elements with a
series of unpack and interleave ops.
---
Changes in directory llvm/lib/Target/X86:
X86InstrInfo.td updated: 1.258 -> 1.259
---
Log message:
Added missing (any_extend (load ...)) patterns.
---
Diffs of the changes: (+3 -0)
X86InstrInfo.td |3 +++
1 files changed, 3 insertions(+)
Index: llvm/lib/Target/X86/X86InstrInfo.td
diff
Changes in directory llvm/test/Regression/CodeGen/X86:
vec_set.ll added (r1.1)
---
Log message:
Add a BUILD_VECTOR with unpack and interleave testcase.
---
Diffs of the changes: (+14 -0)
vec_set.ll | 14 ++
1 files changed, 14 insertions(+)
Index: llvm/test/Regression/CodeGe
Changes in directory llvm/lib/VMCore:
AutoUpgrade.cpp updated: 1.16 -> 1.17
---
Log message:
Cast instruction not inserted into basic block.
---
Diffs of the changes: (+5 -41)
AutoUpgrade.cpp | 46 +-
1 files changed, 5 insertions(+), 41 deleti
Changes in directory llvm/include/llvm/Assembly:
AutoUpgrade.h updated: 1.5 -> 1.6
---
Log message:
Unused function - easier to throw away than fix.
---
Diffs of the changes: (+0 -8)
AutoUpgrade.h |8
1 files changed, 8 deletions(-)
Index: llvm/include/llvm/Assembly/AutoUpgr
Changes in directory llvm/lib/VMCore:
Instructions.cpp updated: 1.31 -> 1.32
---
Log message:
Teach BinaryOperator::createNot to work with packed integer types
---
Diffs of the changes: (+9 -2)
Instructions.cpp | 11 +--
1 files changed, 9 insertions(+), 2 deletions(-)
Index: l
Changes in directory llvm/lib/Transforms/Scalar:
InstructionCombining.cpp updated: 1.452 -> 1.453
---
Log message:
Don't crash on packed logical ops
---
Diffs of the changes: (+6 -3)
InstructionCombining.cpp |9 ++---
1 files changed, 6 insertions(+), 3 deletions(-)
Index: llvm/l
Changes in directory llvm/utils/TableGen:
DAGISelEmitter.cpp updated: 1.187 -> 1.188
---
Log message:
Add a missing check which cause an invalid .td file to crash tblgen
---
Diffs of the changes: (+3 -0)
DAGISelEmitter.cpp |3 +++
1 files changed, 3 insertions(+)
Index: llvm/utils/Ta
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrAltivec.td updated: 1.2 -> 1.3
---
Log message:
Add some logical operations
---
Diffs of the changes: (+19 -3)
PPCInstrAltivec.td | 22 +++---
1 files changed, 19 insertions(+), 3 deletions(-)
Index: llvm/lib/Target/
Changes in directory llvm/lib/CodeGen/SelectionDAG:
DAGCombiner.cpp updated: 1.128 -> 1.129
---
Log message:
Don't call SimplifyDemandedBits on vectors
---
Diffs of the changes: (+2 -1)
DAGCombiner.cpp |3 ++-
1 files changed, 2 insertions(+), 1 deletion(-)
Index: llvm/lib/CodeGen/Se
Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAG.cpp updated: 1.281 -> 1.282
---
Log message:
Implement the ISD::isBuildVectorAllOnesInteger predicate
---
Diffs of the changes: (+32 -1)
SelectionDAG.cpp | 33 -
1 files changed, 32 insertion
Changes in directory llvm/include/llvm/CodeGen:
SelectionDAGNodes.h updated: 1.120 -> 1.121
---
Log message:
Add a predicate
---
Diffs of the changes: (+7 -0)
SelectionDAGNodes.h |7 +++
1 files changed, 7 insertions(+)
Index: llvm/include/llvm/CodeGen/SelectionDAGNodes.h
diff -u
Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAG.cpp updated: 1.282 -> 1.283
---
Log message:
Fix a bug in ISD::isBuildVectorAllOnesInteger that caused it to always return
false
---
Diffs of the changes: (+3 -2)
SelectionDAG.cpp |5 +++--
1 files changed, 3 insertions(
Changes in directory llvm/lib/Target:
TargetSelectionDAG.td updated: 1.58 -> 1.59
---
Log message:
add a vnot helper node for matching 'not' on vectors
---
Diffs of the changes: (+6 -2)
TargetSelectionDAG.td |8 ++--
1 files changed, 6 insertions(+), 2 deletions(-)
Index: llvm/li
Changes in directory llvm/lib/CodeGen:
RegAllocLinearScan.cpp updated: 1.119 -> 1.120
---
Log message:
Add some comments.
---
Diffs of the changes: (+4 -0)
RegAllocLinearScan.cpp |4
1 files changed, 4 insertions(+)
Index: llvm/lib/CodeGen/RegAllocLinearScan.cpp
diff -u llvm/lib
Changes in directory llvm/test/Regression/CodeGen/PowerPC:
eqv-andc-orc-nor.ll updated: 1.2 -> 1.3
---
Log message:
new testcases
---
Diffs of the changes: (+27 -2)
eqv-andc-orc-nor.ll | 29 +++--
1 files changed, 27 insertions(+), 2 deletions(-)
Index: llvm/tes
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrAltivec.td updated: 1.3 -> 1.4
---
Log message:
add patterns for VANDC/VNOR, implementing
CodeGen/PowerPC/eqv-andc-orc-nor.ll:VNOR/VANDC
---
Diffs of the changes: (+8 -3)
PPCInstrAltivec.td | 11 ---
1 files changed, 8 insert
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrAltivec.td updated: 1.4 -> 1.5
---
Log message:
fix the pattern for vandc, it's NOT vnand
---
Diffs of the changes: (+3 -3)
PPCInstrAltivec.td |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
Index: llvm/lib/Target/Powe
Changes in directory llvm/test/Regression/CodeGen/PowerPC:
eqv-andc-orc-nor.ll updated: 1.3 -> 1.4
---
Log message:
Correct the vandc testcase
---
Diffs of the changes: (+3 -3)
eqv-andc-orc-nor.ll |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
Index: llvm/test/Regression
Changes in directory llvm/include/llvm:
Intrinsics.td updated: 1.25 -> 1.26
---
Log message:
add int_ppc_altivec_vsldoi intrinsic
---
Diffs of the changes: (+4 -0)
Intrinsics.td |4
1 files changed, 4 insertions(+)
Index: llvm/include/llvm/Intrinsics.td
diff -u llvm/include/llvm
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrAltivec.td updated: 1.5 -> 1.6
PPCInstrFormats.td updated: 1.67 -> 1.68
---
Log message:
implement the vsldoi intrinsic.
---
Diffs of the changes: (+26 -4)
PPCInstrAltivec.td | 12
PPCInstrFormats.td | 18 ++
Changes in directory llvm/include/llvm:
Intrinsics.td updated: 1.26 -> 1.27
---
Log message:
Add saturating subtracts, non-predicate compares, and some other random
intrinsics.
---
Diffs of the changes: (+71 -2)
Intrinsics.td | 73 -
Changes in directory llvm/include/llvm:
IntrinsicsPowerPC.td added (r1.1)
IntrinsicsX86.td added (r1.1)
Intrinsics.td updated: 1.27 -> 1.28
---
Log message:
Split the PPC and X86 intrinsics out to their own files.
---
Diffs of the changes: (+403 -378)
Intrinsics.td| 380 --
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrAltivec.td updated: 1.6 -> 1.7
---
Log message:
Add and 8/16-bit adds, add all integer subtracts, add saturating subtract
intrinsics.
---
Diffs of the changes: (+53 -3)
PPCInstrAltivec.td | 56 +
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrAltivec.td updated: 1.7 -> 1.8
PPCInstrFormats.td updated: 1.68 -> 1.69
---
Log message:
Add all of the altivec comparison instructions. Add patterns for the
non-predicate altivec compare intrinsics.
---
Diffs of the changes: (+108 -5)
Changes in directory llvm/lib/VMCore:
Makefile updated: 1.13 -> 1.14
---
Log message:
Update dependencies to reflect split of the Intrinsics.td file
---
Diffs of the changes: (+5 -2)
Makefile |7 +--
1 files changed, 5 insertions(+), 2 deletions(-)
Index: llvm/lib/VMCore/Makefile
Changes in directory llvm/include/llvm:
IntrinsicsPowerPC.td updated: 1.1 -> 1.2
---
Log message:
Add predicate comparison intrinsics.
---
Diffs of the changes: (+44 -0)
IntrinsicsPowerPC.td | 44
1 files changed, 44 insertions(+)
Index: llv
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