Author: sheng
Date: Fri Jul 6 01:01:16 2007
New Revision: 37936
URL: http://llvm.org/viewvc/llvm-project?rev=37936&view=rev
Log:
Correct a typo.
Modified:
llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp
Modified: llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp
URL:
http
Hi Dan,
I've committed this:
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-
Mon-20070702/051079.html
as a workaround. Please figure out a proper fix. Thanks!
Evan
On Jul 5, 2007, at 5:52 PM, Evan Cheng wrote:
> Hi Dan,
>
> Ok, this is the problem:
>
> li r4, 124
>
Author: evancheng
Date: Thu Jul 5 20:47:35 2007
New Revision: 37935
URL: http://llvm.org/viewvc/llvm-project?rev=37935&view=rev
Log:
Workaround of getCopyToRegs and getCopyFromRegs bugs for big-endian machines.
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Modified: llv
Author: evancheng
Date: Thu Jul 5 20:37:28 2007
New Revision: 37934
URL: http://llvm.org/viewvc/llvm-project?rev=37934&view=rev
Log:
Change CalculateHeights and CalculateDepths to be non-recursive.
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
Modified: llvm/trunk/lib/CodeGe
Author: evancheng
Date: Thu Jul 5 20:05:26 2007
New Revision: 37933
URL: http://llvm.org/viewvc/llvm-project?rev=37933&view=rev
Log:
Refactor code to add initial support for OptionalDefOperand.
Modified:
llvm/trunk/utils/TableGen/DAGISelEmitter.cpp
llvm/trunk/utils/TableGen/DAGISelEmitte
Author: evancheng
Date: Thu Jul 5 20:01:34 2007
New Revision: 37932
URL: http://llvm.org/viewvc/llvm-project?rev=37932&view=rev
Log:
Print the s bit if the instruction is toggled to its CPSR setting form.
Modified:
llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp
Modified: llvm/trunk/lib/Target/
Author: evancheng
Date: Thu Jul 5 20:00:49 2007
New Revision: 37931
URL: http://llvm.org/viewvc/llvm-project?rev=37931&view=rev
Log:
PredicateDefOperand -> OptionalDefOperand.
Modified:
llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL:
http:
Author: evancheng
Date: Thu Jul 5 20:00:16 2007
New Revision: 37930
URL: http://llvm.org/viewvc/llvm-project?rev=37930&view=rev
Log:
Add OptionalDefOperand to stand for optionally defined result.
Modified:
llvm/trunk/lib/Target/Target.td
Modified: llvm/trunk/lib/Target/Target.td
URL:
http:
Hi Dan,
Ok, this is the problem:
li r4, 124
li r30, 0
mr r2, r30
mr r29, r30
LBB1_1: ;bb
li r3, lo16(LCPI1_0)
rlwinm r5, r4, 3, 29, 29
addis r3, r3, ha16(LCPI1_0)
stw r4, 64(r1)
stw r30, 68(r1)
The last two instruct
Here is a much simpler test case:
SingleSource/UnitTests/2005-05-12-Int64ToFP.c:
I am still trying to figure out what exactly is wrong.
Evan
On Jul 5, 2007, at 4:33 PM, Bill Wendling wrote:
> On 7/5/07, Evan Cheng <[EMAIL PROTECTED]> wrote:
>>
>> On Jul 5, 2007, at 7:49 AM, Dan Gohman wrote:
>
These 2 tests are failing for me:
test/CodeGen/PowerPC/big-endian-actual-args.ll
test/CodeGen/PowerPC/big-endian-formal-args.ll
Seems like they expect it to be in the format: "addc r4, r4, r6" or
"li r6, 3"
-Tanya
On Jul 5, 2007, at 1:12 PM, Dan Gohman wrote:
> Author: djg
> Date: Thu Jul 5
On 7/5/07, Evan Cheng <[EMAIL PROTECTED]> wrote:
>
> On Jul 5, 2007, at 7:49 AM, Dan Gohman wrote:
>
> > Hi Evan,
> >
> > I'm currently testing the attached patch, which seems to fix the
> > problems for PPC. It extends getCopyToParts and getCopyFromParts
> > to have an extra parameter to indicate
Author: resistor
Date: Thu Jul 5 18:11:26 2007
New Revision: 37929
URL: http://llvm.org/viewvc/llvm-project?rev=37929&view=rev
Log:
Fix a bunch of issues found in a testcase from 400.perlbench.
Added:
llvm/trunk/test/Transforms/GVNPRE/2007-07-05-AvailabilityUpdating.ll
Modified:
llvm/tru
Author: evancheng
Date: Thu Jul 5 18:00:50 2007
New Revision: 37928
URL: http://llvm.org/viewvc/llvm-project?rev=37928&view=rev
Log:
Fix test.
Modified:
llvm/trunk/test/CodeGen/PowerPC/2007-06-28-BCCISelBug.ll
Modified: llvm/trunk/test/CodeGen/PowerPC/2007-06-28-BCCISelBug.ll
URL:
http://l
Author: lattner
Date: Thu Jul 5 17:16:19 2007
New Revision: 37927
URL: http://llvm.org/viewvc/llvm-project?rev=37927&view=rev
Log:
avoid ambiguity in target selection
Modified:
llvm/trunk/test/CodeGen/Generic/2006-01-12-BadSetCCFold.ll
Modified: llvm/trunk/test/CodeGen/Generic/2006-01-12-Ba
Committed. Thanks!
Evan
On Jul 3, 2007, at 10:35 AM, Raul Fernandes Herbster wrote:
I received very important comments from Evan and fixed some
problems. Thanks for any suggestion.
[]'s
--
Raul Fernandes Herbster
Embedded and Pervasive Computing Laboratory - embedded.dee.ufcg.edu.br
Electr
Author: evancheng
Date: Thu Jul 5 16:15:40 2007
New Revision: 37926
URL: http://llvm.org/viewvc/llvm-project?rev=37926&view=rev
Log:
Initial ARM JIT support by Raul Fernandes Herbster.
Added:
llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp
llvm/trunk/lib/Target/ARM/ARMJITInfo.cpp
llvm/t
On Jul 5, 2007, at 7:49 AM, Dan Gohman wrote:
> Hi Evan,
>
> I'm currently testing the attached patch, which seems to fix the
> problems for PPC. It extends getCopyToParts and getCopyFromParts
> to have an extra parameter to indicate when endian-swapping is
> needed. I don't have access to a PPC
Chris,
> Is it possible to write a testcase for this?
I'm thinking about it. Seems to be somehow tricky, because only
instructions order matters, but I'll try.
--
With best regards, Anton Korobeynikov.
Faculty of Mathematics & Mechanics, Saint Petersburg State University.
> Log:
> Proper flag __alloca call
Thanks Anton!
Is it possible to write a testcase for this?
-Chris
> Modified:
> llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
>
> Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/
On Jul 5, 2007, at 9:09 AM, Chris Lattner wrote:
> Hi Evan,
>
>> +/// execute". If isOutput is true, then this is output operand.
>
> I don't get it. What is an "output predicate"? I see you use this
> in the arm backend:
>
> +// Conditional code result for cmp, etc.
> +//
> +def cc_out : Predi
Author: djg
Date: Thu Jul 5 15:40:15 2007
New Revision: 37925
URL: http://llvm.org/viewvc/llvm-project?rev=37925&view=rev
Log:
Add explicit keywords.
Modified:
llvm/trunk/include/llvm/CodeGen/IntrinsicLowering.h
llvm/trunk/include/llvm/CodeGen/MachineModuleInfo.h
llvm/trunk/include/l
Author: djg
Date: Thu Jul 5 15:39:35 2007
New Revision: 37924
URL: http://llvm.org/viewvc/llvm-project?rev=37924&view=rev
Log:
Make MachineFunctionPass::runOnFunction non-virtual. Subclasses override
the virtual function runOnMachineFunction instead. And add access specifiers.
Modified:
llvm
Author: asl
Date: Thu Jul 5 15:36:08 2007
New Revision: 37923
URL: http://llvm.org/viewvc/llvm-project?rev=37923&view=rev
Log:
Proper flag __alloca call
Modified:
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL:
http://llvm.org/view
Author: djg
Date: Thu Jul 5 15:15:43 2007
New Revision: 37922
URL: http://llvm.org/viewvc/llvm-project?rev=37922&view=rev
Log:
Make the debug string for ISD::MERGE_VALUES consistent with the others.
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Modified: llvm/trunk/lib/Code
Author: djg
Date: Thu Jul 5 15:12:34 2007
New Revision: 37921
URL: http://llvm.org/viewvc/llvm-project?rev=37921&view=rev
Log:
Add a parameter to getCopyToParts and getCopyFromParts to specify whether
endian swapping should be done, and update the code to use it. This fixes
some register ordering
On Jul 5, 2007, at 10:59 AM, Rafael Espindola wrote:
> The first email bounced, so lets try again.
>
> This patch implements the first part of the proposed solution to bug
> 1521. It adds the byval attribute and propagates it to DAG level.
>
> The patch also changes the matching code for CCIfType
The first email bounced, so lets try again.
This patch implements the first part of the proposed solution to bug
1521. It adds the byval attribute and propagates it to DAG level.
The patch also changes the matching code for CCIfType, so that no
backend matches a byval argument. Instead, a backen
Yes if PPC::CR0 stands for 0.
Evan
On Jul 5, 2007, at 9:10 AM, Chris Lattner wrote:
>> URL: http://llvm.org/viewvc/llvm-project?rev=37893&view=rev
>> Log:
>> PPC conditional branch predicate does not change after isel.
>>
>> Modified:
>> llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td
>>
>> Mo
Author: evancheng
Date: Thu Jul 5 12:21:33 2007
New Revision: 37917
URL: http://llvm.org/viewvc/llvm-project?rev=37917&view=rev
Log:
Doh
Modified:
llvm/trunk/lib/Target/Makefile
Modified: llvm/trunk/lib/Target/Makefile
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Makefile
Author: lattner
Date: Thu Jul 5 12:18:32 2007
New Revision: 37916
URL: http://llvm.org/viewvc/llvm-project?rev=37916&view=rev
Log:
remove a dead case
Modified:
llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp
Modified: llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp
URL:
http://llvm.org/vie
Author: evancheng
Date: Thu Jul 5 12:13:56 2007
New Revision: 37915
URL: http://llvm.org/viewvc/llvm-project?rev=37915&view=rev
Log:
Unbreak the build.
Modified:
llvm/trunk/lib/Target/Makefile
Modified: llvm/trunk/lib/Target/Makefile
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/
Author: evancheng
Date: Thu Jul 5 12:13:19 2007
New Revision: 37914
URL: http://llvm.org/viewvc/llvm-project?rev=37914&view=rev
Log:
Unbreak the build.
Modified:
llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL:
http://llvm.org/viewvc/llvm-p
Thanks for doing this!
-Tanya
On Jul 4, 2007, at 2:55 PM, Gabor Greif wrote:
> Author: ggreif
> Date: Wed Jul 4 16:55:50 2007
> New Revision: 37877
>
> URL: http://llvm.org/viewvc/llvm-project?rev=37877&view=rev
> Log:
> Pretty straightforward replacement of "bytecode" by "bitcode"
> performed
Author: johannes
Date: Thu Jul 5 11:56:24 2007
New Revision: 37912
URL: http://llvm.org/viewvc/llvm-project?rev=37912&view=rev
Log:
Record my recent work.
Modified:
llvm/trunk/CREDITS.TXT
Modified: llvm/trunk/CREDITS.TXT
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/CREDITS.TXT?rev=3
Revision: 129234
Author: clattner
Date: 2007-07-05 09:15:46 -0700 (Thu, 05 Jul 2007)
Log Message:
---
exception handling tweaks from Duncan:
(1) Fix some comments.
(2) Correct off-by-one in test for branching within the same scope
(currently it never triggers, but comes out in the w
Author: lattner
Date: Thu Jul 5 11:11:52 2007
New Revision: 37911
URL: http://llvm.org/viewvc/llvm-project?rev=37911&view=rev
Log:
the arm backend is not building, temporarily disable it.
Modified:
llvm/trunk/lib/Target/Makefile
Modified: llvm/trunk/lib/Target/Makefile
URL:
http://llvm.or
> URL: http://llvm.org/viewvc/llvm-project?rev=37893&view=rev
> Log:
> PPC conditional branch predicate does not change after isel.
>
> Modified:
> llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td
>
> Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td
> URL: http://llvm.org/viewvc/llvm-projec
Hi Evan,
> +/// execute". If isOutput is true, then this is output operand.
I don't get it. What is an "output predicate"? I see you use this
in the arm backend:
+// Conditional code result for cmp, etc.
+//
+def cc_out : PredicateResultOperand {
let PrintMethod = "printPredicateOperand"
Changes in directory llvm-www/ProjectsWithLLVM:
index.html updated: 1.37 -> 1.38
---
Log message:
add faust
---
Diffs of the changes: (+29 -0)
index.html | 29 +
1 files changed, 29 insertions(+)
Index: llvm-www/ProjectsWithLLVM/index.html
diff -u llvm-www/P
Author: lattner
Date: Thu Jul 5 10:59:37 2007
New Revision: 37910
URL: http://llvm.org/viewvc/llvm-project?rev=37910&view=rev
Log:
add Faust
Modified:
website/trunk/AdvApps.html
Modified: website/trunk/AdvApps.html
URL:
http://llvm.org/viewvc/llvm-project/website/trunk/AdvApps.html?rev=37
On Jul 5, 2007, at 1:00 AM, Reid Spencer wrote:
> On Thu, 2007-07-05 at 00:33 -0700, Reid Spencer wrote:
>>>
>>> Wow, this sucks. Instead of telling me everything, it told me
>>> nothing.
>>
>> The defaults were set too low for both the size of the email
>> (100K) and
>> the maximum number o
Author: dpatel
Date: Thu Jul 5 10:32:03 2007
New Revision: 37909
URL: http://llvm.org/viewvc/llvm-project?rev=37909&view=rev
Log:
Fix PR1539. Add LoopPassPrinter.
Modified:
llvm/trunk/test/Other/2007-06-28-PassManager.ll
llvm/trunk/tools/opt/opt.cpp
Modified: llvm/trunk/test/Other/200
Author: baldrick
Date: Thu Jul 5 10:15:01 2007
New Revision: 37908
URL: http://llvm.org/viewvc/llvm-project?rev=37908&view=rev
Log:
Make sure only one copy of a filter is placed in the
exception handling table if we encounter it multiple
times. Filters could be folded harder than this, but
that
The attached patch adds the "byval" attribute. This is the first step
to fix bug 1521.
--
Rafael Avila de Espindola
Google Ireland Ltd.
Gordon House
Barrow Street
Dublin 4
Ireland
Registered in Dublin, Ireland
Registration Number: 368047
Index: include/llvm/ParameterAttributes.h
===
Hi Evan,
I'm currently testing the attached patch, which seems to fix the
problems for PPC. It extends getCopyToParts and getCopyFromParts
to have an extra parameter to indicate when endian-swapping is
needed. I don't have access to a PPC test environment; I've included
a few trivial regression te
Author: baldrick
Date: Thu Jul 5 05:32:33 2007
New Revision: 37907
URL: http://llvm.org/viewvc/llvm-project?rev=37907&view=rev
Log:
Test commit.
Modified:
llvm/trunk/CREDITS.TXT
Modified: llvm/trunk/CREDITS.TXT
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/CREDITS.TXT?rev=37907&r1=37
Author: reid
Date: Thu Jul 5 05:12:19 2007
New Revision: 37906
URL: http://llvm.org/viewvc/llvm-project?rev=37906&view=rev
Log:
Add a note about llvm2cpp's dubious future.
Modified:
llvm/trunk/docs/CommandGuide/llvm2cpp.pod
Modified: llvm/trunk/docs/CommandGuide/llvm2cpp.pod
URL:
http://ll
Author: reid
Date: Thu Jul 5 05:00:19 2007
New Revision: 37905
URL: http://llvm.org/viewvc/llvm-project?rev=37905&view=rev
Log:
Get the version number right, finally.
Modified:
llvm/trunk/docs/Makefile
Modified: llvm/trunk/docs/Makefile
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/d
Author: reid
Date: Thu Jul 5 03:29:25 2007
New Revision: 37904
URL: http://llvm.org/viewvc/llvm-project?rev=37904&view=rev
Log:
Add a comment explaining how the module dependency thing works.
Modified:
llvm-top/trunk/Makefile
Modified: llvm-top/trunk/Makefile
URL:
http://llvm.org/viewvc/ll
Author: reid
Date: Thu Jul 5 03:25:23 2007
New Revision: 37903
URL: http://llvm.org/viewvc/llvm-project?rev=37903&view=rev
Log:
Add a comment about a nasty macro.
Modified:
llvm-top/trunk/Makefile
Modified: llvm-top/trunk/Makefile
URL:
http://llvm.org/viewvc/llvm-project/llvm-top/trunk/Mak
Author: reid
Date: Thu Jul 5 03:12:57 2007
New Revision: 37902
URL: http://llvm.org/viewvc/llvm-project?rev=37902&view=rev
Log:
Set the svn:mime-type property to text/plain, just to test the
commit messages for property modifications.
Modified:
llvm-top/trunk/README.txt (props changed)
Pr
Author: reid
Date: Thu Jul 5 03:08:02 2007
New Revision: 37901
URL: http://llvm.org/viewvc/llvm-project?rev=37901&view=rev
Log:
Minor adjustments (mostly to test commit messages).
Modified:
llvm-top/trunk/README.txt
Modified: llvm-top/trunk/README.txt
URL:
http://llvm.org/viewvc/llvm-proje
On Thu, 2007-07-05 at 00:33 -0700, Reid Spencer wrote:
> >
> > Wow, this sucks. Instead of telling me everything, it told me nothing.
>
> The defaults were set too low for both the size of the email (100K) and
> the maximum number of parts (files changed = 10). I've changed it so
> that it will
On Wed, 2007-07-04 at 23:58 -0700, Chris Lattner wrote:
> On Jul 4, 2007, at 11:04 PM, Chris Lattner wrote:
>
> > Author: lattner
> > Date: Thu Jul 5 01:04:45 2007
> > New Revision: 37887
> >
> > URL: http://llvm.org/viewvc/llvm-project?rev=37887&view=rev
> > Log:
> > initial prototype for a new
Author: evancheng
Date: Thu Jul 5 02:19:45 2007
New Revision: 37900
URL: http://llvm.org/viewvc/llvm-project?rev=37900&view=rev
Log:
Teach DAGISelEmitter about zero_reg.
Modified:
llvm/trunk/utils/TableGen/DAGISelEmitter.cpp
Modified: llvm/trunk/utils/TableGen/DAGISelEmitter.cpp
URL:
http:
Author: evancheng
Date: Thu Jul 5 02:19:29 2007
New Revision: 37899
URL: http://llvm.org/viewvc/llvm-project?rev=37899&view=rev
Log:
Instructions with ImmutablePredicateOperand aren't really predicable since
their predicates are fixed at isel time.
Modified:
llvm/trunk/utils/TableGen/CodeGe
Author: evancheng
Date: Thu Jul 5 02:18:20 2007
New Revision: 37898
URL: http://llvm.org/viewvc/llvm-project?rev=37898&view=rev
Log:
Reflects the chanegs made to PredicateOperand.
Modified:
llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp
llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
Author: evancheng
Date: Thu Jul 5 02:17:13 2007
New Revision: 37897
URL: http://llvm.org/viewvc/llvm-project?rev=37897&view=rev
Log:
Added ARM::CPSR to represent ARM CPSR status register.
Modified:
llvm/trunk/lib/Target/ARM/ARMRegisterInfo.td
Modified: llvm/trunk/lib/Target/ARM/ARMRegisterI
Author: evancheng
Date: Thu Jul 5 02:15:27 2007
New Revision: 37896
URL: http://llvm.org/viewvc/llvm-project?rev=37896&view=rev
Log:
Unfortunately we now require C++ code to isel Bcc, conditional moves, etc.
Modified:
llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp
Modified: llvm/trunk/lib/Ta
Author: evancheng
Date: Thu Jul 5 02:13:32 2007
New Revision: 37895
URL: http://llvm.org/viewvc/llvm-project?rev=37895&view=rev
Log:
Each ARM use predicate operand is now made up of two components. The new
component is the CPSR register.
Modified:
llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
Author: evancheng
Date: Thu Jul 5 02:11:03 2007
New Revision: 37894
URL: http://llvm.org/viewvc/llvm-project?rev=37894&view=rev
Log:
Added ARM::CPSR to represent ARM CPSR status register.
Modified:
llvm/trunk/lib/Target/ARM/ARMRegisterInfo.cpp
Modified: llvm/trunk/lib/Target/ARM/ARMRegister
Author: evancheng
Date: Thu Jul 5 02:09:50 2007
New Revision: 37893
URL: http://llvm.org/viewvc/llvm-project?rev=37893&view=rev
Log:
PPC conditional branch predicate does not change after isel.
Modified:
llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td
Modified: llvm/trunk/lib/Target/PowerPC/P
Author: evancheng
Date: Thu Jul 5 02:09:09 2007
New Revision: 37892
URL: http://llvm.org/viewvc/llvm-project?rev=37892&view=rev
Log:
- Added zero_reg def to stand for register 0.
- Added two variants of PredicateOperand: ImmutablePredicateOperand, whose
predicate does not change after isel; Pred
Author: evancheng
Date: Thu Jul 5 02:06:46 2007
New Revision: 37891
URL: http://llvm.org/viewvc/llvm-project?rev=37891&view=rev
Log:
Do not check isPredicated() on non-predicable instructions.
Modified:
llvm/trunk/lib/Target/TargetInstrInfo.cpp
Modified: llvm/trunk/lib/Target/TargetInstrInf
Author: evancheng
Date: Thu Jul 5 02:05:38 2007
New Revision: 37890
URL: http://llvm.org/viewvc/llvm-project?rev=37890&view=rev
Log:
Better assertion messages.
Modified:
llvm/trunk/lib/CodeGen/RegisterScavenging.cpp
Modified: llvm/trunk/lib/CodeGen/RegisterScavenging.cpp
URL:
http://llvm.o
66 matches
Mail list logo
