Changes in directory llvm-www/testresults:
index.html updated: 1.41 -> 1.42
---
Log message:
Remove dead tester
---
Diffs of the changes: (+1 -3)
index.html |4 +---
1 files changed, 1 insertion(+), 3 deletions(-)
Index: llvm-www/testresults/index.html
diff -u llvm-www/testresults/in
Changes in directory llvm/lib/VMCore:
AsmWriter.cpp updated: 1.191 -> 1.192
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Log message:
Format large struct constants for readability.
---
Diffs of the changes: (+13 -4)
AsmWriter.cpp | 17 +
1 files changed, 13 insertions(+), 4 deletions(-)
Index: llvm/lib/VMCore/
Changes in directory llvm/test/Regression/CodeGen/X86:
imul-lea.ll added (r1.1)
store-global-address.ll added (r1.1)
---
Log message:
New test case: use lea for imul by some constants.
---
Diffs of the changes: (+17 -0)
imul-lea.ll |8
store-global-address.ll |9
Changes in directory llvm/test/Regression/CodeGen/X86:
lea.ll updated: 1.1 -> 1.2
---
Log message:
lea.ll is XFAIL until we implement convertToThreeAddress.
---
Diffs of the changes: (+2 -0)
lea.ll |2 ++
1 files changed, 2 insertions(+)
Index: llvm/test/Regression/CodeGen/X86/lea.ll
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.53 -> 1.54
---
Log message:
* Cleaned up addressing mode matching code.
* Cleaned up and tweaked LEA cost analysis code. Removed some hacks.
* Handle ADD $X, c to MOV32ri $X+c. These patterns cannot be autogen'd and
they
Changes in directory llvm/lib/Target/X86:
README.txt updated: 1.60 -> 1.61
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Log message:
Updates.
---
Diffs of the changes: (+3 -20)
README.txt | 23 +++
1 files changed, 3 insertions(+), 20 deletions(-)
Index: llvm/lib/Target/X86/README.txt
diff -u llvm/lib/Targe
Changes in directory llvm/lib/Target/X86:
X86InstrInfo.td updated: 1.249 -> 1.250
---
Log message:
* Allow mul, shl nodes to be codegen'd as LEA (if appropriate).
* Add patterns to handle GlobalAddress, ConstantPool, etc.
MOV32ri to materialize these nodes in registers.
ADD32ri to handle %r
Changes in directory llvm/lib/Target/X86:
X86AsmPrinter.h updated: 1.10 -> 1.11
---
Log message:
ConstantPoolIndex is now the displacement field of addressing mode.
---
Diffs of the changes: (+4 -3)
X86AsmPrinter.h |7 ---
1 files changed, 4 insertions(+), 3 deletions(-)
Index: ll
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.96 -> 1.97
---
Log message:
Added a common about the need for X86ISD::Wrapper.
---
Diffs of the changes: (+7 -0)
X86ISelLowering.cpp |7 +++
1 files changed, 7 insertions(+)
Index: llvm/lib/Target/X86/X86ISel
Changes in directory llvm/lib/Target/X86:
X86IntelAsmPrinter.cpp updated: 1.19 -> 1.20
X86ATTAsmPrinter.cpp updated: 1.26 -> 1.27
---
Log message:
Added an offset field to ConstantPoolSDNode.
---
Diffs of the changes: (+17 -32)
X86ATTAsmPrinter.cpp | 23 ---
X86Intel
Changes in directory llvm/lib/CodeGen/SelectionDAG:
ScheduleDAG.cpp updated: 1.70 -> 1.71
SelectionDAG.cpp updated: 1.259 -> 1.260
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Log message:
Added an offset field to ConstantPoolSDNode.
---
Diffs of the changes: (+14 -9)
ScheduleDAG.cpp |3 ++-
SelectionDAG.cpp | 20 ++
Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.164 -> 1.165
MachineInstrBuilder.h updated: 1.28 -> 1.29
SelectionDAG.h updated: 1.99 -> 1.100
SelectionDAGNodes.h updated: 1.103 -> 1.104
---
Log message:
Added an offset field to ConstantPoolSDNode.
---
Diffs of the c
Changes in directory llvm/test/Regression/CodeGen/PowerPC:
div-2.ll updated: 1.2 -> 1.3
---
Log message:
this fails, mark it as such
---
Diffs of the changes: (+2 -0)
div-2.ll |2 ++
1 files changed, 2 insertions(+)
Index: llvm/test/Regression/CodeGen/PowerPC/div-2.ll
diff -u llvm/te
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