Changes in directory llvm/lib/Target:
README.txt updated: 1.3 -> 1.4
---
Log message:
some stuff is done
---
Diffs of the changes: (+0 -4)
README.txt |4
1 files changed, 4 deletions(-)
Index: llvm/lib/Target/README.txt
diff -u llvm/lib/Target/README.txt:1.3 llvm/lib/Target/READ
Changes in directory llvm/lib/Transforms/Scalar:
InstructionCombining.cpp updated: 1.417 -> 1.418
---
Log message:
Turn A % (C << N), where C is 2^k, into A & ((C << N)-1) [urem only].
Turn A / (C1 << N), where C1 is "1<> (N+C2) [udiv only].
Tested with: rem.ll:test5, div.ll:test10
---
Diff
Changes in directory llvm/test/Regression/Transforms/InstCombine:
div.ll updated: 1.11 -> 1.12
rem.ll updated: 1.8 -> 1.9
---
Log message:
new testcases
---
Diffs of the changes: (+13 -0)
div.ll |6 ++
rem.ll |7 +++
2 files changed, 13 insertions(+)
Index: llvm/test/Regr
Changes in directory llvm/lib/CodeGen/SelectionDAG:
DAGCombiner.cpp updated: 1.96 -> 1.97
---
Log message:
Handle urem by shifted powers of 2.
---
Diffs of the changes: (+15 -4)
DAGCombiner.cpp | 19 +++
1 files changed, 15 insertions(+), 4 deletions(-)
Index: llvm/lib/
Changes in directory llvm/lib/CodeGen/SelectionDAG:
DAGCombiner.cpp updated: 1.95 -> 1.96
---
Log message:
handle combining A / (B << N) into A >>u (log2(B)+N) when B is a power of 2
---
Diffs of the changes: (+13 -2)
DAGCombiner.cpp | 15 +--
1 files changed, 13 insertions(+
Changes in directory llvm-test/SingleSource/UnitTests:
2006-02-04-DivRem.c added (r1.1)
---
Log message:
new testcase
---
Diffs of the changes: (+18 -0)
2006-02-04-DivRem.c | 18 ++
1 files changed, 18 insertions(+)
Index: llvm-test/SingleSource/UnitTests/2006-02-04-Div
Changes in directory llvm/lib/Target/Sparc:
SparcISelDAGToDAG.cpp updated: 1.77 -> 1.78
---
Log message:
Use SelectRoot() as the entry to any tblgen based isel.
---
Diffs of the changes: (+2 -1)
SparcISelDAGToDAG.cpp |3 ++-
1 files changed, 2 insertions(+), 1 deletion(-)
Index: llvm
Changes in directory llvm/lib/Target/PowerPC:
PPCISelDAGToDAG.cpp updated: 1.153 -> 1.154
---
Log message:
Use SelectRoot() as entry of any tblgen based isel.
---
Diffs of the changes: (+2 -1)
PPCISelDAGToDAG.cpp |3 ++-
1 files changed, 2 insertions(+), 1 deletion(-)
Index: llvm/lib
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.33 -> 1.34
---
Log message:
Use SelectRoot() as entry of any tblgen based isel.
---
Diffs of the changes: (+2 -1)
IA64ISelDAGToDAG.cpp |3 ++-
1 files changed, 2 insertions(+), 1 deletion(-)
Index: llvm/lib/Ta
Changes in directory llvm/lib/Target/Alpha:
AlphaISelDAGToDAG.cpp updated: 1.31 -> 1.32
---
Log message:
Use SelectRoot() as entry of any tblgen based isel.
---
Diffs of the changes: (+2 -1)
AlphaISelDAGToDAG.cpp |3 ++-
1 files changed, 2 insertions(+), 1 deletion(-)
Index: llvm/lib
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.41 -> 1.42
---
Log message:
Use SelectRoot() as entry of any tblgen based isel.
---
Diffs of the changes: (+2 -1)
X86ISelDAGToDAG.cpp |3 ++-
1 files changed, 2 insertions(+), 1 deletion(-)
Index: llvm/lib/Targe
Changes in directory llvm/docs:
CFEBuildInstrs.html updated: 1.54 -> 1.55
---
Log message:
Encourage use of the V8 ABI over the V9 ABI.
---
Diffs of the changes: (+5 -5)
CFEBuildInstrs.html | 10 +-
1 files changed, 5 insertions(+), 5 deletions(-)
Index: llvm/docs/CFEBuildInstr
Changes in directory llvm/utils/TableGen:
DAGISelEmitter.cpp updated: 1.164 -> 1.165
DAGISelEmitter.h updated: 1.54 -> 1.55
---
Log message:
Allow more loads to be folded which were previously prevented from happening
due to ordering issue. i.e. they were selected for chain use first.
Now at lo
Changes in directory llvm/docs:
UsingLibraries.html updated: 1.17 -> 1.18
---
Log message:
This document is out of date. :(
---
Diffs of the changes: (+4 -4)
UsingLibraries.html |8
1 files changed, 4 insertions(+), 4 deletions(-)
Index: llvm/docs/UsingLibraries.html
diff -
Changes in directory llvm/docs:
ReleaseNotes.html updated: 1.345 -> 1.346
---
Log message:
V8 -> Sparc
---
Diffs of the changes: (+9 -5)
ReleaseNotes.html | 14 +-
1 files changed, 9 insertions(+), 5 deletions(-)
Index: llvm/docs/ReleaseNotes.html
diff -u llvm/docs/ReleaseN
Changes in directory llvm/lib/Target/SparcV8:
DelaySlotFiller.cpp (r1.9) removed
FPMover.cpp (r1.11) removed
Makefile (r1.13) removed
README.txt (r1.49) removed
SparcV8.h (r1.10) removed
SparcV8.td (r1.10) removed
SparcV8AsmPrinter.cpp (r1.52) removed
SparcV8ISelDAGToDAG.cpp (r1.76) removed
Spar
Changes in directory llvm/lib/Target/Sparc:
README.txt updated: 1.49 -> 1.50
---
Log message:
remove V8 reference
---
Diffs of the changes: (+1 -1)
README.txt |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Target/Sparc/README.txt
diff -u llvm/lib/Target/Sparc/R
Changes in directory llvm/include/llvm/CodeGen:
SelectionDAGNodes.h updated: 1.99 -> 1.100
---
Log message:
* Added SDNode::isOnlyUse().
* Fix hasNUsesOfValue(), it should be const.
---
Diffs of the changes: (+4 -1)
SelectionDAGNodes.h |5 -
1 files changed, 4 insertions(+), 1 dele
Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAG.cpp updated: 1.253 -> 1.254
---
Log message:
* Added SDNode::isOnlyUse().
* Fix hasNUsesOfValue(), it should be const.
---
Diffs of the changes: (+18 -3)
SelectionDAG.cpp | 21 ++---
1 files changed, 18 inse
Changes in directory llvm:
configure updated: 1.208 -> 1.209
---
Log message:
SparcV8 -> Sparc
---
Diffs of the changes: (+3 -3)
configure |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
Index: llvm/configure
diff -u llvm/configure:1.208 llvm/configure:1.209
--- llvm/conf
Changes in directory llvm/autoconf:
configure.ac updated: 1.206 -> 1.207
---
Log message:
SparcV8 -> Sparc
---
Diffs of the changes: (+3 -3)
configure.ac |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
Index: llvm/autoconf/configure.ac
diff -u llvm/autoconf/configure.ac:1
Changes in directory llvm/test/Regression/CodeGen/SparcV8:
2006-01-22-BitConvertLegalize.ll (r1.1) removed
basictest.ll (r1.1) removed
ctpop.ll (r1.1) removed
dg.exp (r1.1) removed
xnor.ll (r1.3) removed
---
Log message:
These were moved to ../SPARC
---
Diffs of the changes: (+0 -0)
0 file
Changes in directory llvm/test/Regression/CodeGen/SPARC:
2006-01-22-BitConvertLegalize.ll added (r1.1)
basictest.ll added (r1.1)
ctpop.ll added (r1.1)
dg.exp added (r1.1)
xnor.ll added (r1.1)
---
Log message:
move V8 testcases here
---
Diffs of the changes: (+46 -0)
2006-01-22-BitConvertLe
Changes in directory llvm/test/Regression/CodeGen/SPARC:
---
Log message:
Directory /home/vadve/shared/PublicCVS/llvm/test/Regression/CodeGen/SPARC added
to the repository
---
Diffs of the changes: (+0 -0)
0 files changed
___
llvm-commits mai
Changes in directory llvm/lib/Target/PowerPC:
README.txt updated: 1.61 -> 1.62
---
Log message:
add a note
---
Diffs of the changes: (+11 -0)
README.txt | 11 +++
1 files changed, 11 insertions(+)
Index: llvm/lib/Target/PowerPC/README.txt
diff -u llvm/lib/Target/PowerPC/README.
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.40 -> 1.41
---
Log message:
Re-commit the last bit of change that was backed out.
---
Diffs of the changes: (+2 -13)
X86ISelDAGToDAG.cpp | 15 ++-
1 files changed, 2 insertions(+), 13 deletions(-)
Inde
Changes in directory llvm/utils/TableGen:
DAGISelEmitter.cpp updated: 1.163 -> 1.164
---
Log message:
Re-committing the last bit of change. It shouldn't break PPC this time.
---
Diffs of the changes: (+7 -4)
DAGISelEmitter.cpp | 11 +++
1 files changed, 7 insertions(+), 4 deletio
Changes in directory llvm/lib/CodeGen:
AsmPrinter.cpp updated: 1.46 -> 1.47
---
Log message:
make sure that global doubles are aligned to 8 bytes
---
Diffs of the changes: (+10 -5)
AsmPrinter.cpp | 15 ++-
1 files changed, 10 insertions(+), 5 deletions(-)
Index: llvm/lib/Co
Changes in directory llvm/lib/Target/X86:
X86AsmPrinter.cpp updated: 1.159 -> 1.160
---
Log message:
Use getPreferredAlignmentLog.
---
Diffs of the changes: (+1 -1)
X86AsmPrinter.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Target/X86/X86AsmPrinter.cpp
di
Changes in directory llvm/lib/Target/PowerPC:
PPCAsmPrinter.cpp updated: 1.144 -> 1.145
---
Log message:
Use the asmprinter to find out what the preferred alignment of a global is.
This patch speeds up 172.mgrid from 31.81s to 11.39s on darwin/ppc.
Many many thanks to Nate for tracking down the
Changes in directory llvm/lib/CodeGen:
AsmPrinter.cpp updated: 1.45 -> 1.46
---
Log message:
Implement the AsmPrinter::getPreferredAlignmentLog method.
---
Diffs of the changes: (+16 -0)
AsmPrinter.cpp | 16
1 files changed, 16 insertions(+)
Index: llvm/lib/CodeGen/Asm
Changes in directory llvm/include/llvm/CodeGen:
AsmPrinter.h updated: 1.27 -> 1.28
---
Log message:
add a new method, getPreferredAlignmentLog.
---
Diffs of the changes: (+4 -0)
AsmPrinter.h |4
1 files changed, 4 insertions(+)
Index: llvm/include/llvm/CodeGen/AsmPrinter.h
diff
Changes in directory llvm/lib/Target/Alpha:
AlphaAsmPrinter.cpp updated: 1.29 -> 1.30
---
Log message:
linkage fix for weak functions
---
Diffs of the changes: (+16 -3)
AlphaAsmPrinter.cpp | 19 ---
1 files changed, 16 insertions(+), 3 deletions(-)
Index: llvm/lib/Target
Changes in directory llvm/lib/CodeGen/SelectionDAG:
ScheduleDAG.cpp updated: 1.64 -> 1.65
---
Log message:
Fix VC++ warning.
---
Diffs of the changes: (+0 -1)
ScheduleDAG.cpp |1 -
1 files changed, 1 deletion(-)
Index: llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
diff -u llvm/lib/Cod
Changes in directory llvm/lib/Analysis:
ScalarEvolutionExpander.cpp updated: 1.2 -> 1.3
---
Log message:
Pull the InsertCastOfTo out of the header, implement CSE'ing of arguments.
---
Diffs of the changes: (+51 -0)
ScalarEvolutionExpander.cpp | 51
Changes in directory llvm/lib/Transforms/Scalar:
LoopStrengthReduce.cpp updated: 1.74 -> 1.75
---
Log message:
Use SCEVExpander::InsertCastOfTo instead of our own code. This reduces
#LLVM LOC, and auto-cse's cast instructions.
---
Diffs of the changes: (+1 -18)
LoopStrengthReduce.cpp |
Changes in directory llvm/include/llvm/Analysis:
ScalarEvolutionExpander.h updated: 1.3 -> 1.4
---
Log message:
Refactor a bunch of code into a non-inlined method
---
Diffs of the changes: (+6 -33)
ScalarEvolutionExpander.h | 39 ++-
1 files changed, 6
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.39 -> 1.40
---
Log message:
Temporarily revert this patch, which probably breaks with the
tblgen patch reverted.
---
Diffs of the changes: (+13 -7)
X86ISelDAGToDAG.cpp | 20 +---
1 files changed, 13
Changes in directory llvm/utils/TableGen:
DAGISelEmitter.cpp updated: 1.162 -> 1.163
---
Log message:
Temporarily revert the last change, which breaks PPC and other targets that
DO select things.
---
Diffs of the changes: (+4 -3)
DAGISelEmitter.cpp |7 ---
1 files changed, 4 insert
Changes in directory llvm/lib/Analysis:
ValueNumbering.cpp updated: 1.15 -> 1.16
---
Log message:
Value# select instructions, allowing -gcse to remove duplicates
---
Diffs of the changes: (+36 -1)
ValueNumbering.cpp | 37 -
1 files changed, 36 insertio
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.38 -> 1.39
---
Log message:
Complex pattern's custom matcher should not call Select() on any operands.
Select them afterwards if it returns true.
---
Diffs of the changes: (+7 -13)
X86ISelDAGToDAG.cpp | 20 +++--
Changes in directory llvm/utils/TableGen:
DAGISelEmitter.cpp updated: 1.161 -> 1.162
---
Log message:
Complex pattern's custom matcher should not call Select() on any operands.
Select them afterwards if it returns true.
---
Diffs of the changes: (+5 -0)
DAGISelEmitter.cpp |5 +
1 f
Changes in directory llvm/lib/Target/SparcV8:
SparcV8ISelDAGToDAG.cpp updated: 1.75 -> 1.76
---
Log message:
Custom lower VAARG for the case when we are doing vaarg(double). In this
case, the double being loaded may not be 8-byte aligned, so we have to use
our standard bit_convert game.
---
Changes in directory llvm/lib/Target/SparcV8:
SparcV8RegisterInfo.cpp updated: 1.35 -> 1.36
---
Log message:
Fix a nasty typo that broke functions with big stack frames.
---
Diffs of the changes: (+1 -1)
SparcV8RegisterInfo.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
In
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