Changes in directory llvm/lib/Target/X86:
X86InstrInfo.td updated: 1.173 -> 1.174
---
Log message:
Added X86 readport patterns.
---
Diffs of the changes: (+21 -12)
X86InstrInfo.td | 33 +
1 files changed, 21 insertions(+), 12 deletions(-)
Index: llvm/lib
Changes in directory llvm/lib/Target:
TargetSelectionDAG.td updated: 1.31 -> 1.32
---
Log message:
Added X86 readport patterns.
---
Diffs of the changes: (+5 -0)
TargetSelectionDAG.td |5 +
1 files changed, 5 insertions(+)
Index: llvm/lib/Target/TargetSelectionDAG.td
diff -u llvm
Changes in directory llvm/utils/TableGen:
DAGISelEmitter.cpp updated: 1.106 -> 1.107
---
Log message:
Now support instructions with implicit write to non-flag registers.
---
Diffs of the changes: (+91 -51)
DAGISelEmitter.cpp | 142 +
1 f
Changes in directory llvm/lib/Target:
TargetLowering.cpp updated: 1.15 -> 1.16
---
Log message:
Added a hook to print out names of target specific DAG nodes.
---
Diffs of the changes: (+3 -0)
TargetLowering.cpp |3 +++
1 files changed, 3 insertions(+)
Index: llvm/lib/Target/TargetLow
Changes in directory llvm/include/llvm/Target:
TargetLowering.h updated: 1.29 -> 1.30
---
Log message:
Added a hook to print out names of target specific DAG nodes.
---
Diffs of the changes: (+4 -0)
TargetLowering.h |4
1 files changed, 4 insertions(+)
Index: llvm/include/llvm/T
Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAG.cpp updated: 1.227 -> 1.228
---
Log message:
Added a hook to print out names of target specific DAG nodes.
---
Diffs of the changes: (+8 -5)
SelectionDAG.cpp | 13 -
1 files changed, 8 insertions(+), 5 deletions
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.10 -> 1.11
X86ISelLowering.h updated: 1.4 -> 1.5
---
Log message:
Added a hook to print out names of target specific DAG nodes.
---
Diffs of the changes: (+21 -0)
X86ISelLowering.cpp | 17 +
X86ISelL
Changes in directory llvm/utils:
DSAextract.py updated: 1.1 -> 1.2
---
Log message:
Added a break that I meant to include originally, for efficiency. Basically
it keeps it from trying to add the same node to the node set
over and over if it matches multiple given patterns. Also in cases wher
Changes in directory llvm/lib/CodeGen/SelectionDAG:
LegalizeDAG.cpp updated: 1.235 -> 1.236
---
Log message:
Fix a nasty latent bug in the legalizer that was triggered by my patch
last night, breaking crafty and twolf. Make sure that the newly found
legal nodes are themselves not re-legalized
Changes in directory llvm/lib/Target/PowerPC:
PPCISelDAGToDAG.cpp updated: 1.145 -> 1.146
PPCISelLowering.cpp updated: 1.51 -> 1.52
PPCISelLowering.h updated: 1.12 -> 1.13
PPCInstrFormats.td updated: 1.62 -> 1.63
PPCInstrInfo.td updated: 1.162 -> 1.163
PPCRegisterInfo.td updated: 1.27 -> 1.28
--
Changes in directory llvm/utils/TableGen:
DAGISelEmitter.cpp updated: 1.105 -> 1.106
---
Log message:
Lefted out a fix in the previous check in.
---
Diffs of the changes: (+7 -1)
DAGISelEmitter.cpp |8 +++-
1 files changed, 7 insertions(+), 1 deletion(-)
Index: llvm/utils/TableGe
Changes in directory llvm/lib/Target/PowerPC:
PPCAsmPrinter.cpp updated: 1.130 -> 1.131
PPCISelDAGToDAG.cpp updated: 1.144 -> 1.145
---
Log message:
Fix a couple of the FIXMEs, thanks to suggestion from Chris. This allows
us to load and store vectors directly at a pointer (offset of zero) by
u
Changes in directory llvm/lib/Target/PowerPC:
PPCAsmPrinter.cpp updated: 1.129 -> 1.130
PPCISelDAGToDAG.cpp updated: 1.143 -> 1.144
PPCISelLowering.cpp updated: 1.50 -> 1.51
PPCInstrInfo.td updated: 1.161 -> 1.162
---
Log message:
Convert load/store over to being pattern matched
---
Diffs of
Changes in directory llvm/lib/Target:
TargetSelectionDAG.td updated: 1.30 -> 1.31
---
Log message:
X86 conditional branch support.
---
Diffs of the changes: (+0 -5)
TargetSelectionDAG.td |5 -
1 files changed, 5 deletions(-)
Index: llvm/lib/Target/TargetSelectionDAG.td
diff -u ll
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.9 -> 1.10
X86ISelLowering.h updated: 1.3 -> 1.4
X86InstrInfo.td updated: 1.172 -> 1.173
---
Log message:
X86 conditional branch support.
---
Diffs of the changes: (+53 -14)
X86ISelLowering.cpp | 21 +
Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAG.cpp updated: 1.226 -> 1.227
---
Log message:
Print out opcode number if it's an unknown target node.
---
Diffs of the changes: (+6 -1)
SelectionDAG.cpp |7 ++-
1 files changed, 6 insertions(+), 1 deletion(-)
Index:
Changes in directory llvm/lib/CodeGen/SelectionDAG:
LegalizeDAG.cpp updated: 1.234 -> 1.235
---
Log message:
X86 conditional branch support.
---
Diffs of the changes: (+10 -0)
LegalizeDAG.cpp | 10 ++
1 files changed, 10 insertions(+)
Index: llvm/lib/CodeGen/SelectionDAG/Legali
Changes in directory llvm/utils/TableGen:
DAGISelEmitter.cpp updated: 1.104 -> 1.105
---
Log message:
Fix another bug related to chain / flag.
---
Diffs of the changes: (+20 -8)
DAGISelEmitter.cpp | 28
1 files changed, 20 insertions(+), 8 deletions(-)
Inde
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.15 -> 1.16
---
Log message:
It's essential we clear CodeGenMap after isel every basic block!
---
Diffs of the changes: (+1 -0)
X86ISelDAGToDAG.cpp |1 +
1 files changed, 1 insertion(+)
Index: llvm/lib/Target/X86
Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAG.cpp updated: 1.225 -> 1.226
---
Log message:
Fix a case where the DAG Combiner would accidentally CSE flag-producing nodes,
creating graphs that cannot be scheduled.
---
Diffs of the changes: (+6 -1)
SelectionDAG.cpp |7 +
Changes in directory llvm:
configure updated: 1.203 -> 1.204
---
Log message:
Added the llvm-kernel project to the list of automatically configured
projects.
---
Diffs of the changes: (+34 -29)
configure | 63 +-
1 files changed
Changes in directory llvm/autoconf:
configure.ac updated: 1.200 -> 1.201
---
Log message:
Added the llvm-kernel project to the list of automatically configured
projects.
---
Diffs of the changes: (+1 -0)
configure.ac |1 +
1 files changed, 1 insertion(+)
Index: llvm/autoconf/configu
Changes in directory llvm/lib/Analysis/DataStructure:
Local.cpp updated: 1.137 -> 1.138
---
Log message:
Prefix DSA specific options with dsa.
Make the dsa-alloc-list and dsa-free-list options hidden.
---
Diffs of the changes: (+4 -4)
Local.cpp |8
1 files changed, 4 insertion
Changes in directory llvm/lib/Analysis/DataStructure:
Local.cpp updated: 1.136 -> 1.137
---
Log message:
Added an option to specify the names of heap freeing functions.
---
Diffs of the changes: (+20 -0)
Local.cpp | 20
1 files changed, 20 insertions(+)
Index: llvm
Changes in directory llvm/lib/Analysis/DataStructure:
Local.cpp updated: 1.135 -> 1.136
---
Log message:
Added a command line option that allows the user to specify a list of
functions that allocate memory.
---
Diffs of the changes: (+19 -0)
Local.cpp | 19 +++
1 files ch
Changes in directory llvm/lib/CodeGen/SelectionDAG:
ScheduleDAG.cpp updated: 1.52 -> 1.53
---
Log message:
Amend comment.
---
Diffs of the changes: (+2 -1)
ScheduleDAG.cpp |3 ++-
1 files changed, 2 insertions(+), 1 deletion(-)
Index: llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
dif
Changes in directory llvm/lib/CodeGen/SelectionDAG:
ScheduleDAG.cpp updated: 1.51 -> 1.52
---
Log message:
Create a strong dependency for loads following stores. This will leave a
latency period between the two.
---
Diffs of the changes: (+6 -2)
ScheduleDAG.cpp |8 ++--
1 files ch
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