https://github.com/pcc created https://github.com/llvm/llvm-project/pull/133536
Deactivation symbols are a mechanism for allowing object files to disable
specific instructions in other object files at link time. The initial use
case is for pointer field protection.
For more information, see the
https://github.com/pcc created https://github.com/llvm/llvm-project/pull/133537
Deactivation symbol operands are supported in the code generator by
building on the previously added support for IRELATIVE relocations.
TODO:
- Fix broken test.
- Add bitcode and IR writer support.
- Add tests.
__
https://github.com/pcc created https://github.com/llvm/llvm-project/pull/134197
This is so that we'll be able to use it in compiler-rt as well.
Dependencies on LLVM Support were removed from the header by restoring
code from the original SipHash implementation.
https://github.com/pcc updated https://github.com/llvm/llvm-project/pull/133530
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@@ -0,0 +1,115 @@
+#include
pcc wrote:
Done
https://github.com/llvm/llvm-project/pull/133530
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pcc wrote:
> We cannot introduce BSD-licensed code to compiler-rt. Please see [my comment
> for more
> details](https://github.com/llvm/llvm-project/pull/133530#discussion_r2021952691).
Thanks, resolved by switching to SipHash.
https://github.com/llvm/llvm-project/pull/134197 extracts the exi
@@ -0,0 +1,115 @@
+#include
+
+#define XXH_INLINE_ALL
+#define XXH_NO_STDLIB
+#define XXH_memcpy __builtin_memcpy
+#define XXH_memset __builtin_memset
+#define XXH_memcmp __builtin_memcmp
+#include "../xxhash.h"
+
+// EmuPAC implements runtime emulation of PAC instructions. If th
@@ -0,0 +1,7343 @@
+/*
+ * xxHash - Extremely Fast Hash algorithm
+ * Header File
+ * Copyright (C) 2012-2023 Yann Collet
+ *
+ * BSD 2-Clause License (https://www.opensource.org/licenses/bsd-license.php)
pcc wrote:
Understood, I've uploaded a new change that rep
https://github.com/pcc edited https://github.com/llvm/llvm-project/pull/133530
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>From b37a44fff650b06eda249060277d0c007226cad2 Mon Sep 17 00:00:00 2001
From: Peter Collingbourne
Date: Thu, 3 Apr 2025 21:51:44 -0700
Subject: [PATCH] Fix CMake build
Created using spr 1.3.6-beta.1
---
compiler-rt
https://github.com/pcc edited https://github.com/llvm/llvm-project/pull/133530
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pcc wrote:
Sorry, let me try again with the concrete problem that I was seeing and trying
to solve.
With this .s file:
```
.section .text.a,"ax",@progbits
jmp foo
.section .text.b,"ax",@progbits
bar:
ret
.text
jmp bar
foo:
ret
```
and with an lld patched with #138366:
```
$ ra/bin/clang -c jm
pcc wrote:
Abandoning this and will address in the linker change (#138366) instead.
https://github.com/llvm/llvm-project/pull/138795
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body {
background-color: #f6f8fa;
color: #24292e;
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background-color: #f6f8fa;
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>From 96e7da9a083888683c2ba00d97f886fd748ea10b Mon Sep 17 00:00:00 2001
From: Peter Collingbourne
Date: Wed, 9 Apr 2025 20:30:57 -0700
Subject: [PATCH] Undo unnecessary change
Created using spr 1.3.6-beta.1
---
lld
https://github.com/pcc updated https://github.com/llvm/llvm-project/pull/133536
Rate limit · GitHub
body {
background-color: #f6f8fa;
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background-color: #f6f8fa;
color: #24292e;
font-family: -apple-system,BlinkMacSystemFont,Segoe
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Rate limit · GitHub
body {
background-color: #f6f8fa;
color: #24292e;
font-family: -apple-system,BlinkMacSystemFont,Segoe
UI,Helvetica,Arial,sans-serif,
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body {
background-color: #f6f8fa;
color: #24292e;
font-family: -apple-system,BlinkMacSystemFont,Segoe
UI,Helvetica,Arial,sans-serif,
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body {
background-color: #f6f8fa;
color: #24292e;
font-family: -apple-system,BlinkMacSystemFont,Segoe
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body {
background-color: #f6f8fa;
color: #24292e;
font-family: -apple-system,BlinkMacSystemFont,Segoe
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body {
background-color: #f6f8fa;
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background-color: #f6f8fa;
color: #24292e;
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pcc wrote:
I've now implemented the ADDRINIT64 (renamed FUNCINIT64, but no strong opinions
on the name) proposal as well as filed an issue with the AArch64 psABI:
https://github.com/ARM-software/abi-aa/issues/329
https://github.com/llvm/llvm-project/pull/133531
https://github.com/pcc closed https://github.com/llvm/llvm-project/pull/138795
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In the following case:
.section .text.a,"ax",@progbits
jmp .Lfoo
.text
ret
.Lfoo:
ret
we previously emitted an R_X86_64_PLT32 relocation for the jmp
instruction pointing to the .text section symbol with an addend o
https://github.com/pcc created https://github.com/llvm/llvm-project/pull/138794
llvm-jitlink has a bug revealed by my followup change where the
RuntimeDyldChecker::MemoryRegionInfo::TargetAddress field was
incorrectly being set to the address of the first symbol in the
section instead of the addr
pcc wrote:
With relative vtables we have
```
.4byte foo@plt - .
```
This becomes a PLT32 pointing to foo with addend 0. This should not be treated
as a branch to foo+4 if a PLT/thunk is needed.
We can also have
```
.section .text.a,"ax",@progbits
jmp .Lfoo
.text
nop
nop
nop
nop
.Lfoo:
ret
```
https://github.com/pcc updated https://github.com/llvm/llvm-project/pull/133537
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pcc wrote:
Thanks for your suggestion, I tried it. This is the patch:
https://github.com/pcc/llvm-project/tree/pfp-autxmxn
I found that it was more code (it adds 102 insertions(+), 66 deletions(-) on
top of this patch). And I only implemented the SDAG side so far, not GISel. So
I'm inclined n
@@ -4425,6 +4425,14 @@ RValue CodeGenFunction::EmitBuiltinExpr(const GlobalDecl
GD, unsigned BuiltinID,
Address Dest = EmitPointerWithAlignment(E->getArg(0));
Address Src = EmitPointerWithAlignment(E->getArg(1));
Value *SizeVal = EmitScalarExpr(E->getArg(2));
+
https://github.com/pcc created https://github.com/llvm/llvm-project/pull/140312
The builtin is documented to copy `count` elements, but the implementation
copies `count` bytes. Fix that.
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@@ -544,6 +544,7 @@ TYPE_TRAIT_2(__is_pointer_interconvertible_base_of,
IsPointerInterconvertibleBas
#include "clang/Basic/TransformTypeTraits.def"
// Clang-only C++ Type Traits
+TYPE_TRAIT_1(__has_non_relocatable_fields, HasNonRelocatableFields, KEYCXX)
pcc
@@ -2976,7 +3006,15 @@ void CodeGenFunction::EmitForwardingCallToLambda(
QualType resultType = FPT->getReturnType();
ReturnValueSlot returnSlot;
if (!resultType->isVoidType() &&
- calleeFnInfo->getReturnInfo().getKind() == ABIArgInfo::Indirect &&
+ (calleeFnInfo
@@ -1415,6 +1469,52 @@ void CodeGenFunction::CreateCoercedStore(llvm::Value
*Src, Address Dst,
}
}
+ // Coercion directly through memory does not work if the structure has
pointer
+ // field protection because the struct passed by value has a different bit
+ // patt
@@ -7756,6 +7756,10 @@ void Clang::ConstructJob(Compilation &C, const JobAction
&JA,
Args.addOptInFlag(CmdArgs, options::OPT_funique_source_file_names,
options::OPT_fno_unique_source_file_names);
+ if (!IsCudaDevice)
pcc wrote:
With CU
@@ -7538,6 +7538,14 @@ static bool IsEligibleForTrivialRelocation(Sema &SemaRef,
if (!SemaRef.IsCXXTriviallyRelocatableType(Field->getType()))
return false;
}
+
+ // FIXME: PFP should not affect trivial relocatability, instead it should
+ // affect the implementat
@@ -2513,6 +2513,12 @@ def CountedByOrNull : DeclOrTypeAttr {
let LangOpts = [COnly];
}
+def NoPointerFieldProtection : DeclOrTypeAttr {
pcc wrote:
There are numerous circumstances where the C++ ABI is distinct from the
platform ABI and is allowed to chang
@@ -441,6 +445,254 @@ bool
PreISelIntrinsicLowering::expandMemIntrinsicUses(Function &F) const {
return Changed;
}
+namespace {
+
+enum class PointerEncoding {
+ Rotate,
+ PACCopyable,
+ PACNonCopyable,
+};
+
+bool expandProtectedFieldPtr(Function &Intr) {
+ Module &M =
@@ -3011,6 +3011,12 @@ defm experimental_omit_vtable_rtti :
BoolFOption<"experimental-omit-vtable-rtti"
NegFlag,
BothFlags<[], [CC1Option], " the RTTI component from virtual tables">>;
+def experimental_pointer_field_protection_EQ : Joined<["-"],
"fexperimental-pointer-f
@@ -2268,13 +2293,22 @@ CodeGenFunction::EmitNullInitialization(Address
DestPtr, QualType Ty) {
// Get and call the appropriate llvm.memcpy overload.
Builder.CreateMemCpy(DestPtr, SrcPtr, SizeVal, false);
-return;
+ } else {
+// Otherwise, just memset the who
@@ -928,6 +936,11 @@ namespace {
if (PointerAuthQualifier Q = F->getType().getPointerAuth();
Q && Q.isAddressDiscriminated())
return false;
+ // Non-trivially-copyable fields with pointer field protection need to be
pcc wrote:
We c
https://github.com/pcc edited https://github.com/llvm/llvm-project/pull/133538
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@@ -2201,6 +2215,22 @@ void CodeGenFunction::EmitCXXConstructorCall(
EmitTypeCheck(CodeGenFunction::TCK_ConstructorCall, Loc, This,
getContext().getRecordType(ClassDecl), CharUnits::Zero());
+ // When initializing an object that has pointer field protect
https://github.com/pcc commented:
Hi Oliver, thanks for your comments! I'll address them below.
> Thoughts:
>
> This should be opt-in on a field or struct granularity, not just a global
> behavior.
This would certainly be easier if it were an opt-in behavior, as it would allow
avoiding a sub
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@@ -1019,8 +1019,14 @@ LowerTypeTestsModule::importTypeId(StringRef TypeId) {
return C;
};
- if (TIL.TheKind != TypeTestResolution::Unsat)
-TIL.OffsetedGlobal = ImportGlobal("global_addr");
+ if (TIL.TheKind != TypeTestResolution::Unsat) {
+auto *GV = ImportGlo
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pcc wrote:
I'm fixing the code generation for the test cases that I'm adding
(inhibit-zext-constant-hoist.ll) which were all extracted from a build of a
large internal program built with CFI. Previously f1 looked like this where
align was hoisted:
```
f1: #
pcc wrote:
Depends on #141326
https://github.com/llvm/llvm-project/pull/141716
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https://github.com/pcc created https://github.com/llvm/llvm-project/pull/141716
isProfitableToSinkOperands() may now return a phi node. If it does,
check that all incoming values are identical and if so, replace the phi
use with a clone of the incoming value. Use this mechanism to sink phi
node o
pcc wrote:
> This PR doesn't entirely fix the problem. Another case that I'm seeing (and
> which is more effectively prevented by the previous approach) is where GVN
> PRE moves the zext behind a phi, and after subsequent optimization passes it
> turns into a phi pointing to other phis which u
https://github.com/pcc updated https://github.com/llvm/llvm-project/pull/141327
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>From b36c74c344ed47b99e9bfdc28f9081c3c704d8c7 Mon Sep 17 00:00:00 2001
From: Peter Collingbourne
Date: Tue, 27 May 2025 23:08:59 -0700
Subject: [PATCH] Format
Created using spr 1.3.6-beta.1
---
llvm/lib/Transforms
@@ -1699,7 +1699,9 @@ LLVMValueRef LLVMConstantPtrAuth(LLVMValueRef Ptr,
LLVMValueRef Key,
LLVMValueRef Disc, LLVMValueRef AddrDisc) {
return wrap(ConstantPtrAuth::get(
unwrap(Ptr), unwrap(Key),
- unwrap(Disc), unwrap(AddrDisc)));
pcc wrote:
> Missing verifier checks?
Right, I guess the new operand can either be null (no deactivation symbol) or a
globalvariable.
https://github.com/llvm/llvm-project/pull/133537
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https://github.com/pcc approved this pull request.
Cloning makes sense to me at least to begin with. Since fat LTO is a seldomly
used feature, it may be better overall to be a bit less efficient in order to
reduce the overall maintenance burden.
https://github.com/llvm/llvm-project/pull/13
@@ -362,6 +362,17 @@ class LangOptionsBase {
BKey
};
+ enum class PointerFieldProtectionKind {
pcc wrote:
I think that allowing this level of customization should be implemented as part
of the separate opt-in solution (e.g. it may be a property of the
https://github.com/pcc updated https://github.com/llvm/llvm-project/pull/140312
>From 1399ec4fdf8fe08000b590844f4e24c31a310a01 Mon Sep 17 00:00:00 2001
From: Peter Collingbourne
Date: Wed, 21 May 2025 16:20:57 -0700
Subject: [PATCH] Add test with variable count
Created using spr 1.3.6-beta.1
--
@@ -8,7 +8,7 @@ struct S trivially_relocatable_if_eligible {
};
// CHECK: @_Z4testP1SS0_
-// CHECK: call void @llvm.memmove.p0.p0.i64
+// CHECK: call void @llvm.memmove.p0.p0.i64({{.*}}, i64 8
pcc wrote:
Done
https://github.com/llvm/llvm-project/pull/140312
@@ -0,0 +1,92 @@
+//===- TargetImpl.h -*- C++
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apa
@@ -975,6 +977,62 @@ void AArch64::relocateAlloc(InputSectionBase &sec, uint8_t
*buf) const {
}
}
+static std::optional getControlTransferAddend(InputSection &is,
+Relocation &r) {
+ // Identify a control transfer rel
@@ -0,0 +1,92 @@
+//===- TargetImpl.h -*- C++
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apa
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@@ -0,0 +1,92 @@
+//===- TargetImpl.h -*- C++
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apa
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>From e0581c892d07d8bb5518fa412b75b8830f5fb14a Mon Sep 17 00:00:00 2001
From: Peter Collingbourne
Date: Wed, 30 Apr 2025 18:25:54 -0700
Subject: [PATCH] ELF: Add branch-to-branch optimization.
MIME-Version: 1.0
Conte
https://github.com/pcc updated https://github.com/llvm/llvm-project/pull/138366
>From 03060849dc81f83ec48f05995ac8fd6df846c25b Mon Sep 17 00:00:00 2001
From: Peter Collingbourne
Date: Fri, 2 May 2025 16:57:28 -0700
Subject: [PATCH 1/5] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20in?=
=?U
pcc wrote:
Right, this feature doesn't change section sizes, so there shouldn't be an
interaction with SHT_LLVM_BB_ADDR_MAP. AFAICT LLD doesn't contain code that
parses SHT_LLVM_BB_ADDR_MAP so I don't see value in adding a test for it.
https://github.com/llvm/llvm-project/pull/138366
_
https://github.com/pcc updated https://github.com/llvm/llvm-project/pull/140312
>From 1399ec4fdf8fe08000b590844f4e24c31a310a01 Mon Sep 17 00:00:00 2001
From: Peter Collingbourne
Date: Wed, 21 May 2025 16:20:57 -0700
Subject: [PATCH] Add test with variable count
Created using spr 1.3.6-beta.1
--
https://github.com/pcc updated https://github.com/llvm/llvm-project/pull/138366
>From d67e152baaf8487e5cb049166ce61e905011171e Mon Sep 17 00:00:00 2001
From: Peter Collingbourne
Date: Wed, 30 Apr 2025 18:25:54 -0700
Subject: [PATCH] ELF: Add branch-to-branch optimization.
MIME-Version: 1.0
Conte
https://github.com/pcc updated https://github.com/llvm/llvm-project/pull/140312
>From 1399ec4fdf8fe08000b590844f4e24c31a310a01 Mon Sep 17 00:00:00 2001
From: Peter Collingbourne
Date: Wed, 21 May 2025 16:20:57 -0700
Subject: [PATCH] Add test with variable count
Created using spr 1.3.6-beta.1
--
@@ -7538,6 +7538,14 @@ static bool IsEligibleForTrivialRelocation(Sema &SemaRef,
if (!SemaRef.IsCXXTriviallyRelocatableType(Field->getType()))
return false;
}
+
+ // FIXME: PFP should not affect trivial relocatability, instead it should
+ // affect the implementat
https://github.com/pcc created https://github.com/llvm/llvm-project/pull/141324
This is either a vtable (in .data.rel.ro) or a jump table (in .text).
Either way it's expected to be in the low 2 GiB, so set the small
code model.
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https://github.com/pcc created https://github.com/llvm/llvm-project/pull/141326
Casts taking a constant expression (generally derived from a global
variable address) as an operand are not profitable to CSE because they
appear as subexpressions in the instruction sequence generated by the
LowerTyp
https://github.com/pcc created https://github.com/llvm/llvm-project/pull/141325
LICM hoists instructions into the preheader, and CSE and GVN
can effectively perform a hoist by replacing an instruction with
one from another basic block, all of which can lead to the same
kinds of pessimizations tha
https://github.com/pcc created https://github.com/llvm/llvm-project/pull/141327
This pass figures out whether inlining has exposed a constant address to
a lowered type test, and remove the test if so and the address is known
to pass the test. Unfortunately this pass ends up needing to reverse
eng
https://github.com/pcc updated https://github.com/llvm/llvm-project/pull/134197
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https://github.com/pcc updated https://github.com/llvm/llvm-project/pull/132857
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llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/pcc updated https://github.com/llvm/llvm-project/pull/132857
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llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/pcc edited https://github.com/llvm/llvm-project/pull/132857
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https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/pcc updated https://github.com/llvm/llvm-project/pull/133536
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llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/pcc updated https://github.com/llvm/llvm-project/pull/133535
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https://github.com/pcc updated https://github.com/llvm/llvm-project/pull/133536
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llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/pcc updated https://github.com/llvm/llvm-project/pull/133537
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llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/pcc updated https://github.com/llvm/llvm-project/pull/133537
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