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MaskRay wrote:
> > @androm3da The hexagon-thunks-packets.s test added by this change is
> > failing on our s390x builds.
> > See
> > [download.copr.fedorainfracloud.org/results/@fedora-llvm-team/llvm21/fedora-rawhide-s390x/09365945-llvm/builder-live.log.gz](https://download.copr.fedorainfraclou
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MaskRay wrote:
Is this the last change in the patch series? The use of booleans is a good move
to prevent the complexity of MIPS-style dynamic relocations (which I haven’t
fully analyzed). Thanks for tidying this up!
https://github.com/llvm/llvm-project/pull/150813
@@ -470,7 +461,6 @@ class DynamicReloc {
void computeRaw(Ctx &, SymbolTableBaseSection *symt);
Symbol *sym;
- const OutputSection *outputSec = nullptr;
MaskRay wrote:
Thanks for removing `outputSec`!
https://github.com/llvm/llvm-project/pull/150810
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MaskRay wrote:
There are some discussions on a codegen patch #149444 that I did not follow.
Could you summarize the motivation in this patch's description?
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MaskRay wrote:
> The current code is quite crusty and divergent from non-MIPS in API use, but
> fixing it up like this is quite high-risk, especially given how weird the
> MIPS GOT is when it comes to the required initial memory state. Is anyone
> using LLD for MIPS these days who can test thi
https://github.com/MaskRay approved this pull request.
When DynamicReloc::Kind was introduced, I was concerned of the many Kinds, but
that was still better than the previous state. Thanks for the simplification.
https://github.com/llvm/llvm-project/pull/150798
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@@ -26,19 +26,15 @@ GOFFObjectWriter &MCGOFFStreamer::getWriter() {
return static_cast(getAssembler().getWriter());
}
-// Make sure that all section are registered in the correct order.
-static void registerSectionHierarchy(MCAssembler &Asm, MCSectionGOFF *Section)
{
- if
https://github.com/MaskRay created
https://github.com/llvm/llvm-project/pull/150183
registerSection should only be called by
MCObjectStreamer::changeSection. This will be utilized by a pending
change to move initial fragment allocation from MCContext::createSection
to MCStreamer::changeSection,
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MaskRay wrote:
Next steps:
* Allocate the fixed content as trailing data of the MCFragment by utilizing a
special bump allocator (gnulib obstack)
* Delete MCFixup member variables from MCFragment. Instead, add a MCFragment
pointer to MCFixup.
https://github.com/llvm/llvm-project/pull/149465
_
@@ -992,7 +965,30 @@ void MCAssembler::layoutSection(MCSection &Sec) {
uint64_t Offset = 0;
for (MCFragment &F : Sec) {
F.Offset = Offset;
-Offset += computeFragmentSize(F);
+if (F.getKind() == MCFragment::FT_Align) {
+ Offset += F.getFixedSize();
+ un
@@ -433,42 +434,44 @@ static void writeFragment(raw_ostream &OS, const
MCAssembler &Asm,
const auto &EF = cast(F);
OS << StringRef(EF.getContents().data(), EF.getContents().size());
OS << StringRef(EF.getVarContents().data(), EF.getVarContents().size());
-if (F
@@ -230,22 +230,24 @@ uint64_t MCAssembler::computeFragmentSize(const
MCFragment &F) const {
case MCFragment::FT_Align: {
unsigned Offset = F.Offset + F.getFixedSize();
unsigned Size = offsetToAlignment(Offset, F.getAlignment());
-
-// Insert extra Nops for code
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MaskRay wrote:
Can use some description what is the correct behavior.
Perhaps
https://gcc.gnu.org/onlinedocs/gcc/Optimize-Options.html#index-falign-functions
> If n is not specified or is zero, use a machine-dependent default.
https://github.com/llvm/llvm-project/pull/149445
_
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@@ -53,3 +53,4 @@ LLVM_FIXED_MD_KIND(MD_DIAssignID, "DIAssignID", 38)
LLVM_FIXED_MD_KIND(MD_coro_outside_frame, "coro.outside.frame", 39)
LLVM_FIXED_MD_KIND(MD_mmra, "mmra", 40)
LLVM_FIXED_MD_KIND(MD_noalias_addrspace, "noalias.addrspace", 41)
+LLVM_FIXED_MD_KIND(MD_elf_section
@@ -230,22 +230,24 @@ uint64_t MCAssembler::computeFragmentSize(const
MCFragment &F) const {
case MCFragment::FT_Align: {
unsigned Offset = F.Offset + F.getFixedSize();
unsigned Size = offsetToAlignment(Offset, F.getAlignment());
-
-// Insert extra Nops for code
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MaskRay wrote:
I haven't had the chance to review this patch in detail, but I’m concerned
about the number of linker options required for the CFI feature. While I
recognize its benefits, the complexity seems excessive.
https://github.com/llvm/llvm-project/pull/149448
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https://github.com/llvm/llvm-project/pull/149465
Previously, two MCAsmBackend hooks were used, with
shouldInsertFixupForCodeAlign calling getWriter().recordRelocation
directly, bypassing generic code.
This patch:
* Introduces MCAsmBackend::relaxAlign to repla
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Author: Fangrui Song
Date: 2025-07-04T00:58:07-07:00
New Revision: 7e3e2e1b8c6ff21e68782a56164139cca334fcf3
URL:
https://github.com/llvm/llvm-project/commit/7e3e2e1b8c6ff21e68782a56164139cca334fcf3
DIFF:
https://github.com/llvm/llvm-project/commit/7e3e2e1b8c6ff21e68782a56164139cca334fcf3.diff
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@@ -0,0 +1,67 @@
+# RUN: yaml2obj %s -o %t
+# RUN: llvm-objdump %t -d --symbolize-operands --no-show-raw-insn
--no-leading-addr | \
+# RUN: FileCheck %s --match-full-lines -DABS_ADRP_VAL=0x6000
+# RUN: llvm-objdump %t -d --symbolize-operands --no-show-raw-insn
--no-leading-add
https://github.com/MaskRay commented:
Looks good, but I'd check whether @jh7370 has opinions on the test.
(We need an executable for testing. llvm/test cannot use lld, so we have to
resort to hexadecimal bytes...)
https://github.com/llvm/llvm-project/pull/145009
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@@ -41,6 +44,61 @@ void MCGOFFStreamer::changeSection(MCSection *Section,
uint32_t Subsection) {
MCObjectStreamer::changeSection(Section, Subsection);
}
+void MCGOFFStreamer::emitLabel(MCSymbol *Symbol, SMLoc Loc) {
+ MCObjectStreamer::emitLabel(Symbol, Loc);
+ cast(Symbo
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https://github.com/MaskRay commented:
LGTM! But I will delegated to a GOFF expert for approval...
https://github.com/llvm/llvm-project/pull/144437
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Rename these relocation specifier constants, aligning with the naming
convention used by other targets (`S_` instead of `VK_`).
* ELF/COFF: AArch64MCExpr::VK_ => AArch64::S_ (VK_ABS/VK_PAGE_ABS are
also used b
@@ -0,0 +1,92 @@
+//===- TargetImpl.h -*- C++
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apa
@@ -0,0 +1,94 @@
+//===- TargetImpl.h -*- C++
-*-===//
MaskRay wrote:
`//===--===//`
for new file per https://llvm.org/docs/CodingStandards.html#file
@@ -0,0 +1,98 @@
+# REQUIRES: x86
+
+## Test that the branch-to-branch optimization follows the links
+## from f1 -> f2 -> f3 and updates all references to point to f3.
+
+# RUN: llvm-mc -filetype=obj -triple=x86_64-pc-linux %s -o %t.o
+# RUN: ld.lld %t.o -o %t --branch-to-branch
@@ -0,0 +1,94 @@
+//===- TargetImpl.h -*- C++
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apa
@@ -0,0 +1,94 @@
+//===- TargetImpl.h -*- C++
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apa
MaskRay wrote:
Perhaps you'll need to change the base branch to `main` and force push to
users/pcc/spr/elf-add-branch-to-branch-optimization?
https://github.com/llvm/llvm-project/pull/138366
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@@ -975,6 +977,62 @@ void AArch64::relocateAlloc(InputSectionBase &sec, uint8_t
*buf) const {
}
}
+static std::optional getControlTransferAddend(InputSection &is,
+Relocation &r) {
+ // Identify a control transfer rel
MaskRay wrote:
> [pcc](https://github.com/pcc) wants to merge 1 commit into
> [users/pcc/spr/main.elf-add-branch-to-branch-optimization](https://github.com/llvm/llvm-project/tree/users/pcc/spr/main.elf-add-branch-to-branch-optimization)
> from
> [users/pcc/spr/elf-add-branch-to-branch-optimiza
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https://github.com/MaskRay requested changes to this pull request.
While at Google, I encountered this issue co-authored the glibc commit
b5c45e83753b27dc538dff2d55d4410c385cf3a4.
I don’t believe this is relevant for upstream LLD, so I haven’t pursued
submitting a linker patch.
The piece of LLD
@@ -0,0 +1,39 @@
+
MaskRay wrote:
Use `clang/test/CodeGen/debug-info-*.c`? We use `%clang_cc1` in almost all
non-driver tests
https://github.com/llvm/llvm-project/pull/134635
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@@ -50,26 +53,26 @@ class MCSectionGOFF final : public MCSection {
friend class MCContext;
friend class MCSymbolGOFF;
- MCSectionGOFF(StringRef Name, SectionKind K, GOFF::SDAttr SDAttributes,
-MCSectionGOFF *Parent)
- : MCSection(SV_GOFF, Name, K.isTe
MaskRay wrote:
> The alternative fix, which I think I'm now leaning towards, would be to
> change how the branch-to-branch optimization handles relocations to
> STT_SECTION symbols. A relocation pointing to the STT_SECTION for .text with
> addend 1 would be treated as a branch to .text+5 and i
MaskRay wrote:
> @MaskRay Sorry, your comment is basically empty. I guess a GitHub problem?
Sorry... Could be my accidentally pushing a comment to a wrong PR..
https://github.com/llvm/llvm-project/pull/133799
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MaskRay wrote:
The goal is to differentiate two scenarios when a symbol is referenced by a
potential R_X86_64_PLT32 relocation:
* `.4byte foo@plt - .` (LLVM assembly extension, not supported in GNU
assembler): No redirection to a thunk. References foo or its PLT entry.
* `jmp foo; .section .te
MaskRay wrote:
I've read
https://github.com/llvm/llvm-project/pull/138366#issuecomment-2855889424 but I
am still not following.
What is invalid?
Note that range extension thunks track both the symbol and the addend (e.g.
https://reviews.llvm.org/D70637 (AArch64)).
So we could add a thunk for
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3
之
https://github.com/llvm/llvm-project/pull/133799
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https://github.com/MaskRay commented:
LGTM. As I'm not familiar with z/OS, my review focused on its compatibility
with the current MC infrastructure. (My internet access will be limited between
April 20th and May 4th, which may cause delays in my response time.)
Thanks for reimplementing the g
MaskRay wrote:
> Hey Amir,
>
> Thanks for the PR. Unfortunately, it is still failing. The trick below
> doesn't seem to work on my buildbot machine:
>
> > Link against a DSO to ensure PLT entries.
>
> So doing:
>
> ```shell
> nm --synthetic callcont-fallthru.s.tmp
> ```
>
> won't list a `pu
@@ -1,5 +1,12 @@
// UNSUPPORTED: system-windows
+// Test interaction with -fuse-ld=lld
MaskRay wrote:
You need to ensure that there is an `ld.lld` file with `-B%S/Inputs/lld`
https://github.com/llvm/llvm-project/pull/121830
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@@ -1,5 +1,12 @@
// UNSUPPORTED: system-windows
+// Test interaction with -fuse-ld=lld
MaskRay wrote:
For `-fuse-ld=lld` , testing `ld.lld` is probably not a good use of an extra
RUN line. Could just modify one of the tests below from `-fuse-ld=` to
`-fuse-l
@@ -0,0 +1,112 @@
+; RUN: llc <%s --mtriple s390x-ibm-zos --filetype=obj -o - | \
MaskRay wrote:
`llc < %s` does not need `-o -`. .ll tests in llvm/test/MC is probably not a
good convention we'd recommend. Move to llvm/test/CodeGen/SystemZ, perhaps
under a dire
@@ -599,8 +600,18 @@ class MCContext {
unsigned Flags,
unsigned EntrySize);
- MCSectionGOFF *getGOFFSection(StringRef Section, SectionKind Kind,
-
https://github.com/MaskRay updated
https://github.com/llvm/llvm-project/pull/135509
>From 3579f7d24a771f4c02e796a2ac9b91024b3c6ce9 Mon Sep 17 00:00:00 2001
From: Fangrui Song
Date: Sat, 12 Apr 2025 16:27:14 -0700
Subject: [PATCH] .
Created using spr 1.3.5-bogner
---
llvm/test/MC/RISCV/functio
https://github.com/MaskRay updated
https://github.com/llvm/llvm-project/pull/135509
>From 3579f7d24a771f4c02e796a2ac9b91024b3c6ce9 Mon Sep 17 00:00:00 2001
From: Fangrui Song
Date: Sat, 12 Apr 2025 16:27:14 -0700
Subject: [PATCH] .
Created using spr 1.3.5-bogner
---
llvm/test/MC/RISCV/functio
MaskRay wrote:
> I had pushed #135324 a couple of days ago to fix the same issue. I'm happy to
> land either patch.
Thanks! I'll land this one (wanted to make it clear `@plt` is a legacy thing
and test `call foo@3`). Let me think about the AsmBackend change.
https://github.com/llvm/llvm-proje
https://github.com/MaskRay updated
https://github.com/llvm/llvm-project/pull/135509
>From 3579f7d24a771f4c02e796a2ac9b91024b3c6ce9 Mon Sep 17 00:00:00 2001
From: Fangrui Song
Date: Sat, 12 Apr 2025 16:27:14 -0700
Subject: [PATCH] .
Created using spr 1.3.5-bogner
---
llvm/test/MC/RISCV/functio
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https://github.com/llvm/llvm-project/pull/135509
... instead of silently parsing and ignoring it without leaving an error
message.
While here, remove an unreachable `@plt`.
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@@ -0,0 +1,236 @@
+## Check parsing of a .llvm_jump_table_info section
MaskRay wrote:
(Can use the llvm/utils/update_test_body.py format to make re-generation easier
:) )
https://github.com/llvm/llvm-project/pull/132114
_
https://github.com/MaskRay approved this pull request.
https://github.com/llvm/llvm-project/pull/135123
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https://github.com/llvm/llvm-project/pull/134879
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https://github.com/MaskRay created
https://github.com/llvm/llvm-project/pull/134879
now that llc supports `-M no-aliases` (along with llvm-mc and llvm-objdump).
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MaskRay wrote:
> The linker job in BareMetal toolchain object will be used by gnuld and lld
> both.
GNU ld instead of gnuld.
https://github.com/llvm/llvm-project/pull/132806
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@@ -19,7 +19,7 @@
; CHECK:.quad L#PPA2-CELQSTRT * A(PPA2-CELQSTRT)
; CHECK: L#PPA1_void_test_0:
; CHECK:.long L#PPA2-L#PPA1_void_test_0 * Offset to PPA2
-; CHECK:.section"B_IDRL"
+; CHECK:.section".idrl"
MaskRay
@@ -169,6 +169,91 @@ enum SubsectionKind : uint8_t {
SK_PPA1 = 2,
SK_PPA2 = 4,
};
+
+// The standard System/390 convention is to name the high-order (leftmost) bit
+// in a byte as bit zero. The Flags type helps to set bits in byte according
+// to this numeration order.
+c
@@ -0,0 +1,73 @@
+; RUN: llc <%s --mtriple s390x-ibm-zos --filetype=obj -o - | \
+; RUN: od -Ax -tx1 -v | FileCheck --ignore-case %s
+; REQUIRES: systemz-registered-target
MaskRay wrote:
unneeded thanks to
```
% cat llvm/test/MC/SystemZ/lit.local.cfg
if not "Sy
@@ -169,6 +169,91 @@ enum SubsectionKind : uint8_t {
SK_PPA1 = 2,
SK_PPA2 = 4,
};
+
+// The standard System/390 convention is to name the high-order (leftmost) bit
+// in a byte as bit zero. The Flags type helps to set bits in byte according
+// to this numeration order.
+c
@@ -169,6 +169,91 @@ enum SubsectionKind : uint8_t {
SK_PPA1 = 2,
SK_PPA2 = 4,
};
+
+// The standard System/390 convention is to name the high-order (leftmost) bit
+// in a byte as bit zero. The Flags type helps to set bits in byte according
+// to this numeration order.
+c
https://github.com/MaskRay approved this pull request.
https://github.com/llvm/llvm-project/pull/133591
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https://github.com/llvm/llvm-project/pull/132569
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