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https://github.com/s-barannikov updated
https://github.com/llvm/llvm-project/pull/156363
>From f3b4f276760009154caa8140dc5b92651dfbe4db Mon Sep 17 00:00:00 2001
From: Sergei Barannikov
Date: Mon, 1 Sep 2025 20:27:48 +0300
Subject: [PATCH] [AArch64] Provide a custom decoder for LDR_ZA/STR_ZA
Th
tru wrote:
Are we happy / confident with this one now? @philnik777 @ldionne ?
https://github.com/llvm/llvm-project/pull/155712
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https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/156695
>From 22f1911b5b5f7a25d5d9cb74feb864341ef9a782 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Wed, 3 Sep 2025 22:33:01 +0900
Subject: [PATCH] AMDGPU: Define agpr versions of ds permute instructions
Correctl
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/156696
>From c7238cff2feb2f7e1e7d7b0f55ae5b9917a682a2 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Thu, 4 Sep 2025 00:00:22 +0900
Subject: [PATCH] AMDGPU: Remove the DS special case in getRegClass
These instruct
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/156695
>From 22f1911b5b5f7a25d5d9cb74feb864341ef9a782 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Wed, 3 Sep 2025 22:33:01 +0900
Subject: [PATCH] AMDGPU: Define agpr versions of ds permute instructions
Correctl
cjappl wrote:
Sounds good, and totally understood. Thanks for helping us understand the
general process and precedent @tru
We have reached out to the original bug reporter and are going to ask if some
proposed workarounds will service until LLVM 22. I will ping you on here when I
have an ide
llvmbot wrote:
@llvm/pr-subscribers-clang
Author: Helena Kotas (hekota)
Changes
Use static methods `__createFromBinding` and `__createFromImplicitBinding` to
initialize individual resources in Sema HLSL. Resources in arrays will be
handles in a separate change.
Depends on #155866
Part
llvmbot wrote:
@llvm/pr-subscribers-hlsl
Author: Helena Kotas (hekota)
Changes
Use static methods `__createFromBinding` and `__createFromImplicitBinding` to
initialize individual resources in Sema HLSL. Resources in arrays will be
handles in a separate change.
Depends on #155866
Part 2
https://github.com/hekota updated
https://github.com/llvm/llvm-project/pull/156544
>From 02342c922d0feec12b980528eb4a75e8d6676ebe Mon Sep 17 00:00:00 2001
From: Helena Kotas
Date: Tue, 2 Sep 2025 15:03:11 -0700
Subject: [PATCH 1/3] [HLSL] Use static create methods to initialize individual
reso
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/156655
>From 61b4ecaf9130602ed184ed505be6ed76d7e13f2e Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Wed, 3 Sep 2025 20:08:48 +0900
Subject: [PATCH] AMDGPU: Fix definitions of DS ret atomics with AGPRs
These are 2
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/156695
>From 25ff1b6a8940230deaa680241f9ce67d7896ab5d Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Wed, 3 Sep 2025 22:33:01 +0900
Subject: [PATCH] AMDGPU: Define agpr versions of ds permute instructions
Correctl
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/156581
>From a09ada3d217bcf5728f32d7a16c334fb0330e617 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Wed, 3 Sep 2025 12:06:53 +0900
Subject: [PATCH] AMDGPU: Change FLAT classes to use RegisterOperand parameters
Th
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/156695
>From 25ff1b6a8940230deaa680241f9ce67d7896ab5d Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Wed, 3 Sep 2025 22:33:01 +0900
Subject: [PATCH] AMDGPU: Define agpr versions of ds permute instructions
Correctl
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/156696
>From 1b6877bd4a0ef4a30fcd0728b6e1864200969bc8 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Thu, 4 Sep 2025 00:00:22 +0900
Subject: [PATCH] AMDGPU: Remove the DS special case in getRegClass
These instruct
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/156696
>From 1b6877bd4a0ef4a30fcd0728b6e1864200969bc8 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Thu, 4 Sep 2025 00:00:22 +0900
Subject: [PATCH] AMDGPU: Remove the DS special case in getRegClass
These instruct
https://github.com/benshi001 edited
https://github.com/llvm/llvm-project/pull/156361
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@@ -1230,7 +1230,9 @@ let Uses = [R1, R0] in {
let Defs = [R31R30] in
def SPMZPi : F16<0b100101011000, (outs), (ins ZREG:$z), "spm $z+", []>,
- Requires<[HasSPMX]>;
+ Requires<[HasSPMX]> {
+bits<0> z;
benshi001 wrote:
@@ -0,0 +1,334 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
UTC_ARGS: --version 5
arsenm wrote:
No. This needs new support in AMDGPURewriteAGPRCopyMFMA (which will also need a
renaming...)
https://github.com/llvm/llvm-proje
https://github.com/llvmbot created
https://github.com/llvm/llvm-project/pull/156764
Backport a862225813c251c28b085603b7d32d4b111dbc57
Requested by: @Michael137
>From 4afd084013a57eb6ae27f46458d9e4115599a6a9 Mon Sep 17 00:00:00 2001
From: Michael Buch
Date: Wed, 3 Sep 2025 20:04:53 +0100
Subje
https://github.com/s-barannikov updated
https://github.com/llvm/llvm-project/pull/156362
>From d80acf2607cbe3bdc8beedbad108ddba1f174541 Mon Sep 17 00:00:00 2001
From: Sergei Barannikov
Date: Mon, 1 Sep 2025 20:22:53 +0300
Subject: [PATCH] [AArch64] Correctly disassemble TSB instruction
TSB ins
cachemeifyoucan wrote:
Before landing the other change and rebase this, I created a branch to
benchmark compile time:
https://llvm-compile-time-tracker.com/compare.php?from=3b3fc701d8f83d4ca30ee1c818fb7687336ac178&to=e5febfb1d9d880b4f7af5dc32194f479ee2adcd6&stat=instructions%3Au
Nothing stands
https://github.com/s-barannikov edited
https://github.com/llvm/llvm-project/pull/156361
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@@ -38,11 +38,7 @@ class Enc_041d7b : OpcodeHexagon {
let Inst{7-1} = Ii{8-2};
bits <4> Rs16;
let Inst{19-16} = Rs16{3-0};
- bits <5> n1;
- let Inst{28-28} = n1{4-4};
- let Inst{24-23} = n1{3-2};
- let Inst{13-13} = n1{1-1};
- let Inst{8-8} = n1{0-0};
---
https://github.com/s-barannikov updated
https://github.com/llvm/llvm-project/pull/156362
>From d80acf2607cbe3bdc8beedbad108ddba1f174541 Mon Sep 17 00:00:00 2001
From: Sergei Barannikov
Date: Mon, 1 Sep 2025 20:22:53 +0300
Subject: [PATCH] [AArch64] Correctly disassemble TSB instruction
TSB ins
https://github.com/s-barannikov updated
https://github.com/llvm/llvm-project/pull/156361
>From 1346d77cc53c6a4152eff9a885244daa360254f7 Mon Sep 17 00:00:00 2001
From: Sergei Barannikov
Date: Mon, 1 Sep 2025 20:18:57 +0300
Subject: [PATCH] [AVR] Remove workarounds for instructions using Z regist
https://github.com/s-barannikov updated
https://github.com/llvm/llvm-project/pull/156360
>From d01399ac76d639e7474a8ae382395d1985e64ff7 Mon Sep 17 00:00:00 2001
From: Sergei Barannikov
Date: Mon, 1 Sep 2025 20:18:06 +0300
Subject: [PATCH] [RISCV] Remove post-decoding instruction adjustments
--
https://github.com/s-barannikov updated
https://github.com/llvm/llvm-project/pull/156540
>From a4b01316df9cc4cbaddb92c6f62d3803f5b4600d Mon Sep 17 00:00:00 2001
From: Sergei Barannikov
Date: Tue, 2 Sep 2025 10:26:16 +0300
Subject: [PATCH] [ARM] Remove most post-decoding instruction adjustments
https://github.com/s-barannikov updated
https://github.com/llvm/llvm-project/pull/156364
>From ee67c361e4f40b314cd8e2ef4b262f5059c2c40d Mon Sep 17 00:00:00 2001
From: Sergei Barannikov
Date: Mon, 1 Sep 2025 20:30:01 +0300
Subject: [PATCH] [AArch64] Remove post-decoding instruction mutations
Th
https://github.com/s-barannikov updated
https://github.com/llvm/llvm-project/pull/156364
>From ee67c361e4f40b314cd8e2ef4b262f5059c2c40d Mon Sep 17 00:00:00 2001
From: Sergei Barannikov
Date: Mon, 1 Sep 2025 20:30:01 +0300
Subject: [PATCH] [AArch64] Remove post-decoding instruction mutations
Th
https://github.com/s-barannikov updated
https://github.com/llvm/llvm-project/pull/156363
>From f3b4f276760009154caa8140dc5b92651dfbe4db Mon Sep 17 00:00:00 2001
From: Sergei Barannikov
Date: Mon, 1 Sep 2025 20:27:48 +0300
Subject: [PATCH] [AArch64] Provide a custom decoder for LDR_ZA/STR_ZA
Th
https://github.com/s-barannikov updated
https://github.com/llvm/llvm-project/pull/156359
>From 01a8d9d7026b94f1cf060a8f12ad27df6e70ee2b Mon Sep 17 00:00:00 2001
From: Sergei Barannikov
Date: Mon, 1 Sep 2025 20:16:14 +0300
Subject: [PATCH] [Hexagon] Remove post-decoding instruction adjustments
https://github.com/s-barannikov updated
https://github.com/llvm/llvm-project/pull/156540
>From a4b01316df9cc4cbaddb92c6f62d3803f5b4600d Mon Sep 17 00:00:00 2001
From: Sergei Barannikov
Date: Tue, 2 Sep 2025 10:26:16 +0300
Subject: [PATCH] [ARM] Remove most post-decoding instruction adjustments
https://github.com/s-barannikov updated
https://github.com/llvm/llvm-project/pull/156360
>From d01399ac76d639e7474a8ae382395d1985e64ff7 Mon Sep 17 00:00:00 2001
From: Sergei Barannikov
Date: Mon, 1 Sep 2025 20:18:06 +0300
Subject: [PATCH] [RISCV] Remove post-decoding instruction adjustments
--
https://github.com/s-barannikov updated
https://github.com/llvm/llvm-project/pull/156359
>From 01a8d9d7026b94f1cf060a8f12ad27df6e70ee2b Mon Sep 17 00:00:00 2001
From: Sergei Barannikov
Date: Mon, 1 Sep 2025 20:16:14 +0300
Subject: [PATCH] [Hexagon] Remove post-decoding instruction adjustments
https://github.com/s-barannikov updated
https://github.com/llvm/llvm-project/pull/156361
>From 1346d77cc53c6a4152eff9a885244daa360254f7 Mon Sep 17 00:00:00 2001
From: Sergei Barannikov
Date: Mon, 1 Sep 2025 20:18:57 +0300
Subject: [PATCH] [AVR] Remove workarounds for instructions using Z regist
davemgreen wrote:
I managed to reproduce the original error and check that this fixes it. The
extra EH_LABELS that needed to be removed were added in b933f0c376c9.
https://github.com/llvm/llvm-project/pull/156170
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l
Author: Sjoerd Meijer
Date: 2025-09-03T20:00:34+01:00
New Revision: bbbe5384f1f231d7e206a37d43f30dc3b4975f96
URL:
https://github.com/llvm/llvm-project/commit/bbbe5384f1f231d7e206a37d43f30dc3b4975f96
DIFF:
https://github.com/llvm/llvm-project/commit/bbbe5384f1f231d7e206a37d43f30dc3b4975f96.diff
https://github.com/davemgreen approved this pull request.
https://github.com/llvm/llvm-project/pull/156170
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@@ -12,35 +12,75 @@
//===--===//
#include "BitstreamRemarkParser.h"
-#include "llvm/Remarks/Remark.h"
#include "llvm/Support/MemoryBuffer.h"
#include "llvm/Support/Path.h"
+#include
fhahn
@@ -52,171 +92,144 @@ static Error parseRecord(BitstreamMetaParserHelper
&Parser, unsigned Code) {
switch (*RecordID) {
case RECORD_META_CONTAINER_INFO: {
if (Record.size() != 2)
- return malformedRecord("BLOCK_META", "RECORD_META_CONTAINER_INFO");
-Parser.Con
@@ -339,13 +289,13 @@ Expected>
BitstreamRemarkParser::next() {
}
Error BitstreamRemarkParser::parseMeta() {
- // Advance and to the meta block.
- if (Error E = advanceToMetaBlock(ParserHelper))
+ if (Error E = ParserHelper.advanceToMetaBlock())
fhahn wrot
@@ -52,171 +92,144 @@ static Error parseRecord(BitstreamMetaParserHelper
&Parser, unsigned Code) {
switch (*RecordID) {
case RECORD_META_CONTAINER_INFO: {
if (Record.size() != 2)
- return malformedRecord("BLOCK_META", "RECORD_META_CONTAINER_INFO");
-Parser.Con
@@ -52,171 +92,144 @@ static Error parseRecord(BitstreamMetaParserHelper
&Parser, unsigned Code) {
switch (*RecordID) {
case RECORD_META_CONTAINER_INFO: {
if (Record.size() != 2)
- return malformedRecord("BLOCK_META", "RECORD_META_CONTAINER_INFO");
-Parser.Con
@@ -12,35 +12,75 @@
//===--===//
#include "BitstreamRemarkParser.h"
-#include "llvm/Remarks/Remark.h"
#include "llvm/Support/MemoryBuffer.h"
#include "llvm/Support/Path.h"
+#include
#include
using nam
https://github.com/fhahn edited https://github.com/llvm/llvm-project/pull/156511
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https://github.com/fhahn commented:
> NFCI (except for error messages on invalid bitstream files).
Would it be possible to add a test for the new error messages w/o too much
effort?
https://github.com/llvm/llvm-project/pull/156511
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Artem-B wrote:
The fix is for an issue introduced by a recent(ish) change
https://github.com/llvm/llvm-project/pull/126337, so it was not seen in any
20.x releases. No release note needed.
https://github.com/llvm/llvm-project/pull/155685
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tuliom wrote:
Results are much better now.
The AIX failures are unrelated to this PR.
cmake is failing to generate the ABI list file:
```
ABI list file not generated for configuration
powerpc64-ibm-aix7.2.0.0.libcxxabi.v1.stable.exceptions.nonew,
`check-cxx-abilist` will not be available.
```
https://github.com/boomanaiden154 updated
https://github.com/llvm/llvm-project/pull/156538
>From abde79bdaf1789f5c71d9c9fe08c78de924cbf03 Mon Sep 17 00:00:00 2001
From: Aiden Grossman
Date: Wed, 3 Sep 2025 17:08:08 +
Subject: [PATCH] fix test
Created using spr 1.3.6
---
lld/test/MachO/obj
llvmbot wrote:
@llvm/pr-subscribers-debuginfo
Author: Tobias Stadler (tobias-stadler)
Changes
Currently there are two serialization modes for bitstream Remarks:
standalone and separate. The separate mode splits remark metadata (e.g.
the string table) from actual remark data. The metadata i
llvmbot wrote:
@llvm/pr-subscribers-llvm-transforms
Author: Tobias Stadler (tobias-stadler)
Changes
Currently there are two serialization modes for bitstream Remarks:
standalone and separate. The separate mode splits remark metadata (e.g.
the string table) from actual remark data. The meta
https://github.com/tobias-stadler created
https://github.com/llvm/llvm-project/pull/156715
Currently there are two serialization modes for bitstream Remarks:
standalone and separate. The separate mode splits remark metadata (e.g.
the string table) from actual remark data. The metadata is written
https://github.com/Michael137 approved this pull request.
https://github.com/llvm/llvm-project/pull/156664
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https://github.com/MaskRay approved this pull request.
LGTM.
It's good to get rid of `$(($(cat %t.size.txt) + 5))`
https://github.com/llvm/llvm-project/pull/156537
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https://github.com/boomanaiden154 updated
https://github.com/llvm/llvm-project/pull/156526
>From b2968a7c143a43281bb2a62ed7a88bba3b356b52 Mon Sep 17 00:00:00 2001
From: Aiden Grossman
Date: Tue, 2 Sep 2025 20:30:00 +
Subject: [PATCH] fix
Created using spr 1.3.6
---
lld/test/lit.cfg.py | 2
https://github.com/boomanaiden154 updated
https://github.com/llvm/llvm-project/pull/156526
>From b2968a7c143a43281bb2a62ed7a88bba3b356b52 Mon Sep 17 00:00:00 2001
From: Aiden Grossman
Date: Tue, 2 Sep 2025 20:30:00 +
Subject: [PATCH] fix
Created using spr 1.3.6
---
lld/test/lit.cfg.py | 2
llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
Author: Matt Arsenault (arsenm)
Changes
This will make it easier to precisely express operand constraints
without having the implicit getLdStRegisterOperand at the bottom.
Also prunes out using AV classes in some instructions where AGPRs
a
llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
Author: Matt Arsenault (arsenm)
Changes
Start stripping out the uses of getLdStRegisterOperand. This
added a confusing level of indirection where the class at the
definition point was not the actual class used. This was also
pulling in the
llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
Author: Matt Arsenault (arsenm)
Changes
These are 2-data operations that need to use all-AGPR or all-VGPR
inputs. Stop defining them with AVLdSt data operands, and add _agpr
variants.
---
Patch is 102.33 KiB, truncated to 20.00 KiB below
https://github.com/dwblaikie approved this pull request.
https://github.com/llvm/llvm-project/pull/156664
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llvmbot wrote:
@llvm/pr-subscribers-lld-macho
Author: Aiden Grossman (boomanaiden154)
Changes
Subshells are not supported in the lit internal shell. We can remove
them by constructing sed commands directly inside of a separate file.
Towards #102700.
---
Full diff: https://github.com/llv
llvmbot wrote:
@llvm/pr-subscribers-lld
Author: Aiden Grossman (boomanaiden154)
Changes
This patch updates the lld lit test config to use the internal shell by
default. This has some performance advantages (~10-15%) and also
produces nicer failure output. This should have no impact on test
https://github.com/boomanaiden154 updated
https://github.com/llvm/llvm-project/pull/156538
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llvmbot wrote:
@llvm/pr-subscribers-lld-macho
Author: Aiden Grossman (boomanaiden154)
Changes
These tests were using subexpressions to change the cache size. Change
them up to write out the necessary commands to a response file and then
load that on the lld command line.
Towards #102700.
llvmbot wrote:
@llvm/pr-subscribers-lld
Author: Aiden Grossman (boomanaiden154)
Changes
Subshells are not supported in the lit internal shell. We can remove
them by constructing sed commands directly inside of a separate file.
Towards #102700.
---
Full diff: https://github.com/llvm/llvm
llvmbot wrote:
@llvm/pr-subscribers-lld-macho
Author: Aiden Grossman (boomanaiden154)
Changes
Subshells are not supported in the lit internal shell. We can remove
them by constructing sed commands directly inside of a separate file.
Towards #102700.
---
Full diff: https://github.com/llv
llvmbot wrote:
@llvm/pr-subscribers-lld
Author: Aiden Grossman (boomanaiden154)
Changes
These tests were using subexpressions to change the cache size. Change
them up to write out the necessary commands to a response file and then
load that on the lld command line.
Towards #102700.
---
llvmbot wrote:
@llvm/pr-subscribers-lld
Author: Aiden Grossman (boomanaiden154)
Changes
This patch updates two LLD tests that were redirecting multiple commands
to the same FileCheck invocation to not use this strategy. This
construction is not supported by lit's internal shell and given i
llvmbot wrote:
@llvm/pr-subscribers-lld-macho
Author: Aiden Grossman (boomanaiden154)
Changes
This patch updates two LLD tests that were redirecting multiple commands
to the same FileCheck invocation to not use this strategy. This
construction is not supported by lit's internal shell and g
https://github.com/boomanaiden154 updated
https://github.com/llvm/llvm-project/pull/156537
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https://github.com/boomanaiden154 updated
https://github.com/llvm/llvm-project/pull/156526
>From b2968a7c143a43281bb2a62ed7a88bba3b356b52 Mon Sep 17 00:00:00 2001
From: Aiden Grossman
Date: Tue, 2 Sep 2025 20:30:00 +
Subject: [PATCH] fix
Created using spr 1.3.6
---
lld/test/lit.cfg.py | 2
https://github.com/boomanaiden154 updated
https://github.com/llvm/llvm-project/pull/156538
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https://github.com/boomanaiden154 updated
https://github.com/llvm/llvm-project/pull/156537
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https://github.com/boomanaiden154 updated
https://github.com/llvm/llvm-project/pull/156526
>From b2968a7c143a43281bb2a62ed7a88bba3b356b52 Mon Sep 17 00:00:00 2001
From: Aiden Grossman
Date: Tue, 2 Sep 2025 20:30:00 +
Subject: [PATCH] fix
Created using spr 1.3.6
---
lld/test/lit.cfg.py | 2
https://github.com/boomanaiden154 updated
https://github.com/llvm/llvm-project/pull/156533
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llvmbot wrote:
@llvm/pr-subscribers-backend-powerpc
Author: Joel E. Denny (jdenny-ornl)
Changes
The original loop (OL) that serves as input to LoopUnroll has basic blocks that
are arranged as follows:
```
OLPreHeader
OLHeader <-.
...|
OLLatch ---'
OLExit
```
In this depiction, e
llvmbot wrote:
@llvm/pr-subscribers-debuginfo
Author: Joel E. Denny (jdenny-ornl)
Changes
The original loop (OL) that serves as input to LoopUnroll has basic blocks that
are arranged as follows:
```
OLPreHeader
OLHeader <-.
...|
OLLatch ---'
OLExit
```
In this depiction, every b
llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
Author: Joel E. Denny (jdenny-ornl)
Changes
The original loop (OL) that serves as input to LoopUnroll has basic blocks that
are arranged as follows:
```
OLPreHeader
OLHeader <-.
...|
OLLatch ---'
OLExit
```
In this depiction, ev
klausler wrote:
> The bug fixed here is embarrassing, so if there is possibility to have it
> fixed on an active release branch, it would be better to do that.
Regressions on a stable release branch are also embarrassing, so be careful.
https://github.com/llvm/llvm-project/pull/155810
tru wrote:
I see that you and @davidtrevelyan are the rtsan maintainers - so in that case
I won't stand in the way of merging this into the release branch since at the
end of tho day it's mainly your headache if it something goes wrong :-)
That said - the LLVM documentation says this about rel
philnik777 wrote:
I've re-triggered the CI. Let's see if it's happy now.
https://github.com/llvm/llvm-project/pull/155712
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https://github.com/fabianmcg updated
https://github.com/llvm/llvm-project/pull/156374
>From af522ed2b48cee2fe81901f2396025d58341997b Mon Sep 17 00:00:00 2001
From: Fabian Mora <6982088+fabian...@users.noreply.github.com>
Date: Mon, 1 Sep 2025 21:05:55 +
Subject: [PATCH] extend ptr_add op
--
@@ -23,6 +24,41 @@ class LLVM_Attrhttps://github.com/llvm/llvm-project/pull/156374
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@@ -23,6 +24,41 @@ class LLVM_Attrhttps://github.com/llvm/llvm-project/pull/156374
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@@ -23,6 +24,41 @@ class LLVM_Attrhttps://github.com/llvm/llvm-project/pull/156374
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https://github.com/usx95 updated
https://github.com/llvm/llvm-project/pull/154009
>From 447c9ba2cc7d4a886a3c5c40d54bb1b3bcab2255 Mon Sep 17 00:00:00 2001
From: Utkarsh Saxena
Date: Sun, 17 Aug 2025 10:10:18 +
Subject: [PATCH] [LifetimeSafety] Track gsl::Pointer types
---
clang/lib/Analysi
@@ -271,35 +276,51 @@ static void ConnectEpilog(Loop *L, Value *ModVal,
BasicBlock *NewExit,
NewExit);
// Now PHIs should look like:
// NewExit:
-// PN = PHI [I, Latch], [poison, PreHeader]
+// PN = PHI [I, Latch]
// ...
https://github.com/usx95 updated
https://github.com/llvm/llvm-project/pull/154009
>From ab16e9aa72482026ed1ca48cd9e245fd4eaade9a Mon Sep 17 00:00:00 2001
From: Utkarsh Saxena
Date: Sun, 17 Aug 2025 10:10:18 +
Subject: [PATCH] [LifetimeSafety] Track gsl::Pointer types
---
clang/lib/Analysi
https://github.com/mtrofin approved this pull request.
https://github.com/llvm/llvm-project/pull/156549
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https://github.com/llvm/llvm-project/pull/154316
>From 613942a19bbde5b905adb9552fa7dc106f76152c Mon Sep 17 00:00:00 2001
From: Utkarsh Saxena
Date: Tue, 19 Aug 2025 12:00:53 +
Subject: [PATCH] Identify DeclRefExpr as a use of an origin
---
clang/lib/Analys
github-actions[bot] wrote:
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
You can test this locally with the following command:
``bash
git-clang-format --diff HEAD~1 HEAD --extensions cpp --
clang/lib/Analysis/LifetimeSafety.cpp
clang/test/Sem
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