[llvm-branch-commits] [llvm] [CodeGen][NPM] Stitch up loop passes in codegen pipeline (PR #148114)

2025-07-10 Thread Vikram Hegde via llvm-branch-commits
https://github.com/vikramRH edited https://github.com/llvm/llvm-project/pull/148114 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Add isRequired to passes missing it (PR #148115)

2025-07-10 Thread Vikram Hegde via llvm-branch-commits
https://github.com/vikramRH edited https://github.com/llvm/llvm-project/pull/148115 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Add isRequired to passes missing it (PR #148115)

2025-07-10 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm approved this pull request. Should fix the API to invert this, passes should be required by default https://github.com/llvm/llvm-project/pull/148115 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org http

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Add isRequired to passes missing it (PR #148115)

2025-07-10 Thread Matt Arsenault via llvm-branch-commits
arsenm wrote: Should use the `Co-authored-by:` tag and not reference usernames in the description https://github.com/llvm/llvm-project/pull/148115 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/

[llvm-branch-commits] [llvm] [CodeGen][NPM] VirtRegRewriter: Set VirtReg flag (PR #148107)

2025-07-10 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-llvm-regalloc Author: Vikram Hegde (vikramRH) Changes same as https://github.com/llvm/llvm-project/pull/138660, Authored by @optimisan --- Full diff: https://github.com/llvm/llvm-project/pull/148107.diff 2 Files Affected: - (modified) llvm/include/

[llvm-branch-commits] [llvm] [CodeGen][NPM] Read TargetMachine's EnableIPRA option (PR #148108)

2025-07-10 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Vikram Hegde (vikramRH) Changes same as https://github.com/llvm/llvm-project/pull/138670, authored by @optimisan --- Full diff: https://github.com/llvm/llvm-project/pull/148108.diff 2 Files Affected: - (modified) llvm/include

[llvm-branch-commits] [llvm] [CodeGen][NPM] Register Function Passes (PR #148109)

2025-07-10 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Vikram Hegde (vikramRH) Changes same as https://github.com/llvm/llvm-project/pull/138828, authored by @optimisan --- Patch is 20.92 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/148

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port ProcessImplicitDefs to NPM (PR #148110)

2025-07-10 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu @llvm/pr-subscribers-backend-x86 Author: Vikram Hegde (vikramRH) Changes same as https://github.com/llvm/llvm-project/pull/138829 authored by @optimisan --- Patch is 23.92 KiB, truncated to 20.00 KiB below, full version: https://githu

[llvm-branch-commits] [llvm] [CodeGen][NPM] VirtRegRewriter: Set VirtReg flag (PR #148107)

2025-07-10 Thread Vikram Hegde via llvm-branch-commits
https://github.com/vikramRH ready_for_review https://github.com/llvm/llvm-project/pull/148107 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [CodeGen][NPM] Read TargetMachine's EnableIPRA option (PR #148108)

2025-07-10 Thread Vikram Hegde via llvm-branch-commits
https://github.com/vikramRH ready_for_review https://github.com/llvm/llvm-project/pull/148108 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Fill in addPreSched2 passes (PR #148112)

2025-07-10 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Vikram Hegde (vikramRH) Changes same as https://github.com/llvm/llvm-project/pull/139516 authored by @optimisan --- Full diff: https://github.com/llvm/llvm-project/pull/148112.diff 3 Files Affected: - (modified) llvm/lib/Targe

[llvm-branch-commits] [llvm] [CodeGen][NPM] Register Function Passes (PR #148109)

2025-07-10 Thread Vikram Hegde via llvm-branch-commits
https://github.com/vikramRH ready_for_review https://github.com/llvm/llvm-project/pull/148109 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [CodeGen][NPM] Clear MachineFunctions without using PA (PR #148113)

2025-07-10 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Vikram Hegde (vikramRH) Changes same as https://github.com/llvm/llvm-project/pull/139517 authored by @optimisan --- Patch is 21.02 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/1481

[llvm-branch-commits] [llvm] [CodeGen][NPM] Stitch up loop passes in codegen pipeline (PR #148114)

2025-07-10 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Vikram Hegde (vikramRH) Changes same as https://github.com/llvm/llvm-project/pull/133050 authored by @optimisan --- Full diff: https://github.com/llvm/llvm-project/pull/148114.diff 4 Files Affected: - (modified) llvm/include/

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port ProcessImplicitDefs to NPM (PR #148110)

2025-07-10 Thread Vikram Hegde via llvm-branch-commits
https://github.com/vikramRH ready_for_review https://github.com/llvm/llvm-project/pull/148110 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Add isRequired to passes missing it (PR #148115)

2025-07-10 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-llvm-transforms Author: Vikram Hegde (vikramRH) Changes same as https://github.com/llvm/llvm-project/pull/134033. adds StructurizeCFG and LoopSimplify to the list. originally authored by @optimisan --- Full diff: https://github.com/llvm/llvm-project/

[llvm-branch-commits] [llvm] [CodeGen][NPM] Account inserted passes for -start/stop options (PR #148111)

2025-07-10 Thread Vikram Hegde via llvm-branch-commits
https://github.com/vikramRH ready_for_review https://github.com/llvm/llvm-project/pull/148111 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Add isRequired to passes missing it (PR #148115)

2025-07-10 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Vikram Hegde (vikramRH) Changes same as https://github.com/llvm/llvm-project/pull/134033. adds StructurizeCFG and LoopSimplify to the list. originally authored by @optimisan --- Full diff: https://github.com/llvm/llvm-project/p

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Fill in addPreSched2 passes (PR #148112)

2025-07-10 Thread Vikram Hegde via llvm-branch-commits
https://github.com/vikramRH ready_for_review https://github.com/llvm/llvm-project/pull/148112 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [CodeGen][NPM] Clear MachineFunctions without using PA (PR #148113)

2025-07-10 Thread Vikram Hegde via llvm-branch-commits
https://github.com/vikramRH ready_for_review https://github.com/llvm/llvm-project/pull/148113 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [CodeGen][NPM] Stitch up loop passes in codegen pipeline (PR #148114)

2025-07-10 Thread Vikram Hegde via llvm-branch-commits
https://github.com/vikramRH ready_for_review https://github.com/llvm/llvm-project/pull/148114 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Add isRequired to passes missing it (PR #148115)

2025-07-10 Thread Vikram Hegde via llvm-branch-commits
https://github.com/vikramRH ready_for_review https://github.com/llvm/llvm-project/pull/148115 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [CodeGen][NPM] Clear MachineFunctions without using PA (PR #148113)

2025-07-10 Thread Vikram Hegde via llvm-branch-commits
https://github.com/vikramRH edited https://github.com/llvm/llvm-project/pull/148113 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Fill in addPreSched2 passes (PR #148112)

2025-07-10 Thread Vikram Hegde via llvm-branch-commits
https://github.com/vikramRH edited https://github.com/llvm/llvm-project/pull/148112 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [CodeGen][NPM] Account inserted passes for -start/stop options (PR #148111)

2025-07-10 Thread Vikram Hegde via llvm-branch-commits
https://github.com/vikramRH edited https://github.com/llvm/llvm-project/pull/148111 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port ProcessImplicitDefs to NPM (PR #148110)

2025-07-10 Thread Vikram Hegde via llvm-branch-commits
https://github.com/vikramRH edited https://github.com/llvm/llvm-project/pull/148110 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [CodeGen][NPM] Register Function Passes (PR #148109)

2025-07-10 Thread Vikram Hegde via llvm-branch-commits
https://github.com/vikramRH edited https://github.com/llvm/llvm-project/pull/148109 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [CodeGen][NPM] Read TargetMachine's EnableIPRA option (PR #148108)

2025-07-10 Thread Vikram Hegde via llvm-branch-commits
https://github.com/vikramRH edited https://github.com/llvm/llvm-project/pull/148108 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [CodeGen][NPM] VirtRegRewriter: Set VirtReg flag (PR #148107)

2025-07-10 Thread Vikram Hegde via llvm-branch-commits
https://github.com/vikramRH edited https://github.com/llvm/llvm-project/pull/148107 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [CodeGen][NPM] Clear MachineFunctions without using PA (PR #148113)

2025-07-10 Thread Vikram Hegde via llvm-branch-commits
vikramRH wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/148113?utm_source=stack-comment-downstack-mergeability-warning"

[llvm-branch-commits] [llvm] [CodeGen][NPM] Account inserted passes for -start/stop options (PR #148111)

2025-07-10 Thread Vikram Hegde via llvm-branch-commits
vikramRH wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/148111?utm_source=stack-comment-downstack-mergeability-warning"

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Add isRequired to passes missing it (PR #148115)

2025-07-10 Thread Vikram Hegde via llvm-branch-commits
vikramRH wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/148115?utm_source=stack-comment-downstack-mergeability-warning"

[llvm-branch-commits] [llvm] [CodeGen][NPM] Account inserted passes for -start/stop options (PR #148111)

2025-07-10 Thread Vikram Hegde via llvm-branch-commits
https://github.com/vikramRH created https://github.com/llvm/llvm-project/pull/148111 None Unicorn! · GitHub body { background-color: #f1f1f1; margin: 0; font-family: "Helvetica Neue", Helvetica, Arial, sans-serif; } .container { margin:

[llvm-branch-commits] [llvm] [CodeGen][NPM] Stitch up loop passes in codegen pipeline (PR #148114)

2025-07-10 Thread Vikram Hegde via llvm-branch-commits
vikramRH wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/148114?utm_source=stack-comment-downstack-mergeability-warning"

[llvm-branch-commits] [llvm] [CodeGen][NPM] Register Function Passes (PR #148109)

2025-07-10 Thread Vikram Hegde via llvm-branch-commits
vikramRH wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/148109?utm_source=stack-comment-downstack-mergeability-warning"

[llvm-branch-commits] [llvm] [CodeGen][NPM] Register Function Passes (PR #148109)

2025-07-10 Thread Vikram Hegde via llvm-branch-commits
https://github.com/vikramRH created https://github.com/llvm/llvm-project/pull/148109 None Unicorn! · GitHub body { background-color: #f1f1f1; margin: 0; font-family: "Helvetica Neue", Helvetica, Arial, sans-serif; } .container { margin:

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Fill in addPreSched2 passes (PR #148112)

2025-07-10 Thread Vikram Hegde via llvm-branch-commits
vikramRH wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/148112?utm_source=stack-comment-downstack-mergeability-warning"

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Add isRequired to passes missing it (PR #148115)

2025-07-10 Thread Vikram Hegde via llvm-branch-commits
https://github.com/vikramRH created https://github.com/llvm/llvm-project/pull/148115 None Unicorn! · GitHub body { background-color: #f1f1f1; margin: 0; font-family: "Helvetica Neue", Helvetica, Arial, sans-serif; } .container { margin:

[llvm-branch-commits] [llvm] [CodeGen][NPM] Stitch up loop passes in codegen pipeline (PR #148114)

2025-07-10 Thread Vikram Hegde via llvm-branch-commits
https://github.com/vikramRH created https://github.com/llvm/llvm-project/pull/148114 None Unicorn! · GitHub body { background-color: #f1f1f1; margin: 0; font-family: "Helvetica Neue", Helvetica, Arial, sans-serif; } .container { margin:

[llvm-branch-commits] [llvm] [CodeGen][NPM] Read TargetMachine's EnableIPRA option (PR #148108)

2025-07-10 Thread Vikram Hegde via llvm-branch-commits
https://github.com/vikramRH created https://github.com/llvm/llvm-project/pull/148108 None Unicorn! · GitHub body { background-color: #f1f1f1; margin: 0; font-family: "Helvetica Neue", Helvetica, Arial, sans-serif; } .container { margin:

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port ProcessImplicitDefs to NPM (PR #148110)

2025-07-10 Thread Vikram Hegde via llvm-branch-commits
vikramRH wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/148110?utm_source=stack-comment-downstack-mergeability-warning"

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Fill in addPreSched2 passes (PR #148112)

2025-07-10 Thread Vikram Hegde via llvm-branch-commits
https://github.com/vikramRH created https://github.com/llvm/llvm-project/pull/148112 None Unicorn! · GitHub body { background-color: #f1f1f1; margin: 0; font-family: "Helvetica Neue", Helvetica, Arial, sans-serif; } .container { margin:

[llvm-branch-commits] [llvm] [CodeGen][NPM] Clear MachineFunctions without using PA (PR #148113)

2025-07-10 Thread Vikram Hegde via llvm-branch-commits
https://github.com/vikramRH created https://github.com/llvm/llvm-project/pull/148113 None Unicorn! · GitHub body { background-color: #f1f1f1; margin: 0; font-family: "Helvetica Neue", Helvetica, Arial, sans-serif; } .container { margin:

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port ProcessImplicitDefs to NPM (PR #148110)

2025-07-10 Thread Vikram Hegde via llvm-branch-commits
https://github.com/vikramRH created https://github.com/llvm/llvm-project/pull/148110 None Unicorn! · GitHub body { background-color: #f1f1f1; margin: 0; font-family: "Helvetica Neue", Helvetica, Arial, sans-serif; } .container { margin:

[llvm-branch-commits] [llvm] [CodeGen][NPM] VirtRegRewriter: Set VirtReg flag (PR #148107)

2025-07-10 Thread Vikram Hegde via llvm-branch-commits
vikramRH wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/148107?utm_source=stack-comment-downstack-mergeability-warning"

[llvm-branch-commits] [llvm] [CodeGen][NPM] Read TargetMachine's EnableIPRA option (PR #148108)

2025-07-10 Thread Vikram Hegde via llvm-branch-commits
vikramRH wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/148108?utm_source=stack-comment-downstack-mergeability-warning"

[llvm-branch-commits] [llvm] [CodeGen][NPM] VirtRegRewriter: Set VirtReg flag (PR #148107)

2025-07-10 Thread Vikram Hegde via llvm-branch-commits
https://github.com/vikramRH created https://github.com/llvm/llvm-project/pull/148107 None >From a7b5f3a39a9f65757d1659eaca8ddf410cf6aa45 Mon Sep 17 00:00:00 2001 From: vikhegde Date: Thu, 10 Jul 2025 15:25:03 +0530 Subject: [PATCH] [CodeGen][NPM] VirtRegRewriter: Set VirtReg flag --- llvm/in

[llvm-branch-commits] [llvm] [BOLT] Impute missing trace fall-through (PR #145258)

2025-07-10 Thread Amir Ayupov via llvm-branch-commits
https://github.com/aaupov updated https://github.com/llvm/llvm-project/pull/145258 >From 9aef8e0a499fa4b9e6bbde910a678a65a0ab7f92 Mon Sep 17 00:00:00 2001 From: Amir Ayupov Date: Mon, 23 Jun 2025 12:54:06 -0700 Subject: [PATCH] unified checkReturn and checkUncondJump, logging Created using spr

[llvm-branch-commits] [llvm] [BOLT] Impute missing trace fall-through (PR #145258)

2025-07-10 Thread Amir Ayupov via llvm-branch-commits
https://github.com/aaupov updated https://github.com/llvm/llvm-project/pull/145258 >From 9aef8e0a499fa4b9e6bbde910a678a65a0ab7f92 Mon Sep 17 00:00:00 2001 From: Amir Ayupov Date: Mon, 23 Jun 2025 12:54:06 -0700 Subject: [PATCH] unified checkReturn and checkUncondJump, logging Created using spr

[llvm-branch-commits] [flang] [flang][fir] Small clean-up in `fir_DoConcurrentLoopOp`'s defintion (PR #146028)

2025-07-10 Thread Kareem Ergawy via llvm-branch-commits
https://github.com/ergawy updated https://github.com/llvm/llvm-project/pull/146028 >From 8e67de7800c02e7d93fadabc92a91618dda0d715 Mon Sep 17 00:00:00 2001 From: ergawy Date: Fri, 27 Jun 2025 00:05:42 -0500 Subject: [PATCH] [flang][fir] Small clean-up in `fir_DoConcurrentLoopOp`'s defintion Re

[llvm-branch-commits] [llvm] [BOLT] Impute missing trace fall-through (PR #145258)

2025-07-10 Thread via llvm-branch-commits
https://github.com/ShatianWang edited https://github.com/llvm/llvm-project/pull/145258 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [BOLT] Impute missing trace fall-through (PR #145258)

2025-07-10 Thread via llvm-branch-commits
@@ -529,6 +534,49 @@ void DataAggregator::parsePerfData(BinaryContext &BC) { deleteTempFiles(); } +void DataAggregator::imputeFallThroughs() { + if (Traces.empty()) +return; + + std::pair PrevBranch(Trace::EXTERNAL, Trace::EXTERNAL); + uint64_t AggregateCount = 0; +

[llvm-branch-commits] [llvm] [BOLT] Impute missing trace fall-through (PR #145258)

2025-07-10 Thread via llvm-branch-commits
https://github.com/ShatianWang approved this pull request. This is a simple and elegant solution to the fallthrough undercounting problem. Thanks for working on it. I added a nit comment, but otherwise LGTM. https://github.com/llvm/llvm-project/pull/145258 __

[llvm-branch-commits] [llvm] [AMDGPU] Negative gfx1250 v_dual_cndmask_b32 tests. NFC. (PR #148057)

2025-07-10 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm approved this pull request. https://github.com/llvm/llvm-project/pull/148057 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [llvm-profgen] Extend llvm-profgen to generate vtable profiles with data access events. (PR #148013)

2025-07-10 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-pgo Author: Mingming Liu (mingmingl-llvm) Changes An RFC is in https://discourse.llvm.org/t/rfc-vtable-type-profiling-for-samplefdo/87283 This change extends to process perf data with Intel [MEM_INST_RETIRED.ALL_LOADS](https://perfmon-events.intel.co

[llvm-branch-commits] [llvm] [llvm-profgen] Extend llvm-profgen to generate vtable profiles with data access events. (PR #148013)

2025-07-10 Thread Mingming Liu via llvm-branch-commits
https://github.com/mingmingl-llvm ready_for_review https://github.com/llvm/llvm-project/pull/148013 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [llvm-profgen] Extend llvm-profgen to generate vtable profiles with data access events. (PR #148013)

2025-07-10 Thread Mingming Liu via llvm-branch-commits
https://github.com/mingmingl-llvm edited https://github.com/llvm/llvm-project/pull/148013 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [LifetimeSafety] Implement dataflow analysis for loan propagation (PR #147295)

2025-07-10 Thread Utkarsh Saxena via llvm-branch-commits
usx95 wrote: Sorry about closing this. I have moved this to https://github.com/llvm/llvm-project/pull/148065 I accidentally deleted the base branch which permanently closes the PR :( https://github.com/llvm/llvm-project/pull/147295 ___ llvm-branch-co

[llvm-branch-commits] [llvm] [AMDGPU] Negative gfx1250 v_dual_cndmask_b32 tests. NFC. (PR #148057)

2025-07-10 Thread Joe Nash via llvm-branch-commits
https://github.com/Sisyph approved this pull request. https://github.com/llvm/llvm-project/pull/148057 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU] Negative gfx1250 v_dual_cndmask_b32 tests. NFC. (PR #148057)

2025-07-10 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-mc Author: Stanislav Mekhanoshin (rampitec) Changes --- Full diff: https://github.com/llvm/llvm-project/pull/148057.diff 1 Files Affected: - (modified) llvm/test/MC/AMDGPU/gfx1250_err.s (+25) ``diff diff --git a/llvm/test/MC/AMDGPU/gfx125

[llvm-branch-commits] [llvm] [AMDGPU] Negative gfx1250 v_dual_cndmask_b32 tests. NFC. (PR #148057)

2025-07-10 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Stanislav Mekhanoshin (rampitec) Changes --- Full diff: https://github.com/llvm/llvm-project/pull/148057.diff 1 Files Affected: - (modified) llvm/test/MC/AMDGPU/gfx1250_err.s (+25) ``diff diff --git a/llvm/test/MC/A

[llvm-branch-commits] [llvm] [AMDGPU] Negative gfx1250 v_dual_cndmask_b32 tests. NFC. (PR #148057)

2025-07-10 Thread Stanislav Mekhanoshin via llvm-branch-commits
https://github.com/rampitec ready_for_review https://github.com/llvm/llvm-project/pull/148057 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU] Negative gfx1250 v_dual_cndmask_b32 tests. NFC. (PR #148057)

2025-07-10 Thread Stanislav Mekhanoshin via llvm-branch-commits
rampitec wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/148057?utm_source=stack-comment-downstack-mergeability-warning"

[llvm-branch-commits] [llvm] [AMDGPU] Negative gfx1250 v_dual_cndmask_b32 tests. NFC. (PR #148057)

2025-07-10 Thread Stanislav Mekhanoshin via llvm-branch-commits
https://github.com/rampitec created https://github.com/llvm/llvm-project/pull/148057 None >From 10f072f90c8c575c670a7ad50c8f8531144a27d3 Mon Sep 17 00:00:00 2001 From: Stanislav Mekhanoshin Date: Thu, 10 Jul 2025 13:47:02 -0700 Subject: [PATCH] [AMDGPU] Negative gfx1250 v_dual_cndmask_b32 test

[llvm-branch-commits] [llvm] [AArch64][PAC] Rework discriminator analysis for calls and tail calls (PR #147136)

2025-07-10 Thread Anatoly Trosinenko via llvm-branch-commits
https://github.com/atrosinenko updated https://github.com/llvm/llvm-project/pull/147136 >From 94e686487254869d4a50bbfc7eabcba302f667a4 Mon Sep 17 00:00:00 2001 From: Anatoly Trosinenko Date: Fri, 4 Jul 2025 16:58:11 +0300 Subject: [PATCH 1/3] [AArch64][PAC] Precommit ptrauth-isel.ll tests on ca

[llvm-branch-commits] [llvm] [AArch64][PAC] Rework discriminator analysis for calls and tail calls (PR #147136)

2025-07-10 Thread Anatoly Trosinenko via llvm-branch-commits
https://github.com/atrosinenko updated https://github.com/llvm/llvm-project/pull/147136 >From 94e686487254869d4a50bbfc7eabcba302f667a4 Mon Sep 17 00:00:00 2001 From: Anatoly Trosinenko Date: Fri, 4 Jul 2025 16:58:11 +0300 Subject: [PATCH 1/3] [AArch64][PAC] Precommit ptrauth-isel.ll tests on ca

[llvm-branch-commits] [llvm] [AArch64][PAC] Skip llvm.ptrauth.blend intrinsic in GVN PRE (PR #147815)

2025-07-10 Thread Anatoly Trosinenko via llvm-branch-commits
https://github.com/atrosinenko updated https://github.com/llvm/llvm-project/pull/147815 >From 6419bb442bee2270568d8a1dba551e85f247e2ca Mon Sep 17 00:00:00 2001 From: Anatoly Trosinenko Date: Wed, 9 Jul 2025 21:28:09 +0300 Subject: [PATCH 1/2] [AArch64][PAC] Precommit tests for handling ptrauth.

[llvm-branch-commits] [llvm] [AArch64][PAC] Rework discriminator analysis in AUT and AUTPAC (PR #146489)

2025-07-10 Thread Anatoly Trosinenko via llvm-branch-commits
https://github.com/atrosinenko updated https://github.com/llvm/llvm-project/pull/146489 >From 382565b2343264355b8bd3012c28fe5d250b55de Mon Sep 17 00:00:00 2001 From: Anatoly Trosinenko Date: Sat, 28 Jun 2025 11:09:01 +0300 Subject: [PATCH 1/3] [AArch64][PAC] Rework discriminator analysis in AUT

[llvm-branch-commits] [llvm] [AArch64][PAC] Skip llvm.ptrauth.blend intrinsic in GVN PRE (PR #147815)

2025-07-10 Thread Anatoly Trosinenko via llvm-branch-commits
https://github.com/atrosinenko updated https://github.com/llvm/llvm-project/pull/147815 >From 6419bb442bee2270568d8a1dba551e85f247e2ca Mon Sep 17 00:00:00 2001 From: Anatoly Trosinenko Date: Wed, 9 Jul 2025 21:28:09 +0300 Subject: [PATCH 1/2] [AArch64][PAC] Precommit tests for handling ptrauth.

[llvm-branch-commits] [llvm] [AArch64][PAC] Combine signing with address materialization (PR #130809)

2025-07-10 Thread Anatoly Trosinenko via llvm-branch-commits
https://github.com/atrosinenko updated https://github.com/llvm/llvm-project/pull/130809 >From dd48b1e499cae31f4d1ab2407a90c3fb68e04bea Mon Sep 17 00:00:00 2001 From: Anatoly Trosinenko Date: Thu, 10 Jul 2025 21:37:40 +0300 Subject: [PATCH 1/6] s/fixupBlendComponents/fixupPtrauthDiscriminator/

[llvm-branch-commits] [llvm] [NFC][IR2Vec] Minor refactoring of opcode access in vocabulary (PR #147585)

2025-07-10 Thread Aiden Grossman via llvm-branch-commits
@@ -447,21 +453,18 @@ void IR2VecVocabAnalysis::generateNumMappedVocab() { // Handle Opcodes std::vector NumericOpcodeEmbeddings(Vocabulary::MaxOpcodes, Embedding(Dim, 0)); -#define HANDLE_INST(NUM, OPCODE, CLASS)

[llvm-branch-commits] [llvm] [NFC][IR2Vec] Minor refactoring of opcode access in vocabulary (PR #147585)

2025-07-10 Thread Aiden Grossman via llvm-branch-commits
@@ -297,9 +309,9 @@ StringRef Vocabulary::getVocabKeyForOperandKind(Vocabulary::OperandKind Kind) { OPERAND_KINDS #undef OPERAND_KIND case Vocabulary::OperandKind::MaxOperandKind: -llvm_unreachable("Invalid OperandKind"); +return "UnknownOperand"; } - llvm_un

[llvm-branch-commits] [clang-tools-extra] [PATCH 4/4] [clang] Improve nested name specifier AST representation (PR #148015)

2025-07-10 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-clang-tidy Author: Matheus Izvekov (mizvekov) Changes clang tools extra changes Fourth and last patch in the series, starting at https://github.com/llvm/llvm-project/pull/148014 --- Patch is 141.11 KiB, truncated to 20.00 KiB below, full version: ht

[llvm-branch-commits] [clang-tools-extra] [PATCH 4/4] [clang] Improve nested name specifier AST representation (PR #148015)

2025-07-10 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-clangd Author: Matheus Izvekov (mizvekov) Changes clang tools extra changes Fourth and last patch in the series, starting at https://github.com/llvm/llvm-project/pull/148014 --- Patch is 141.11 KiB, truncated to 20.00 KiB below, full version: https:

[llvm-branch-commits] [llvm] 7a6584e - Revert "[StructurizeCFG] Hoist and simplify zero-cost incoming else phi value…"

2025-07-10 Thread via llvm-branch-commits
Author: Vigneshwar Jayakumar Date: 2025-07-10T12:58:34-05:00 New Revision: 7a6584e9ce8906404cba515e8d7299f49bb2 URL: https://github.com/llvm/llvm-project/commit/7a6584e9ce8906404cba515e8d7299f49bb2 DIFF: https://github.com/llvm/llvm-project/commit/7a6584e9ce8906404cba515e8d7299f49bb

[llvm-branch-commits] [clang] [PATCH 3/4] [clang] Improve nested name specifier AST representation (PR #148014)

2025-07-10 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-clang-modules Author: Matheus Izvekov (mizvekov) Changes clang test changes Second patch in the series, starting at https://github.com/llvm/llvm-project/pull/147835 --- Patch is 561.83 KiB, truncated to 20.00 KiB below, full version: https://github.

[llvm-branch-commits] [clang] [PATCH 3/4] [clang] Improve nested name specifier AST representation (PR #148014)

2025-07-10 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-clang-static-analyzer-1 Author: Matheus Izvekov (mizvekov) Changes clang test changes Second patch in the series, starting at https://github.com/llvm/llvm-project/pull/147835 --- Patch is 561.83 KiB, truncated to 20.00 KiB below, full version: https

[llvm-branch-commits] [clang] [PATCH 3/4] [clang] Improve nested name specifier AST representation (PR #148014)

2025-07-10 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-clang Author: Matheus Izvekov (mizvekov) Changes clang test changes Second patch in the series, starting at https://github.com/llvm/llvm-project/pull/147835 --- Patch is 561.83 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm

[llvm-branch-commits] [clang] [PATCH 3/4] [clang] Improve nested name specifier AST representation (PR #148014)

2025-07-10 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-hlsl Author: Matheus Izvekov (mizvekov) Changes clang test changes Second patch in the series, starting at https://github.com/llvm/llvm-project/pull/147835 --- Patch is 561.83 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/

[llvm-branch-commits] [clang] [PATCH 2/4] [clang] Improve nested name specifier AST representation (PR #148012)

2025-07-10 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-backend-aarch64 Author: Matheus Izvekov (mizvekov) Changes Other changes Second patch in the series starting at https://github.com/llvm/llvm-project/pull/147835 --- Patch is 800.27 KiB, truncated to 20.00 KiB below, full version: https://github.com/

[llvm-branch-commits] [clang] [PATCH 2/4] [clang] Improve nested name specifier AST representation (PR #148012)

2025-07-10 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-clang-codegen Author: Matheus Izvekov (mizvekov) Changes Other changes Second patch in the series starting at https://github.com/llvm/llvm-project/pull/147835 --- Patch is 800.27 KiB, truncated to 20.00 KiB below, full version: https://github.com/ll

[llvm-branch-commits] [clang] [PATCH 2/4] [clang] Improve nested name specifier AST representation (PR #148012)

2025-07-10 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-backend-mips Author: Matheus Izvekov (mizvekov) Changes Other changes Second patch in the series starting at https://github.com/llvm/llvm-project/pull/147835 --- Patch is 800.27 KiB, truncated to 20.00 KiB below, full version: https://github.com/llv

[llvm-branch-commits] [clang] [PATCH 2/4] [clang] Improve nested name specifier AST representation (PR #148012)

2025-07-10 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-backend-powerpc @llvm/pr-subscribers-hlsl @llvm/pr-subscribers-backend-webassembly Author: Matheus Izvekov (mizvekov) Changes Other changes Second patch in the series starting at https://github.com/llvm/llvm-project/pull/147835 --- Patch is 800.27 Ki

[llvm-branch-commits] [clang] [PATCH 2/4] [clang] Improve nested name specifier AST representation (PR #148012)

2025-07-10 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-backend-x86 Author: Matheus Izvekov (mizvekov) Changes Other changes Second patch in the series starting at https://github.com/llvm/llvm-project/pull/147835 --- Patch is 800.27 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm

[llvm-branch-commits] [clang] [PATCH 2/4] [clang] Improve nested name specifier AST representation (PR #148012)

2025-07-10 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-backend-sparc Author: Matheus Izvekov (mizvekov) Changes Other changes Second patch in the series starting at https://github.com/llvm/llvm-project/pull/147835 --- Patch is 800.27 KiB, truncated to 20.00 KiB below, full version: https://github.com/ll

[llvm-branch-commits] [clang] [llvm] [DirectX] Validate registers are bound to root signature (PR #146785)

2025-07-10 Thread Finn Plummer via llvm-branch-commits
@@ -0,0 +1,160 @@ +; RUN: not opt -S -passes='dxil-post-optimization-validation' -mtriple=dxil-pc-shadermodel6.6-compute %s 2>&1 + +; CHECK: error: register cbuffer (space=665, register=3) is not defined in Root Signature +; CHECK: error: register srv (space=0, register=0) is n

[llvm-branch-commits] [clang] [llvm] [DirectX] Validate registers are bound to root signature (PR #146785)

2025-07-10 Thread via llvm-branch-commits
@@ -0,0 +1,160 @@ +; RUN: not opt -S -passes='dxil-post-optimization-validation' -mtriple=dxil-pc-shadermodel6.6-compute %s 2>&1 + +; CHECK: error: register cbuffer (space=665, register=3) is not defined in Root Signature +; CHECK: error: register srv (space=0, register=0) is n

[llvm-branch-commits] [llvm] [NFC][IR2Vec] Minor refactoring of opcode access in vocabulary (PR #147585)

2025-07-10 Thread S. VenkataKeerthy via llvm-branch-commits
@@ -447,21 +453,18 @@ void IR2VecVocabAnalysis::generateNumMappedVocab() { // Handle Opcodes std::vector NumericOpcodeEmbeddings(Vocabulary::MaxOpcodes, Embedding(Dim, 0)); -#define HANDLE_INST(NUM, OPCODE, CLASS)

[llvm-branch-commits] [clang] [llvm] [DirectX] Validate registers are bound to root signature (PR #146785)

2025-07-10 Thread via llvm-branch-commits
https://github.com/joaosaffran updated https://github.com/llvm/llvm-project/pull/146785 >From a49aa19297811e5800ffce364d8d6a225109d93f Mon Sep 17 00:00:00 2001 From: joaosaffran Date: Thu, 26 Jun 2025 19:28:01 + Subject: [PATCH 01/13] refactoring --- .../lib/Target/DirectX/DXContainerGlob

[llvm-branch-commits] [clang] [llvm] [DirectX] Validate registers are bound to root signature (PR #146785)

2025-07-10 Thread Finn Plummer via llvm-branch-commits
@@ -14,10 +14,129 @@ #ifndef LLVM_LIB_TARGET_DIRECTX_DXILPOSTOPTIMIZATIONVALIDATION_H #define LLVM_LIB_TARGET_DIRECTX_DXILPOSTOPTIMIZATIONVALIDATION_H +#include "DXILRootSignature.h" +#include "llvm/ADT/IntervalMap.h" +#include "llvm/Analysis/DXILResource.h" #include "llvm/IR

[llvm-branch-commits] [clang] [llvm] [DirectX] Validate registers are bound to root signature (PR #146785)

2025-07-10 Thread Finn Plummer via llvm-branch-commits
@@ -14,10 +14,129 @@ #ifndef LLVM_LIB_TARGET_DIRECTX_DXILPOSTOPTIMIZATIONVALIDATION_H #define LLVM_LIB_TARGET_DIRECTX_DXILPOSTOPTIMIZATIONVALIDATION_H +#include "DXILRootSignature.h" +#include "llvm/ADT/IntervalMap.h" +#include "llvm/Analysis/DXILResource.h" #include "llvm/IR

[llvm-branch-commits] [clang] [llvm] [DirectX] Validate registers are bound to root signature (PR #146785)

2025-07-10 Thread Finn Plummer via llvm-branch-commits
@@ -0,0 +1,160 @@ +; RUN: not opt -S -passes='dxil-post-optimization-validation' -mtriple=dxil-pc-shadermodel6.6-compute %s 2>&1 + +; CHECK: error: register cbuffer (space=665, register=3) is not defined in Root Signature +; CHECK: error: register srv (space=0, register=0) is n

[llvm-branch-commits] [clang] [llvm] [DirectX] Validate registers are bound to root signature (PR #146785)

2025-07-10 Thread Finn Plummer via llvm-branch-commits
@@ -94,14 +147,83 @@ static void reportErrors(Module &M, DXILResourceMap &DRM, assert(!DRBI.hasImplicitBinding() && "implicit bindings should be handled in " "DXILResourceImplicitBinding pass"); + + if (auto RSD = getRootSignature(RSB

[llvm-branch-commits] [clang] [llvm] [DirectX] Validate registers are bound to root signature (PR #146785)

2025-07-10 Thread Finn Plummer via llvm-branch-commits
@@ -14,10 +14,129 @@ #ifndef LLVM_LIB_TARGET_DIRECTX_DXILPOSTOPTIMIZATIONVALIDATION_H #define LLVM_LIB_TARGET_DIRECTX_DXILPOSTOPTIMIZATIONVALIDATION_H +#include "DXILRootSignature.h" +#include "llvm/ADT/IntervalMap.h" +#include "llvm/Analysis/DXILResource.h" #include "llvm/IR

[llvm-branch-commits] [flang] [flang][OpenMP] Use OmpDirectiveSpecification in DISPATCH (PR #148008)

2025-07-10 Thread Krzysztof Parzyszek via llvm-branch-commits
kparzysz wrote: Stack: - https://github.com/llvm/llvm-project/pull/148005 - https://github.com/llvm/llvm-project/pull/148008 (this PR) https://github.com/llvm/llvm-project/pull/148008 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.

[llvm-branch-commits] [flang] [flang][OpenMP] Use OmpDirectiveSpecification in DISPATCH (PR #148008)

2025-07-10 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-flang-parser @llvm/pr-subscribers-flang-semantics Author: Krzysztof Parzyszek (kparzysz) Changes Dispatch is the last construct (after ATOMIC and ALLOCATORS) where the associated block requires a specific form. Using OmpDirectiveSpecification for the be

[llvm-branch-commits] [flang] [flang][OpenMP] Use OmpDirectiveSpecification in DISPATCH (PR #148008)

2025-07-10 Thread Krzysztof Parzyszek via llvm-branch-commits
https://github.com/kparzysz created https://github.com/llvm/llvm-project/pull/148008 Dispatch is the last construct (after ATOMIC and ALLOCATORS) where the associated block requires a specific form. Using OmpDirectiveSpecification for the begin and the optional end directives will make the str

[llvm-branch-commits] [clang] [llvm] [DirectX] Validate registers are bound to root signature (PR #146785)

2025-07-10 Thread Finn Plummer via llvm-branch-commits
inbelic wrote: Ah okay, didn't realize it follows a different structure here. Thanks for checking https://github.com/llvm/llvm-project/pull/146785 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.o

[llvm-branch-commits] [libcxx] [libc++] Add ABI flag to make __tree nodes more compact (PR #147681)

2025-07-10 Thread via llvm-branch-commits
EricWF wrote: Could you please add some description about why this is an improvement and the validation done test it? https://github.com/llvm/llvm-project/pull/147681 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://list

[llvm-branch-commits] [llvm] [Offload] Add `olGetSymbolInfo[Size]` (PR #147962)

2025-07-10 Thread Joseph Huber via llvm-branch-commits
https://github.com/jhuber6 commented: I would prefer that we do this like HSA does and have `HSA_EXECUTABLE_SYMBOL_INFO_NAME_LENGTH` as a separate info that you can query first and then use as a pointer for `HSA_EXECUTABLE_SYMBOL_INFO_NAME`. https://github.com/llvm/llvm-project/pull/147962 ___

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