https://github.com/arsenm approved this pull request.
https://github.com/llvm/llvm-project/pull/142908
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
Author: Stanislav Mekhanoshin (rampitec)
Changes
---
Full diff: https://github.com/llvm/llvm-project/pull/142911.diff
2 Files Affected:
- (modified) llvm/lib/Target/AMDGPU/SIInstructions.td (+5-6)
- (modified) llvm/test/CodeGen/AMDGP
https://github.com/boomanaiden154 updated
https://github.com/llvm/llvm-project/pull/142696
>From 360e723b51ee201603f72b56859cd7c6d6faec24 Mon Sep 17 00:00:00 2001
From: Aiden Grossman
Date: Thu, 5 Jun 2025 06:51:37 +
Subject: [PATCH] feedback
Created using spr 1.3.4
---
.ci/compute_projec
llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
Author: Stanislav Mekhanoshin (rampitec)
Changes
---
Patch is 52.94 KiB, truncated to 20.00 KiB below, full version:
https://github.com/llvm/llvm-project/pull/142910.diff
1 Files Affected:
- (added) llvm/test/CodeGen/AMDGPU/fneg-fab
https://github.com/rampitec ready_for_review
https://github.com/llvm/llvm-project/pull/142911
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/rampitec ready_for_review
https://github.com/llvm/llvm-project/pull/142910
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
rampitec wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/142910?utm_source=stack-comment-downstack-mergeability-warning"
rampitec wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/142911?utm_source=stack-comment-downstack-mergeability-warning"
https://github.com/rampitec created
https://github.com/llvm/llvm-project/pull/142911
None
>From 44a9017e98eff94456889a528a166d6aabca842d Mon Sep 17 00:00:00 2001
From: Stanislav Mekhanoshin
Date: Wed, 4 Jun 2025 23:49:43 -0700
Subject: [PATCH] [AMDGPU] Patterns for <2 x bfloat> fneg (fabs)
--
https://github.com/rampitec created
https://github.com/llvm/llvm-project/pull/142910
None
>From 321eb42ae21d0d3156fb5ef15f5b336551a20c5b Mon Sep 17 00:00:00 2001
From: Stanislav Mekhanoshin
Date: Wed, 4 Jun 2025 23:46:28 -0700
Subject: [PATCH] [AMDGPU] Baseline fneg-fabs.bf16.ll tests. NFC.
-
@@ -184,24 +199,36 @@ def _compute_project_check_targets(projects_to_test:
Set[str]) -> Set[str]:
return check_targets
-def _compute_runtimes_to_test(projects_to_test: Set[str]) -> Set[str]:
+def _compute_runtimes_to_test(modified_projects: Set[str], platform: str) ->
S
@@ -2627,6 +2629,93 @@ SDValue DAGCombiner::foldSubToAvg(SDNode *N, const SDLoc
&DL) {
return SDValue();
}
+/// Try to fold a pointer arithmetic node.
+/// This needs to be done separately from normal addition, because pointer
+/// addition is not commutative.
+SDValue DAGC
llvmbot wrote:
@llvm/pr-subscribers-llvm-selectiondag
Author: Matt Arsenault (arsenm)
Changes
Work towards making RuntimeLibcalls the centralized location for
all libcall information. This requires changing the encoding from
tracking the ISD::CondCode to using CmpInst::Predicate.
---
Pat
llvmbot wrote:
@llvm/pr-subscribers-backend-arm
Author: Matt Arsenault (arsenm)
Changes
Work towards making RuntimeLibcalls the centralized location for
all libcall information. This requires changing the encoding from
tracking the ISD::CondCode to using CmpInst::Predicate.
---
Patch is
arsenm wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/142905?utm_source=stack-comment-downstack-mergeability-warning";
https://github.com/arsenm ready_for_review
https://github.com/llvm/llvm-project/pull/142905
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/arsenm created
https://github.com/llvm/llvm-project/pull/142905
Work towards making RuntimeLibcalls the centralized location for
all libcall information. This requires changing the encoding from
tracking the ISD::CondCode to using CmpInst::Predicate.
>From 0b1472786bc8e235718
https://github.com/spupyrev approved this pull request.
I don't have objections but maybe wait what others say.
My assumption is that this is really needed to speed up some artificial IRs
which are not (or rarely) observed in practice; for such cases it doesn't
matter too much what this pass p
https://github.com/arsenm approved this pull request.
LGTM. Should handle fabs and fneg (fabs) in follow ups
https://github.com/llvm/llvm-project/pull/142870
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org
thurstond wrote:
> Yeah, it would be better to fix the root cause. But until then, this
> exclusion makes sense IMO. WDYT?
SGTM.
https://github.com/llvm/llvm-project/pull/142876
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
fmayer wrote:
> There's a flag:
>
> ```
> LSAN_FLAG(bool, use_ld_allocations, true,
> "Root set: mark as reachable all allocations made from dynamic "
> "linker. This was the old way to handle dynamic TLS, and will "
> "be removed soon. Do not use this flag.")
> ```
https://github.com/thurstond approved this pull request.
https://github.com/llvm/llvm-project/pull/142876
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
thurstond wrote:
There's a flag:
```
LSAN_FLAG(bool, use_ld_allocations, true,
"Root set: mark as reachable all allocations made from dynamic "
"linker. This was the old way to handle dynamic TLS, and will "
"be removed soon. Do not use this flag.")
```
Obviously we
@@ -3780,25 +3938,49 @@ void AArch64FrameLowering::determineStackHazardSlot(
bool HasFPRCSRs = any_of(SavedRegs.set_bits(), [](unsigned Reg) {
return AArch64::FPR64RegClass.contains(Reg) ||
AArch64::FPR128RegClass.contains(Reg) ||
- AArch64::ZPRRegCla
llvmbot wrote:
@llvm/pr-subscribers-compiler-rt-sanitizer
Author: Florian Mayer (fmayer)
Changes
We have known false positives, and the return value is never
user-managed anyway.
---
Full diff: https://github.com/llvm/llvm-project/pull/142876.diff
2 Files Affected:
- (modified) compil
https://github.com/fmayer ready_for_review
https://github.com/llvm/llvm-project/pull/142876
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/fmayer created
https://github.com/llvm/llvm-project/pull/142876
We have known false positives, and the return value is never
user-managed anyway.
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://list
@@ -1835,6 +1835,11 @@ def : GCNPat <
(S_XOR_B32 SReg_32:$src, (S_MOV_B32 (i32 0x80008000)))
>;
+def : GCNPat <
rampitec wrote:
Done
https://github.com/llvm/llvm-project/pull/142870
___
llvm-branch-commits mailin
https://github.com/rampitec updated
https://github.com/llvm/llvm-project/pull/142870
>From 80608a949bf530cf77faa7dac7dd1a2f9aa357c1 Mon Sep 17 00:00:00 2001
From: Stanislav Mekhanoshin
Date: Wed, 4 Jun 2025 15:37:20 -0700
Subject: [PATCH] [AMDGPU] Make <2 x bfloat> fneg legal
---
llvm/lib/Tar
https://github.com/rampitec updated
https://github.com/llvm/llvm-project/pull/142870
>From 80608a949bf530cf77faa7dac7dd1a2f9aa357c1 Mon Sep 17 00:00:00 2001
From: Stanislav Mekhanoshin
Date: Wed, 4 Jun 2025 15:37:20 -0700
Subject: [PATCH] [AMDGPU] Make <2 x bfloat> fneg legal
---
llvm/lib/Tar
https://github.com/arsenm approved this pull request.
https://github.com/llvm/llvm-project/pull/142778
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
@@ -1835,6 +1835,11 @@ def : GCNPat <
(S_XOR_B32 SReg_32:$src, (S_MOV_B32 (i32 0x80008000)))
>;
+def : GCNPat <
rampitec wrote:
I can. But fabs needs the same, so for now it will be isolated.
https://github.com/llvm/llvm-project/pull/142870
___
@@ -1835,6 +1835,11 @@ def : GCNPat <
(S_XOR_B32 SReg_32:$src, (S_MOV_B32 (i32 0x80008000)))
>;
+def : GCNPat <
arsenm wrote:
Can you do the foreach over the types with the v2f16 case
https://github.com/llvm/llvm-project/pull/142870
__
llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
Author: Stanislav Mekhanoshin (rampitec)
Changes
---
Full diff: https://github.com/llvm/llvm-project/pull/142870.diff
3 Files Affected:
- (modified) llvm/lib/Target/AMDGPU/SIISelLowering.cpp (+1-1)
- (modified) llvm/lib/Target/AMDGPU
https://github.com/rampitec ready_for_review
https://github.com/llvm/llvm-project/pull/142870
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
rampitec wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/142870?utm_source=stack-comment-downstack-mergeability-warning"
https://github.com/rampitec created
https://github.com/llvm/llvm-project/pull/142870
None
>From 27a5d3f0d06f1fc9efe6ed482c5ace394faff88e Mon Sep 17 00:00:00 2001
From: Stanislav Mekhanoshin
Date: Wed, 4 Jun 2025 15:37:20 -0700
Subject: [PATCH] [AMDGPU] Make <2 x bfloat> fneg legal
---
llvm/l
Author: Chelsea Cassanova
Date: 2025-06-04T15:04:00-07:00
New Revision: f0ca2226ce6c04d0585f80ffb08b52908e121e54
URL:
https://github.com/llvm/llvm-project/commit/f0ca2226ce6c04d0585f80ffb08b52908e121e54
DIFF:
https://github.com/llvm/llvm-project/commit/f0ca2226ce6c04d0585f80ffb08b52908e121e54.d
@@ -2478,3 +2479,76 @@ PreservedAnalyses LowerTypeTestsPass::run(Module &M,
return PreservedAnalyses::all();
return PreservedAnalyses::none();
}
+
+PreservedAnalyses SimplifyTypeTestsPass::run(Module &M,
+ ModuleAnalysisManager
@@ -2478,3 +2479,76 @@ PreservedAnalyses LowerTypeTestsPass::run(Module &M,
return PreservedAnalyses::all();
return PreservedAnalyses::none();
}
+
+PreservedAnalyses SimplifyTypeTestsPass::run(Module &M,
+ ModuleAnalysisManager
@@ -2478,3 +2479,76 @@ PreservedAnalyses LowerTypeTestsPass::run(Module &M,
return PreservedAnalyses::all();
return PreservedAnalyses::none();
}
+
+PreservedAnalyses SimplifyTypeTestsPass::run(Module &M,
+ ModuleAnalysisManager
@@ -2478,3 +2479,76 @@ PreservedAnalyses LowerTypeTestsPass::run(Module &M,
return PreservedAnalyses::all();
return PreservedAnalyses::none();
}
+
+PreservedAnalyses SimplifyTypeTestsPass::run(Module &M,
+ ModuleAnalysisManager
@@ -0,0 +1,40 @@
+; RUN: opt -S %s -passes=simplify-type-tests | FileCheck %s
pcc wrote:
Done
https://github.com/llvm/llvm-project/pull/141327
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
htt
https://github.com/pcc updated https://github.com/llvm/llvm-project/pull/141327
>From b36c74c344ed47b99e9bfdc28f9081c3c704d8c7 Mon Sep 17 00:00:00 2001
From: Peter Collingbourne
Date: Tue, 27 May 2025 23:08:59 -0700
Subject: [PATCH] Format
Created using spr 1.3.6-beta.1
---
llvm/lib/Transforms
https://github.com/pcc updated https://github.com/llvm/llvm-project/pull/141327
>From b36c74c344ed47b99e9bfdc28f9081c3c704d8c7 Mon Sep 17 00:00:00 2001
From: Peter Collingbourne
Date: Tue, 27 May 2025 23:08:59 -0700
Subject: [PATCH] Format
Created using spr 1.3.6-beta.1
---
llvm/lib/Transforms
Author: Ian Wood
Date: 2025-06-04T11:06:46-07:00
New Revision: fbd2926fb3c197c6d5dfd9502bff0d2a5e77749a
URL:
https://github.com/llvm/llvm-project/commit/fbd2926fb3c197c6d5dfd9502bff0d2a5e77749a
DIFF:
https://github.com/llvm/llvm-project/commit/fbd2926fb3c197c6d5dfd9502bff0d2a5e77749a.diff
LOG:
https://github.com/momchil-velikov updated
https://github.com/llvm/llvm-project/pull/140572
>From 0d2dca54b02ab76d4b847eed764a5284b74fc5f3 Mon Sep 17 00:00:00 2001
From: Momchil Velikov
Date: Fri, 16 May 2025 15:47:36 +
Subject: [PATCH 1/3] [MLIR] Add
apply_patterns.vector.arm_sve.lower_co
aengelke wrote:
> Adding this threshold check within isTrellis() feels somewhat unnatural. If
> compile time is a concern, could we simply check the size of functions (in
> terms of the number of blocks, as opposed to predecessor only) early in this
> pass and either skip it or switch to a fas
https://github.com/momchil-velikov updated
https://github.com/llvm/llvm-project/pull/140573
>From b5865b5daacc46f53e948bcd6347f4eafc8d2938 Mon Sep 17 00:00:00 2001
From: Momchil Velikov
Date: Mon, 19 May 2025 14:50:45 +
Subject: [PATCH 1/2] [MLIR] Integration tests for lowering vector.contr
https://github.com/momchil-velikov updated
https://github.com/llvm/llvm-project/pull/140573
>From b5865b5daacc46f53e948bcd6347f4eafc8d2938 Mon Sep 17 00:00:00 2001
From: Momchil Velikov
Date: Mon, 19 May 2025 14:50:45 +
Subject: [PATCH 1/2] [MLIR] Integration tests for lowering vector.contr
https://github.com/momchil-velikov updated
https://github.com/llvm/llvm-project/pull/140572
>From 0d2dca54b02ab76d4b847eed764a5284b74fc5f3 Mon Sep 17 00:00:00 2001
From: Momchil Velikov
Date: Fri, 16 May 2025 15:47:36 +
Subject: [PATCH 1/3] [MLIR] Add
apply_patterns.vector.arm_sve.lower_co
boomanaiden154 wrote:
> What I see is that you're reusing the same initial CMake config for
> everything, even though in order to test Clang against libc++ and its tests,
> we need to reconfigure CMake to use just-built Clang, by supplying -D
> CMAKE_C_COMPILER="${INSTALL_DIR}/bin/clang" and -
Author: Snehasish Kumar
Date: 2025-06-04T09:58:18-07:00
New Revision: 2907a0b0a15642c12c92d15a95c01cce191e9cf1
URL:
https://github.com/llvm/llvm-project/commit/2907a0b0a15642c12c92d15a95c01cce191e9cf1
DIFF:
https://github.com/llvm/llvm-project/commit/2907a0b0a15642c12c92d15a95c01cce191e9cf1.dif
https://github.com/tblah approved this pull request.
https://github.com/llvm/llvm-project/pull/141772
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
@@ -0,0 +1,51 @@
+// Tests mapping `local` locality specifier to `private` clauses for non-empty
+// `init` and `dealloc` regions.
+
+// RUN: fir-opt --omp-do-concurrent-conversion="map-to=host" %s | FileCheck %s
+
+func.func @my_allocator() {
+ return
+}
+
+func.func @my_dealloc
@@ -0,0 +1,207 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx942
-disable-separate-const-offset-from-gep=1 -amdgpu-use-sdag-ptradd=1 < %s |
FileCheck --check-prefixes=GFX942,GFX942_PTRADD %s
+; R
@@ -2627,6 +2629,93 @@ SDValue DAGCombiner::foldSubToAvg(SDNode *N, const SDLoc
&DL) {
return SDValue();
}
+/// Try to fold a pointer arithmetic node.
+/// This needs to be done separately from normal addition, because pointer
+/// addition is not commutative.
+SDValue DAGC
kyulee-com wrote:
Adding this threshold check within `isTrellis()` feels somewhat unnatural. If
compile time is a concern, could we simply check the size of functions (in
terms of the number of blocks, as opposed to predecessor only) early in this
pass and either skip it or switch to a faster,
jrtc27 wrote:
> isNullConstant(X), since there are address spaces where 0 is a perfectly
normal value that shouldn't be treated specially,
I don't know if it's important for CHERI to have this or if the IR-level
optimisations render it not so needed. But `NULL + int` is how we represent an
int
@@ -2627,6 +2629,93 @@ SDValue DAGCombiner::foldSubToAvg(SDNode *N, const SDLoc
&DL) {
return SDValue();
}
+/// Try to fold a pointer arithmetic node.
+/// This needs to be done separately from normal addition, because pointer
+/// addition is not commutative.
+SDValue DAGC
quic-garvgupt wrote:
Hi @petrhosek , I understand you had some feedback regarding further splitting
this PR however I responded to all of them. If you do not have any further
comments/feedback, will really appreciate if you can approve this PR. Thanks
again for reviewing all the patches!
http
@@ -14935,6 +14936,52 @@ SDValue SITargetLowering::performAddCombine(SDNode *N,
return SDValue();
}
+SDValue SITargetLowering::performPtrAddCombine(SDNode *N,
+ DAGCombinerInfo &DCI) const {
+ SelectionDAG &DAG = DCI.DAG;
+ EVT
https://github.com/petar-avramovic created
https://github.com/llvm/llvm-project/pull/142790
Add rules for G_AMDGPU_BUFFER_LOAD and implement waterfall lowering
for divergent operands that must be sgpr.
>From 6dd26d44b55420f91a1684e78938ea8b426680cc Mon Sep 17 00:00:00 2001
From: Petar Avramovic
@@ -2627,6 +2629,93 @@ SDValue DAGCombiner::foldSubToAvg(SDNode *N, const SDLoc
&DL) {
return SDValue();
}
+/// Try to fold a pointer arithmetic node.
+/// This needs to be done separately from normal addition, because pointer
+/// addition is not commutative.
+SDValue DAGC
https://github.com/petar-avramovic approved this pull request.
https://github.com/llvm/llvm-project/pull/142604
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/ergawy created
https://github.com/llvm/llvm-project/pull/142795
Extends support for locality specifier to OpenMP translation by adding supprot
for transling localizers that have `init` and `dealloc` regions.
>From 7b331963134cafc47290a45a321e7a62ef8cfce7 Mon Sep 17 00:00:00
@@ -14935,6 +14936,52 @@ SDValue SITargetLowering::performAddCombine(SDNode *N,
return SDValue();
}
+SDValue SITargetLowering::performPtrAddCombine(SDNode *N,
+ DAGCombinerInfo &DCI) const {
+ SelectionDAG &DAG = DCI.DAG;
+ EVT
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/142739
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
@@ -2627,6 +2629,93 @@ SDValue DAGCombiner::foldSubToAvg(SDNode *N, const SDLoc
&DL) {
return SDValue();
}
+/// Try to fold a pointer arithmetic node.
+/// This needs to be done separately from normal addition, because pointer
+/// addition is not commutative.
+SDValue DAGC
@@ -14935,6 +14936,52 @@ SDValue SITargetLowering::performAddCombine(SDNode *N,
return SDValue();
}
+SDValue SITargetLowering::performPtrAddCombine(SDNode *N,
+ DAGCombinerInfo &DCI) const {
+ SelectionDAG &DAG = DCI.DAG;
+ EVT
llvmbot wrote:
@llvm/pr-subscribers-flang-fir-hlfir
Author: Kareem Ergawy (ergawy)
Changes
Extends support for locality specifier to OpenMP translation by adding supprot
for transling localizers that have `init` and `dealloc` regions.
---
Full diff: https://github.com/llvm/llvm-project/p
https://github.com/petar-avramovic ready_for_review
https://github.com/llvm/llvm-project/pull/142790
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
@@ -2627,6 +2629,93 @@ SDValue DAGCombiner::foldSubToAvg(SDNode *N, const SDLoc
&DL) {
return SDValue();
}
+/// Try to fold a pointer arithmetic node.
+/// This needs to be done separately from normal addition, because pointer
+/// addition is not commutative.
+SDValue DAGC
https://github.com/shiltian approved this pull request.
https://github.com/llvm/llvm-project/pull/142777
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/shiltian approved this pull request.
https://github.com/llvm/llvm-project/pull/142778
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
Author: Petar Avramovic (petar-avramovic)
Changes
---
Patch is 22.08 KiB, truncated to 20.00 KiB below, full version:
https://github.com/llvm/llvm-project/pull/142789.diff
3 Files Affected:
- (modified) llvm/lib/Target/AMDGPU/AMDGPU
llvmbot wrote:
@llvm/pr-subscribers-llvm-globalisel
Author: Petar Avramovic (petar-avramovic)
Changes
---
Patch is 22.08 KiB, truncated to 20.00 KiB below, full version:
https://github.com/llvm/llvm-project/pull/142789.diff
3 Files Affected:
- (modified) llvm/lib/Target/AMDGPU/AMDGP
llvmbot wrote:
@llvm/pr-subscribers-llvm-globalisel
Author: Petar Avramovic (petar-avramovic)
Changes
Add rules for G_AMDGPU_BUFFER_LOAD and implement waterfall lowering
for divergent operands that must be sgpr.
---
Patch is 89.10 KiB, truncated to 20.00 KiB below, full version:
https:/
https://github.com/petar-avramovic ready_for_review
https://github.com/llvm/llvm-project/pull/142789
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
petar-avramovic wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/142790?utm_source=stack-comment-downstack-mergeability-w
petar-avramovic wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/142789?utm_source=stack-comment-downstack-mergeability-w
https://github.com/petar-avramovic created
https://github.com/llvm/llvm-project/pull/142789
None
>From fcd0dc75f4674297ef1f5c591ecf6c16314ce3e2 Mon Sep 17 00:00:00 2001
From: Petar Avramovic
Date: Wed, 4 Jun 2025 17:12:16 +0200
Subject: [PATCH] AMDGPU/GlobalISel: Improve readanylane combines i
https://github.com/ergawy updated
https://github.com/llvm/llvm-project/pull/142735
>From 62596cdddcbda71b2a1b306cedd8de238510b105 Mon Sep 17 00:00:00 2001
From: ergawy
Date: Wed, 4 Jun 2025 00:54:37 -0500
Subject: [PATCH] [flang][OpenMP] Map basic `local` specifiers to `private`
clauses
Start
https://github.com/ergawy updated
https://github.com/llvm/llvm-project/pull/142567
>From fd943c277c419105055caf92180f641550b747f3 Mon Sep 17 00:00:00 2001
From: ergawy
Date: Tue, 3 Jun 2025 04:22:20 -0500
Subject: [PATCH] [flang] Enable delayed localization by default for `do
concurrent`
---
@@ -285,6 +285,62 @@ class MapInfoFinalizationPass
return false;
}
+ mlir::omp::MapInfoOp genBoxcharMemberMap(mlir::omp::MapInfoOp op,
bhandarkar-pranav wrote:
Thank you, @agozillon for the review. Yes, it was related to the fact that
`genDescriptorMe
https://github.com/DavidSpickett approved this pull request.
CMake once with the runtimes enabled. Modify the test parameters each time.
Looks good to me.
https://github.com/llvm/llvm-project/pull/142694
___
llvm-branch-commits mailing list
llvm-branc
@@ -3780,25 +3938,49 @@ void AArch64FrameLowering::determineStackHazardSlot(
bool HasFPRCSRs = any_of(SavedRegs.set_bits(), [](unsigned Reg) {
return AArch64::FPR64RegClass.contains(Reg) ||
AArch64::FPR128RegClass.contains(Reg) ||
- AArch64::ZPRRegCla
https://github.com/ritter-x2a ready_for_review
https://github.com/llvm/llvm-project/pull/142778
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
Author: Fabian Ritter (ritter-x2a)
Changes
This is used in a bunch of memory-related transforms.
For SWDEV-516125.
---
Full diff: https://github.com/llvm/llvm-project/pull/142778.diff
2 Files Affected:
- (modified) llvm/lib/CodeGen/Se
https://github.com/ritter-x2a ready_for_review
https://github.com/llvm/llvm-project/pull/142777
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
Author: Fabian Ritter (ritter-x2a)
Changes
Pre-committing test to show improvements in a follow-up PR.
---
Full diff: https://github.com/llvm/llvm-project/pull/142777.diff
1 Files Affected:
- (modified) llvm/test/CodeGen/AMDGPU/ptradd-
ritter-x2a wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/142777?utm_source=stack-comment-downstack-mergeability-warnin
ritter-x2a wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/142778?utm_source=stack-comment-downstack-mergeability-warnin
https://github.com/ritter-x2a created
https://github.com/llvm/llvm-project/pull/142778
This is used in a bunch of memory-related transforms.
For SWDEV-516125.
>From 269663e10674813074ccd9645b431fed0287a405 Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Wed, 4 Jun 2025 09:48:02 -0400
Subje
https://github.com/ritter-x2a created
https://github.com/llvm/llvm-project/pull/142777
Pre-committing test to show improvements in a follow-up PR.
>From 1fe91cbd5d3a3f8baa59eb389936f92b0a49ab6c Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Wed, 4 Jun 2025 09:30:34 -0400
Subject: [PATCH] [
SamTebbs33 wrote:
Really sorry for the spam again, I pushed to the user branch in my fork rather
than the base branch in llvm :facepalm:
https://github.com/llvm/llvm-project/pull/136997
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.l
https://github.com/Pierre-vh updated
https://github.com/llvm/llvm-project/pull/142604
>From 9fd34f632f194a025669b2c2c0f83d19fb48b00c Mon Sep 17 00:00:00 2001
From: pvanhout
Date: Tue, 3 Jun 2025 15:08:06 +0200
Subject: [PATCH 1/3] [AMDGPU] New RegBankSelect: Add rules for `G_PTRTOINT`
and `G_I
https://github.com/Pierre-vh updated
https://github.com/llvm/llvm-project/pull/142601
>From 96669eee5e756faed679480521faafd9f1bad9d1 Mon Sep 17 00:00:00 2001
From: pvanhout
Date: Tue, 3 Jun 2025 13:27:55 +0200
Subject: [PATCH] [AMDGPU] New RegBanKSelect: Add S128 types
---
llvm/lib/Target/AMD
https://github.com/Pierre-vh closed
https://github.com/llvm/llvm-project/pull/142600
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/ritter-x2a ready_for_review
https://github.com/llvm/llvm-project/pull/142738
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
1 - 100 of 138 matches
Mail list logo
