https://github.com/hekota updated
https://github.com/llvm/llvm-project/pull/140937
>From 3f882eb22c0035e5f9dfe7b7324fb44a7a66dea8 Mon Sep 17 00:00:00 2001
From: Helena Kotas
Date: Wed, 21 May 2025 09:18:02 -0700
Subject: [PATCH 1/4] [DirectX] Update resource type names in DXIL metadata to
incl
https://github.com/pcc updated https://github.com/llvm/llvm-project/pull/138366
>From 03060849dc81f83ec48f05995ac8fd6df846c25b Mon Sep 17 00:00:00 2001
From: Peter Collingbourne
Date: Fri, 2 May 2025 16:57:28 -0700
Subject: [PATCH 1/5] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20in?=
=?U
https://github.com/pcc updated https://github.com/llvm/llvm-project/pull/138366
>From e0581c892d07d8bb5518fa412b75b8830f5fb14a Mon Sep 17 00:00:00 2001
From: Peter Collingbourne
Date: Wed, 30 Apr 2025 18:25:54 -0700
Subject: [PATCH] ELF: Add branch-to-branch optimization.
MIME-Version: 1.0
Conte
@@ -0,0 +1,92 @@
+//===- TargetImpl.h -*- C++
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apa
@@ -0,0 +1,92 @@
+//===- TargetImpl.h -*- C++
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apa
@@ -975,6 +977,62 @@ void AArch64::relocateAlloc(InputSectionBase &sec, uint8_t
*buf) const {
}
}
+static std::optional getControlTransferAddend(InputSection &is,
+Relocation &r) {
+ // Identify a control transfer rel
@@ -0,0 +1,92 @@
+//===- TargetImpl.h -*- C++
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apa
https://github.com/pcc edited https://github.com/llvm/llvm-project/pull/138366
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llvmbot wrote:
@wangleiat What do you think about merging this PR to the release branch?
https://github.com/llvm/llvm-project/pull/141193
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https://github.com/llvm/llvm-project/pull/141193
Backport 4e186f20e2f2be2fbf95d9713341a0b6507e707d
Requested by: @heiher
>From bc2bfeef77ad84512cec890f65944e46298dbd6c Mon Sep 17 00:00:00 2001
From: hev
Date: Thu, 22 May 2025 18:50:40 +0800
Subject: [PATCH]
https://github.com/inbelic approved this pull request.
Ha the diff confused me, the diff makes it look like `RootDescriptor` is moving
namespaces but in reality it is all the ones in between that are changing.
https://github.com/llvm/llvm-project/pull/141173
https://github.com/joaosaffran ready_for_review
https://github.com/llvm/llvm-project/pull/138315
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https://github.com/koachan updated
https://github.com/llvm/llvm-project/pull/135718
>From 50422a4d24403ef55bf76ccd710511e8dec6b77d Mon Sep 17 00:00:00 2001
From: Koakuma
Date: Sun, 4 May 2025 09:33:39 +0700
Subject: [PATCH] Rework isFPImmLegal
Created using spr 1.3.5
---
llvm/lib/Target/Sparc
https://github.com/koachan updated
https://github.com/llvm/llvm-project/pull/135718
>From 50422a4d24403ef55bf76ccd710511e8dec6b77d Mon Sep 17 00:00:00 2001
From: Koakuma
Date: Sun, 4 May 2025 09:33:39 +0700
Subject: [PATCH] Rework isFPImmLegal
Created using spr 1.3.5
---
llvm/lib/Target/Sparc
llvmbot wrote:
@llvm/pr-subscribers-mc
Author: None (joaosaffran)
Changes
As requested in a previous PR, this change moves all structs related to RTS0 to
RTS0 namespace.
---
Full diff: https://github.com/llvm/llvm-project/pull/141173.diff
8 Files Affected:
- (modified) llvm/include/ll
llvmbot wrote:
@llvm/pr-subscribers-backend-directx
Author: None (joaosaffran)
Changes
As requested in a previous PR, this change moves all structs related to RTS0 to
RTS0 namespace.
---
Full diff: https://github.com/llvm/llvm-project/pull/141173.diff
8 Files Affected:
- (modified) ll
https://github.com/joaosaffran created
https://github.com/llvm/llvm-project/pull/141173
As requested in a previous PR, this change moves all structs related to RTS0 to
RTS0 namespace.
>From e6553158dbfd718a2e9d76d6209cc3004abf Mon Sep 17 00:00:00 2001
From: joaosaffran
Date: Fri, 23 May 2
Author: Mingming Liu
Date: 2025-05-22T17:22:16-07:00
New Revision: 0c0257e6243af40acf9ba1a86373398a202a533f
URL:
https://github.com/llvm/llvm-project/commit/0c0257e6243af40acf9ba1a86373398a202a533f
DIFF:
https://github.com/llvm/llvm-project/commit/0c0257e6243af40acf9ba1a86373398a202a533f.diff
@@ -1416,6 +1424,12 @@ void CodeGenFunction::EmitForStmt(const ForStmt &S,
if (CGM.shouldEmitConvergenceTokens())
ConvergenceTokenStack.pop_back();
+
+ if (ForBody) {
+// Key Instructions: We want the for closing brace to be step-able on to
+// match existing be
@@ -0,0 +1,37 @@
+// RUN: %clang_cc1 -gkey-instructions -x c++ %s
-debug-info-kind=line-tables-only -emit-llvm -o - \
+// RUN: | FileCheck %s --implicit-check-not atomGroup --implicit-check-not
atomRank
+
+// RUN: %clang_cc1 -gkey-instructions -x c %s
-debug-info-kind=line-tabl
https://github.com/jmorse commented:
Question inline
https://github.com/llvm/llvm-project/pull/134646
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@@ -1362,7 +1363,14 @@ void CodeGenFunction::EmitForStmt(const ForStmt &S,
BoolCondVal = emitCondLikelihoodViaExpectIntrinsic(
BoolCondVal, Stmt::getLikelihood(S.getBody()));
-Builder.CreateCondBr(BoolCondVal, ForBody, ExitBlock, Weights);
+auto *I = Bu
https://github.com/jmorse edited
https://github.com/llvm/llvm-project/pull/134646
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https://github.com/jmorse approved this pull request.
LGTM with nits
https://github.com/llvm/llvm-project/pull/134645
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@@ -0,0 +1,34 @@
+// RUN: %clang_cc1 -gkey-instructions -x c++ -std=c++17 %s
-debug-info-kind=line-tables-only -emit-llvm -o - \
+// RUN: | FileCheck %s --implicit-check-not atomGroup --implicit-check-not
atomRank
+
+// RUN: %clang_cc1 -gkey-instructions -x c %s
-debug-info-kin
@@ -0,0 +1,34 @@
+// RUN: %clang_cc1 -gkey-instructions -x c++ -std=c++17 %s
-debug-info-kind=line-tables-only -emit-llvm -o - \
+// RUN: | FileCheck %s --implicit-check-not atomGroup --implicit-check-not
atomRank
+
+// RUN: %clang_cc1 -gkey-instructions -x c %s
-debug-info-kin
@@ -1130,7 +1130,14 @@ void CodeGenFunction::EmitWhileStmt(const WhileStmt &S,
if (!Weights && CGM.getCodeGenOpts().OptimizationLevel)
BoolCondVal = emitCondLikelihoodViaExpectIntrinsic(
BoolCondVal, Stmt::getLikelihood(S.getBody()));
-Builder.CreateCond
@@ -1242,9 +1242,17 @@ void CodeGenFunction::EmitDoStmt(const DoStmt &S,
// As long as the condition is true, iterate the loop.
if (EmitBoolCondBranch) {
uint64_t BackedgeCount = getProfileCount(S.getBody()) - ParentCount;
-Builder.CreateCondBr(
+auto *I = Build
https://github.com/jmorse approved this pull request.
LGTM with some nits to address.
https://github.com/llvm/llvm-project/pull/134644
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@@ -1242,9 +1242,17 @@ void CodeGenFunction::EmitDoStmt(const DoStmt &S,
// As long as the condition is true, iterate the loop.
if (EmitBoolCondBranch) {
uint64_t BackedgeCount = getProfileCount(S.getBody()) - ParentCount;
-Builder.CreateCondBr(
+auto *I = Build
@@ -0,0 +1,33 @@
+// RUN: %clang_cc1 -gkey-instructions -x c++ -std=c++17 %s
-debug-info-kind=line-tables-only -emit-llvm -o - \
+// RUN: | FileCheck %s --implicit-check-not atomGroup --implicit-check-not
atomRank
+
+// RUN: %clang_cc1 -gkey-instructions -x c %s
-debug-info-kin
@@ -0,0 +1,33 @@
+// RUN: %clang_cc1 -gkey-instructions -x c++ -std=c++17 %s
-debug-info-kind=line-tables-only -emit-llvm -o - \
+// RUN: | FileCheck %s --implicit-check-not atomGroup --implicit-check-not
atomRank
+
+// RUN: %clang_cc1 -gkey-instructions -x c %s
-debug-info-kin
Author: Mingming Liu
Date: 2025-05-22T16:13:38-07:00
New Revision: f2479c4fb9e402e6a845eca455f744ad947d333f
URL:
https://github.com/llvm/llvm-project/commit/f2479c4fb9e402e6a845eca455f744ad947d333f
DIFF:
https://github.com/llvm/llvm-project/commit/f2479c4fb9e402e6a845eca455f744ad947d333f.diff
@@ -0,0 +1,51 @@
+// RUN: %clang_cc1 -gkey-instructions -x c++ -std=c++17 %s
-debug-info-kind=line-tables-only -emit-llvm -o - \
+// RUN: | FileCheck %s --implicit-check-not atomGroup --implicit-check-not
atomRank --check-prefixes=CHECK,CHECK-CXX
+
+// RUN: %clang_cc1 -gkey-inst
https://github.com/jmorse approved this pull request.
LGTM with some test nits, please do disagree with those
https://github.com/llvm/llvm-project/pull/134643
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@@ -0,0 +1,51 @@
+// RUN: %clang_cc1 -gkey-instructions -x c++ -std=c++17 %s
-debug-info-kind=line-tables-only -emit-llvm -o - \
+// RUN: | FileCheck %s --implicit-check-not atomGroup --implicit-check-not
atomRank --check-prefixes=CHECK,CHECK-CXX
+
+// RUN: %clang_cc1 -gkey-inst
https://github.com/jmorse edited
https://github.com/llvm/llvm-project/pull/134643
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https://github.com/jmorse approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/134642
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https://github.com/koachan updated
https://github.com/llvm/llvm-project/pull/135718
>From 50422a4d24403ef55bf76ccd710511e8dec6b77d Mon Sep 17 00:00:00 2001
From: Koakuma
Date: Sun, 4 May 2025 09:33:39 +0700
Subject: [PATCH] Rework isFPImmLegal
Created using spr 1.3.5
---
llvm/lib/Target/Sparc
https://github.com/koachan updated
https://github.com/llvm/llvm-project/pull/135718
>From 50422a4d24403ef55bf76ccd710511e8dec6b77d Mon Sep 17 00:00:00 2001
From: Koakuma
Date: Sun, 4 May 2025 09:33:39 +0700
Subject: [PATCH] Rework isFPImmLegal
Created using spr 1.3.5
---
llvm/lib/Target/Sparc
https://github.com/joaosaffran edited
https://github.com/llvm/llvm-project/pull/138315
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https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/138064
>From 5e56a521547f6e5b309fcfd65f5ad459a03f9abc Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Wed, 30 Apr 2025 08:13:46 -0700
Subject: [PATCH] [clang-doc] Implement setupTemplateValue for
HTMLMustacheGenerator
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/138065
>From 2d48537e7a270c0a1c6f463ef1118a65c40a6f27 Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Tue, 29 Apr 2025 18:31:54 -0700
Subject: [PATCH] [clang-doc] Update serializer for improved template handling
This
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/138063
>From 6880c2fcb571c53ad4e21804b805e82a93077bc1 Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Wed, 30 Apr 2025 08:11:39 -0700
Subject: [PATCH] [clang-doc] Extract Info into JSON values
Split from #133161. This
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/138066
>From e94b231dbca9073da99f616516e21350d1136168 Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Tue, 29 Apr 2025 18:08:03 -0700
Subject: [PATCH] [clang-doc] Update clang-doc tool to enable mustache
templates
Th
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/138063
>From 6880c2fcb571c53ad4e21804b805e82a93077bc1 Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Wed, 30 Apr 2025 08:11:39 -0700
Subject: [PATCH] [clang-doc] Extract Info into JSON values
Split from #133161. This
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/138065
>From 2d48537e7a270c0a1c6f463ef1118a65c40a6f27 Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Tue, 29 Apr 2025 18:31:54 -0700
Subject: [PATCH] [clang-doc] Update serializer for improved template handling
This
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/138067
>From 46795349a75a0815041e7ac3038be9c00ce8ad2b Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Wed, 30 Apr 2025 14:20:40 -0700
Subject: [PATCH] [clang-doc] Track if a type is a template or builtin
Originally pa
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/138064
>From 5e56a521547f6e5b309fcfd65f5ad459a03f9abc Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Wed, 30 Apr 2025 08:13:46 -0700
Subject: [PATCH] [clang-doc] Implement setupTemplateValue for
HTMLMustacheGenerator
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/138066
>From e94b231dbca9073da99f616516e21350d1136168 Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Tue, 29 Apr 2025 18:08:03 -0700
Subject: [PATCH] [clang-doc] Update clang-doc tool to enable mustache
templates
Th
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/138067
>From 46795349a75a0815041e7ac3038be9c00ce8ad2b Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Wed, 30 Apr 2025 14:20:40 -0700
Subject: [PATCH] [clang-doc] Track if a type is a template or builtin
Originally pa
@@ -2869,9 +2870,23 @@ static void setLinkageForGV(llvm::GlobalValue *GV, const
NamedDecl *ND) {
GV->setLinkage(llvm::GlobalValue::ExternalWeakLinkage);
}
+static bool hasExistingGeneralizedTypeMD(llvm::Function *F) {
+ llvm::MDNode *MD = F->getMetadata(llvm::LLVMContext
qinkunbao wrote:
Discussed with @vitalybuka offline. It turns out that Section name can be a
regular expression so the order of Section needs to be tacked (with a vector).
https://github.com/llvm/llvm-project/pull/140821
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https://github.com/llvm/llvm-project/pull/140821
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@@ -2869,9 +2870,23 @@ static void setLinkageForGV(llvm::GlobalValue *GV, const
NamedDecl *ND) {
GV->setLinkage(llvm::GlobalValue::ExternalWeakLinkage);
}
+static bool hasExistingGeneralizedTypeMD(llvm::Function *F) {
+ llvm::MDNode *MD = F->getMetadata(llvm::LLVMContext
@@ -2869,9 +2870,23 @@ static void setLinkageForGV(llvm::GlobalValue *GV, const
NamedDecl *ND) {
GV->setLinkage(llvm::GlobalValue::ExternalWeakLinkage);
}
+static bool hasExistingGeneralizedTypeMD(llvm::Function *F) {
+ llvm::MDNode *MD = F->getMetadata(llvm::LLVMContext
llvmbot wrote:
@llvm/pr-subscribers-hlsl
Author: Finn Plummer (inbelic)
Changes
- Implements serialization of the currently completely defined `RootElement`s,
namely `RootConstants` and `RootFlags`
- Adds unit testing for the serialization methods
Resolves: https://github.com/llvm/llvm-p
https://github.com/inbelic created
https://github.com/llvm/llvm-project/pull/141130
- Implements serialization of the currently completely defined `RootElement`s,
namely `RootConstants` and `RootFlags`
- Adds unit testing for the serialization methods
Resolves: https://github.com/llvm/llvm-pro
arsenm wrote:
### Merge activity
* **May 22, 6:57 PM UTC**: A user started a stack merge that includes this pull
request via
[Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/141048).
https://github.com/llvm/llvm-project/pull/141048
_
qinkunbao wrote:
> Make Glob a vector added in parsing order
Yeah, that is needed.
> Make sections a vector added in parsing order
It is not necessary.
> duplicate entries is not a problem as they should not be common
It is not common but we need to iterate all the sections every time to ensu
https://github.com/rampitec approved this pull request.
https://github.com/llvm/llvm-project/pull/141048
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https://github.com/arsenm approved this pull request.
https://github.com/llvm/llvm-project/pull/132385
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https://github.com/joaosaffran converted_to_draft
https://github.com/llvm/llvm-project/pull/138318
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vitalybuka wrote:
> Hi Vitaly,
>
> Sorry for the late reply. I am thinking about a good solution for #139772 in
> the past two days.
>
> At the moment, I am thinking only the order of `Globs` and `RegExes` (Or
> `Pattern`) matters. The order of `Section`, `Prefix` and `Category` does not
> m
qinkunbao wrote:
Hi Vitaly,
Sorry for the late reply. I am thinking about a good solution for
https://github.com/llvm/llvm-project/pull/139772 in the past two days.
At the moment, I am thinking only the order of `Globs` and `RegExes` (Or
`Pattern`) matters. The order of `Section`, `Prefix` a
alsepkow wrote:
Reviewed but don't have approval permissions yet. LGTM!
https://github.com/llvm/llvm-project/pull/140152
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alsepkow wrote:
Reviewed but don't have approval permissions yet. LGTM!
https://github.com/llvm/llvm-project/pull/140151
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https://github.com/karolherbst updated
https://github.com/llvm/llvm-project/pull/140902
>From 19163b472984a6c3f8df599d95763794c8d9e3ec Mon Sep 17 00:00:00 2001
From: Karol Herbst
Date: Wed, 21 May 2025 15:57:38 +0200
Subject: [PATCH] [libclc] Include isnan implementation for SPIR-V targets
The
https://github.com/arsenm approved this pull request.
https://github.com/llvm/llvm-project/pull/132383
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@@ -292,13 +311,23 @@ void RegBankLegalizeHelper::lower(MachineInstr &MI,
case Ext32To64: {
const RegisterBank *RB = MRI.getRegBank(MI.getOperand(0).getReg());
MachineInstrBuilder Hi;
-
-if (MI.getOpcode() == AMDGPU::G_ZEXT) {
+switch (MI.getOpcode()) {
+c
@@ -1356,6 +1361,7 @@ LValue ComplexExprEmitter::EmitBinAssignLValue(const
BinaryOperator *E,
}
ComplexPairTy ComplexExprEmitter::VisitBinAssign(const BinaryOperator *E) {
+ ApplyAtomGroup Grp(CGF.getDebugInfo());
ComplexPairTy Val;
LValue LV = EmitBinAssignLValue(E, V
@@ -1209,6 +1213,7 @@ LValue ComplexExprEmitter::
EmitCompoundAssignLValue(const CompoundAssignOperator *E,
ComplexPairTy (ComplexExprEmitter::*Func)(const BinOpInfo&),
RValue &Val) {
+ ApplyAtomGroup Grp(CGF.getDebugInfo());
https://github.com/petar-avramovic updated
https://github.com/llvm/llvm-project/pull/132382
>From c08c9f0916b724d733ea47e944137e0a8952d365 Mon Sep 17 00:00:00 2001
From: Petar Avramovic
Date: Thu, 8 May 2025 12:02:27 +0200
Subject: [PATCH] AMDGPU/GlobalISel: add RegBankLegalize rules for AND OR
https://github.com/petar-avramovic updated
https://github.com/llvm/llvm-project/pull/132383
>From ffc85074898c43ceb52c1ca458bc0fd844e84a60 Mon Sep 17 00:00:00 2001
From: Petar Avramovic
Date: Thu, 8 May 2025 12:03:28 +0200
Subject: [PATCH] AMDGPU/GlobalISel: add RegBankLegalize rules for extend
https://github.com/petar-avramovic updated
https://github.com/llvm/llvm-project/pull/132385
>From 0bc832089bf02e0069f441d70728943de51766c6 Mon Sep 17 00:00:00 2001
From: Petar Avramovic
Date: Mon, 14 Apr 2025 16:35:19 +0200
Subject: [PATCH] AMDGPU/GlobalISel: add RegBankLegalize rules for bit s
nikic wrote:
The LLVM 19 release is no longer supported. You'll have to apply this as a
local patch if you want to build and old LLVM 19 with a new libstdc++.
https://github.com/llvm/llvm-project/pull/138550
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https://github.com/petar-avramovic updated
https://github.com/llvm/llvm-project/pull/132383
>From ffc85074898c43ceb52c1ca458bc0fd844e84a60 Mon Sep 17 00:00:00 2001
From: Petar Avramovic
Date: Thu, 8 May 2025 12:03:28 +0200
Subject: [PATCH] AMDGPU/GlobalISel: add RegBankLegalize rules for extend
https://github.com/petar-avramovic updated
https://github.com/llvm/llvm-project/pull/132385
>From 0bc832089bf02e0069f441d70728943de51766c6 Mon Sep 17 00:00:00 2001
From: Petar Avramovic
Date: Mon, 14 Apr 2025 16:35:19 +0200
Subject: [PATCH] AMDGPU/GlobalISel: add RegBankLegalize rules for bit s
https://github.com/nikic closed https://github.com/llvm/llvm-project/pull/138550
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https://github.com/jmorse approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/134637
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OCHyams wrote:
Thanks @jmorse, that should be all nits/questions addressed now.
https://github.com/llvm/llvm-project/pull/134637
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https://github.com/OCHyams updated
https://github.com/llvm/llvm-project/pull/134637
>From 3b4ca1b09a659e575e022109fd8c607c9df3864f Mon Sep 17 00:00:00 2001
From: Orlando Cazalet-Hyams
Date: Wed, 2 Apr 2025 18:01:48 +0100
Subject: [PATCH 01/12] [KeyInstr][Clang] Assignment atom group
This patch
@@ -5849,6 +5852,7 @@ LValue CodeGenFunction::EmitObjCIsaExpr(const ObjCIsaExpr
*E) {
LValue CodeGenFunction::EmitCompoundAssignmentLValue(
const CompoundAssignOperator *E) {
+ ApplyAtomGroup Grp(getDebugInfo());
O
@@ -0,0 +1,41 @@
+
+// RUN: %clang -gkey-instructions -x c++ %s -gmlt -gno-column-info -S
-emit-llvm -o - -ftrivial-auto-var-init=pattern \
+// RUN: | FileCheck %s --implicit-check-not atomGroup --implicit-check-not
atomRank
+
+// RUN: %clang -gkey-instructions -x c %s -gmlt -gn
@@ -5985,6 +5985,15 @@ LValue CodeGenFunction::EmitBinaryOperatorLValue(const
BinaryOperator *E) {
OCHyams wrote:
Yeah that's right - added to the test for better coverage.
https://github.com/llvm/llvm-project/pull/134637
_
@@ -0,0 +1,34 @@
+// RUN: %clang_cc1 -gkey-instructions -x c++ %s
-debug-info-kind=line-tables-only -emit-llvm -o - \
+// RUN: | FileCheck %s --implicit-check-not atomGroup --implicit-check-not
atomRank
+
+// RUN: %clang_cc1 -gkey-instructions -x c %s
-debug-info-kind=line-tabl
@@ -0,0 +1,41 @@
+
+// RUN: %clang -gkey-instructions -x c++ %s -gmlt -gno-column-info -S
-emit-llvm -o - -ftrivial-auto-var-init=pattern \
+// RUN: | FileCheck %s --implicit-check-not atomGroup --implicit-check-not
atomRank
+
+// RUN: %clang -gkey-instructions -x c %s -gmlt -gn
@@ -0,0 +1,48 @@
+// RUN: %clang_cc1 -gkey-instructions -x c++ %s
-debug-info-kind=line-tables-only -emit-llvm -o - \
+// RUN: | FileCheck %s --implicit-check-not atomGroup --implicit-check-not
atomRank
OCHyams wrote:
Done
https://github.com/llvm/llvm-project/
https://github.com/OCHyams updated
https://github.com/llvm/llvm-project/pull/134637
>From 3b4ca1b09a659e575e022109fd8c607c9df3864f Mon Sep 17 00:00:00 2001
From: Orlando Cazalet-Hyams
Date: Wed, 2 Apr 2025 18:01:48 +0100
Subject: [PATCH 01/11] [KeyInstr][Clang] Assignment atom group
This patch
@@ -5985,6 +5985,15 @@ LValue CodeGenFunction::EmitBinaryOperatorLValue(const
BinaryOperator *E) {
assert(E->getOpcode() == BO_Assign && "unexpected binary l-value");
+ // This covers both LHS and RHS expressions, though nested RHS
+ // expressions may get subsequently s
@@ -5985,6 +5985,15 @@ LValue CodeGenFunction::EmitBinaryOperatorLValue(const
BinaryOperator *E) {
assert(E->getOpcode() == BO_Assign && "unexpected binary l-value");
+ // This covers both LHS and RHS expressions, though nested RHS
+ // expressions may get subsequently s
@@ -70,14 +70,29 @@ define i8 @v_ashr_i8_7(i8 %value) {
}
define amdgpu_ps i8 @s_ashr_i8(i8 inreg %value, i8 inreg %amount) {
-; GCN-LABEL: s_ashr_i8:
-; GCN: ; %bb.0:
-; GCN-NEXT:s_sext_i32_i8 s0, s0
-; GCN-NEXT:s_ashr_i32 s0, s0, s1
-; GCN-NEXT:; return to
@@ -133,6 +133,43 @@ void RegBankLegalizeHelper::widenLoad(MachineInstr &MI,
LLT WideTy,
MI.eraseFromParent();
}
+void RegBankLegalizeHelper::lowerVccExtToSel(MachineInstr &MI) {
+ Register Dst = MI.getOperand(0).getReg();
+ LLT Ty = MRI.getType(Dst);
+ Register Src = MI
@@ -985,6 +985,26 @@ inst_pacnbibsppc:
ret
.size inst_pacnbibsppc, .-inst_pacnbibsppc
+// Test that write-back forms of LDRA(A|B) instructions are handled properly.
+
+.globl inst_ldraa_wb
+.type inst_ldraa_wb,@function
+inst_ldraa_wb:
+// CH
@@ -292,13 +311,23 @@ void RegBankLegalizeHelper::lower(MachineInstr &MI,
case Ext32To64: {
const RegisterBank *RB = MRI.getRegBank(MI.getOperand(0).getReg());
MachineInstrBuilder Hi;
-
-if (MI.getOpcode() == AMDGPU::G_ZEXT) {
+switch (MI.getOpcode()) {
+c
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