https://github.com/ilovepi created
https://github.com/llvm/llvm-project/pull/132101
The tests all remove the directory at test start, and it only prevents
inspecting the test artifacts to remove them at the end of the test run.
>From dfc4eaed7e1ae54774a53afcf67d50b074d0eaa7 Mon Sep 17 00:00:00
https://github.com/MaheshRavishankar commented:
I think this is OK, but when we create a new memref, dont we want to verify
that the strides specified dont make it such that accessing using strides goes
out of bounds?
https://github.com/llvm/llvm-project/pull/132547
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dtellenbach wrote:
> @dtellenbach I'm unable to add you as a reviewer/merge this myself; could you
> please take a look at this PR? Thank you!
@j-hui, the LLVM release managers will take it from here and merge this once
they get around to it.
https://github.com/llvm/llvm-project/pull/132506
_
https://github.com/arsenm created
https://github.com/llvm/llvm-project/pull/132864
Fixes #64340
>From e06807edae0421d47567d98995d87429914bbad3 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Tue, 25 Mar 2025 09:39:18 +0700
Subject: [PATCH] llvm-reduce: Do not reduce alloca array sizes to 0
arsenm wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/132864?utm_source=stack-comment-downstack-mergeability-warning";
Amir429206 wrote:
9a7delection
https://github.com/llvm/llvm-project/pull/132857
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Amir429206 wrote:
>
>
>
> @llvm/pr-subscribers-backend-aarch64
>
> Author: Peter Collingbourne (pcc)
>
>
> Changes
>
> On most operating systems, the x16 and x17 registers are not special,
> so there is no benefit, and only a code size cost, to constraining AUT
> to only using them. Theref
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/132733
>From 42c74dd8ab2e5246b8664a29bc4d9db3ac9c75eb Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Mon, 24 Mar 2025 19:52:11 +0700
Subject: [PATCH] llvm-reduce: Fix asserting on TargetExtTypes that do not
suppor
llvmbot wrote:
@llvm/pr-subscribers-backend-aarch64
Author: Peter Collingbourne (pcc)
Changes
On most operating systems, the x16 and x17 registers are not special,
so there is no benefit, and only a code size cost, to constraining AUT
to only using them. Therefore, adjust the backend to on
https://github.com/pcc created https://github.com/llvm/llvm-project/pull/132857
On most operating systems, the x16 and x17 registers are not special,
so there is no benefit, and only a code size cost, to constraining AUT
to only using them. Therefore, adjust the backend to only use the AUT
pseudo
@@ -1425,8 +1453,14 @@ static bool runImpl(Module &M, AnalysisGetter &AG,
TargetMachine &TM,
}
}
- ChangeStatus Change = A.run();
- return Change == ChangeStatus::CHANGED;
+ bool Changed = A.run() == ChangeStatus::CHANGED;
+
+ if (Changed && (LTOPhase == ThinOrFullL
@@ -16,7 +16,7 @@
// C-AARCH64-BAREMETAL: "-cc1" "-triple" "aarch64-unknown-none-elf"
// C-AARCH64-BAREMETAL: "-isysroot"
"{{.*}}Inputs/basic_aarch64_gcc_tree/aarch64-none-elf"
// C-AARCH64-BAREMETAL: "-internal-isystem"
"{{.*}}Inputs/basic_aarch64_gcc_tree/aarch64-none-elf/i
https://github.com/quic-garvgupt ready_for_review
https://github.com/llvm/llvm-project/pull/132808
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https://github.com/quic-garvgupt updated
https://github.com/llvm/llvm-project/pull/132808
>From 91298e97a772f173be23e3a8a1b0bf563644d784 Mon Sep 17 00:00:00 2001
From: Garvit Gupta
Date: Mon, 24 Mar 2025 07:04:59 -0700
Subject: [PATCH] [Driver] Forward sysroot from Driver to linker in BareMetal
https://github.com/quic-garvgupt updated
https://github.com/llvm/llvm-project/pull/121830
>From f84242edcb47b10c1f7f9c4d831ad66395d37bdd Mon Sep 17 00:00:00 2001
From: Garvit Gupta
Date: Mon, 24 Mar 2025 04:58:57 -0700
Subject: [PATCH] [Driver] Add support for crtbegin.o, crtend.o and libgloss
llvmbot wrote:
@llvm/pr-subscribers-hlsl
Author: Helena Kotas (hekota)
Changes
---
Patch is 50.31 KiB, truncated to 20.00 KiB below, full version:
https://github.com/llvm/llvm-project/pull/132453.diff
14 Files Affected:
- (modified) clang/include/clang/Basic/Builtins.td (+12)
- (mo
https://github.com/quic-garvgupt created
https://github.com/llvm/llvm-project/pull/132808
RISCVToolChain object passes `--sysroot` option from clang to gnuld. Adding
the supprt for the same in BareMetal toolchain object.
This is done as a part of the effort to merge RISCVToolchain object into
B
quic-garvgupt wrote:
> I asked for various parts of the linker setup to be moved into a separate PR.
> I understand that each of those changes would cause some churn in tests, but
> I think that's desirable so we understand the effect of each of those changes
> in isolation.
I have split the
https://github.com/petrhosek approved this pull request.
https://github.com/llvm/llvm-project/pull/132807
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@@ -565,26 +637,16 @@ void baremetal::Linker::ConstructJob(Compilation &C,
const JobAction &JA,
}
if (!Args.hasArg(options::OPT_nostdlib, options::OPT_nodefaultlibs)) {
+CmdArgs.push_back("--start-group");
AddRunTimeLibs(TC, D, CmdArgs, Args);
-
CmdArgs.push
@@ -331,6 +333,32 @@ BareMetal::OrderedMultilibs
BareMetal::getOrderedMultilibs() const {
return llvm::reverse(Default);
}
+ToolChain::CXXStdlibType BareMetal::GetDefaultCXXStdlibType() const {
+ if (getTriple().isRISCV() && GCCInstallation.isValid())
+return ToolChain
https://github.com/quic-garvgupt updated
https://github.com/llvm/llvm-project/pull/121831
>From 0f5818919b0cf053fd0deef4e321a25266c6039a Mon Sep 17 00:00:00 2001
From: Garvit Gupta
Date: Mon, 6 Jan 2025 10:05:08 -0800
Subject: [PATCH] [RISCV] Integrate RISCV target in baremetal toolchain object
@@ -540,19 +577,54 @@ void baremetal::Linker::ConstructJob(Compilation &C,
const JobAction &JA,
CmdArgs.push_back(Arch == llvm::Triple::aarch64_be ? "-EB" : "-EL");
}
- if (!Args.hasArg(options::OPT_nostdlib, options::OPT_nostartfiles,
- options::OPT_
@@ -154,6 +154,8 @@ BareMetal::BareMetal(const Driver &D, const llvm::Triple
&Triple,
: Generic_ELF(D, Triple, Args) {
GCCInstallation.init(Triple, Args);
SysRoot = computeSysRoot();
+ UseLD =
+ Args.getLastArgValue(options::OPT_fuse_ld_EQ).equals_insensitive("ld
@@ -524,12 +552,21 @@ void baremetal::Linker::ConstructJob(Compilation &C,
const JobAction &JA,
const llvm::Triple::ArchType Arch = TC.getArch();
const llvm::Triple &Triple = getToolChain().getEffectiveTriple();
- AddLinkerInputs(TC, Inputs, Args, CmdArgs, JA);
+ if (!D
@@ -524,12 +552,21 @@ void baremetal::Linker::ConstructJob(Compilation &C,
const JobAction &JA,
const llvm::Triple::ArchType Arch = TC.getArch();
const llvm::Triple &Triple = getToolChain().getEffectiveTriple();
- AddLinkerInputs(TC, Inputs, Args, CmdArgs, JA);
+ if (!D
@@ -524,12 +552,21 @@ void baremetal::Linker::ConstructJob(Compilation &C,
const JobAction &JA,
const llvm::Triple::ArchType Arch = TC.getArch();
const llvm::Triple &Triple = getToolChain().getEffectiveTriple();
- AddLinkerInputs(TC, Inputs, Args, CmdArgs, JA);
+ if (!D
@@ -540,19 +577,54 @@ void baremetal::Linker::ConstructJob(Compilation &C,
const JobAction &JA,
CmdArgs.push_back(Arch == llvm::Triple::aarch64_be ? "-EB" : "-EL");
}
- if (!Args.hasArg(options::OPT_nostdlib, options::OPT_nostartfiles,
- options::OPT_
https://github.com/quic-garvgupt ready_for_review
https://github.com/llvm/llvm-project/pull/132806
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llvmbot wrote:
@llvm/pr-subscribers-clang
Author: Garvit Gupta (quic-garvgupt)
Changes
Add support for `-u` option to force defined symbols. This option is supported
by both lld and gnuld.
This is done as a part of the effort to merge RISCVToolchain object into
BareMetal toolchain object.
@@ -540,19 +577,54 @@ void baremetal::Linker::ConstructJob(Compilation &C,
const JobAction &JA,
CmdArgs.push_back(Arch == llvm::Triple::aarch64_be ? "-EB" : "-EL");
}
- if (!Args.hasArg(options::OPT_nostdlib, options::OPT_nostartfiles,
- options::OPT_
llvmbot wrote:
@llvm/pr-subscribers-clang
Author: Garvit Gupta (quic-garvgupt)
Changes
The linker job in BareMetal toolchain object will be used by gnuld and lld both.
However, gnuld process the arguments in the order in which they appear on
command
line, whereas there is no such restrict
https://github.com/quic-garvgupt updated
https://github.com/llvm/llvm-project/pull/132807
>From 2c160d5d94b20733d17249d715bbe2d71ec2c091 Mon Sep 17 00:00:00 2001
From: Garvit Gupta
Date: Mon, 24 Mar 2025 06:49:09 -0700
Subject: [PATCH] [Driver] Add option to force udnefined symbols during linki
llvmbot wrote:
@llvm/pr-subscribers-clang
@llvm/pr-subscribers-clang-driver
Author: Garvit Gupta (quic-garvgupt)
Changes
RISCVToolChain object passes `--sysroot` option from clang to gnuld. Adding
the supprt for the same in BareMetal toolchain object.
This is done as a part of the effort
https://github.com/quic-garvgupt ready_for_review
https://github.com/llvm/llvm-project/pull/132807
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https://github.com/aeubanks approved this pull request.
https://github.com/llvm/llvm-project/pull/132733
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quic-garvgupt wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/132808?utm_source=stack-comment-downstack-mergeability-war
quic-garvgupt wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/132807?utm_source=stack-comment-downstack-mergeability-war
quic-garvgupt wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/132806?utm_source=stack-comment-downstack-mergeability-war
https://github.com/quic-garvgupt created
https://github.com/llvm/llvm-project/pull/132807
toolchain object.
Add support for `-u` option to force defined symbols. This option is supported
by both lld and gnuld.
This is done as a part of the effort to merge RISCVToolchain object into
BareMetal t
https://github.com/quic-garvgupt created
https://github.com/llvm/llvm-project/pull/132806
The linker job in BareMetal toolchain object will be used by gnuld and lld both.
However, gnuld process the arguments in the order in which they appear on
command
line, whereas there is no such restriction
https://github.com/boomanaiden154 updated
https://github.com/llvm/llvm-project/pull/132642
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@@ -1425,8 +1453,14 @@ static bool runImpl(Module &M, AnalysisGetter &AG,
TargetMachine &TM,
}
}
- ChangeStatus Change = A.run();
- return Change == ChangeStatus::CHANGED;
+ bool Changed = A.run() == ChangeStatus::CHANGED;
+
+ if (Changed && (LTOPhase == ThinOrFullL
@@ -1160,24 +1138,21 @@ struct AAAMDWavesPerEU : public AAAMDSizeRangeAttribute
{
LLVM_DEBUG(dbgs() << '[' << getName() << "] Call " << Caller->getName()
<< "->" << Func->getName() << '\n');
- const auto *CallerInfo = A.getAAFor(
+ cons
@@ -1336,6 +1311,59 @@ static void addPreloadKernArgHint(Function &F,
TargetMachine &TM) {
}
}
+static void checkWavesPerEU(Module &M, TargetMachine &TM) {
+ for (Function &F : M) {
+const GCNSubtarget &ST = TM.getSubtarget(F);
+
+auto FlatWgrpSizeAttr =
+A
https://github.com/boomanaiden154 updated
https://github.com/llvm/llvm-project/pull/132642
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j-hui wrote:
@dtellenbach I'm unable to add you as a reviewer/merge this myself; could you
please take a look at this PR? Thank you!
https://github.com/llvm/llvm-project/pull/132506
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@@ -1336,6 +1311,59 @@ static void addPreloadKernArgHint(Function &F,
TargetMachine &TM) {
}
}
+static void checkWavesPerEU(Module &M, TargetMachine &TM) {
+ for (Function &F : M) {
+const GCNSubtarget &ST = TM.getSubtarget(F);
+
+auto FlatWgrpSizeAttr =
+A
@@ -899,4 +899,5 @@ void test_set_fpenv(unsigned long env) {
// CHECK-DAG: [[$GRID_RANGE]] = !{i32 1, i32 0}
// CHECK-DAG: [[$WS_RANGE]] = !{i16 1, i16 1025}
-// CHECK-DAG: attributes #[[$NOUNWIND_READONLY]] = { convergent mustprogress
nocallback nofree nounwind willreturn me
@@ -1336,6 +1311,59 @@ static void addPreloadKernArgHint(Function &F,
TargetMachine &TM) {
}
}
+static void checkWavesPerEU(Module &M, TargetMachine &TM) {
arsenm wrote:
Missing comment, and "check"? This modifies attributes
https://github.com/llvm/llvm-
@@ -315,9 +315,9 @@ std::vector
HeuristicResolverImpl::resolveMemberExpr(
std::vector
HeuristicResolverImpl::resolveDeclRefExpr(const DependentScopeDeclRefExpr *RE)
{
- return resolveDependentMember(
- resolveNestedNameSpecifierToType(RE->getQualifier()), RE->getDeclNa
arsenm wrote:
can you rebase to retrigger tests
https://github.com/llvm/llvm-project/pull/131694
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https://github.com/mizvekov updated
https://github.com/llvm/llvm-project/pull/132748
>From c5e50089af34acdb807680cf80576ca03ff1715f Mon Sep 17 00:00:00 2001
From: Matheus Izvekov
Date: Sat, 22 Mar 2025 16:03:04 -0300
Subject: [PATCH 1/4] [clang] Track final substitution for
SubstTemplateTempla
https://github.com/arsenm approved this pull request.
https://github.com/llvm/llvm-project/pull/131694
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@@ -265,14 +265,14 @@ int k9 = f9(V9());
// CHECK-ELIDE-TREE: S9<
// CHECK-ELIDE-TREE: [2 * ...],
// CHECK-ELIDE-TREE: U9<
-// CHECK-ELIDE-TREE: [(no qualifiers) != const] double>>
mizvekov wrote:
Yeah, with the Subst type node, you get differe
@@ -80,7 +80,7 @@ void test2() {
// CHECK-ELIDE-TREE: candidate function not viable: no known conversion from
argument type to parameter type for 1st argument
// CHECK-ELIDE-TREE: I2<
// CHECK-ELIDE-TREE: [double != int],
-// CHECK-ELIDE-TREE: [...],
---
mizvekov wrote:
FYI @ymand @jvoung
https://github.com/llvm/llvm-project/pull/132748
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llvmbot wrote:
@llvm/pr-subscribers-clang
Author: Matheus Izvekov (mizvekov)
Changes
This patch re-adds Subst* nodes for 'Final' substitutions, adding a bit to
these nodes to differentiate them from non-Final ones, which for example helps
track forward progress in resugaring.
This was o
https://github.com/mizvekov created
https://github.com/llvm/llvm-project/pull/132748
This patch re-adds Subst* nodes for 'Final' substitutions, adding a bit to
these nodes to differentiate them from non-Final ones, which for example helps
track forward progress in resugaring.
This was origina
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/132733
>From 7a64f7f65eccb4c69f3a07a4df0aed7bb5c6676c Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Mon, 24 Mar 2025 19:52:11 +0700
Subject: [PATCH] llvm-reduce: Fix asserting on TargetExtTypes that do not
suppor
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/132733
>From 7a64f7f65eccb4c69f3a07a4df0aed7bb5c6676c Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Mon, 24 Mar 2025 19:52:11 +0700
Subject: [PATCH] llvm-reduce: Fix asserting on TargetExtTypes that do not
suppor
arsenm wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/132733?utm_source=stack-comment-downstack-mergeability-warning";
https://github.com/arsenm created
https://github.com/llvm/llvm-project/pull/132733
So far I've been unsuccessful in finding an example where the used constant
value is directly observed in the output. This avoids an assert in an
intermediate
step of value replacement.
>From caedfd891a14f679e1f
https://github.com/mstorsjo edited
https://github.com/llvm/llvm-project/pull/132483
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@@ -489,22 +489,61 @@ RegBankLegalizeRules::RegBankLegalizeRules(const
GCNSubtarget &_ST,
.Uni(B32, {{SgprB32}, {Sgpr32AExtBoolInReg, SgprB32, SgprB32}});
addRulesForGOpcs({G_ANYEXT})
+ .Any({{UniS16, S1}, {{None}, {None}}}) // should be combined away
.Any
Pierre-vh wrote:
> Then isUnneededShiftMask should probably recognize more forms of the pattern
Yes, but with a cast operation it gets tricky. If I add `(zext node:$src0)` to
the PatFrag, it doesn't work because the PatFrag is always used like this:
`(cshl_32 (i32 $src0))`. As `$src0` is infer
@@ -112,21 +117,52 @@ bool
StaticDataSplitter::runOnMachineFunction(MachineFunction &MF) {
return Changed;
}
+const Constant *
+StaticDataSplitter::getConstant(const MachineOperand &Op,
+const TargetMachine &TM,
+
https://github.com/Pierre-vh updated
https://github.com/llvm/llvm-project/pull/131624
>From f4c801437460aef9b9c2e5f49d1e98ec90fadb16 Mon Sep 17 00:00:00 2001
From: pvanhout
Date: Mon, 17 Mar 2025 13:54:59 +0100
Subject: [PATCH 1/3] [GlobalISel] Combine redundant sext_inreg
---
.../llvm/CodeGe
https://github.com/Pierre-vh updated
https://github.com/llvm/llvm-project/pull/131624
>From f4c801437460aef9b9c2e5f49d1e98ec90fadb16 Mon Sep 17 00:00:00 2001
From: pvanhout
Date: Mon, 17 Mar 2025 13:54:59 +0100
Subject: [PATCH 1/3] [GlobalISel] Combine redundant sext_inreg
---
.../llvm/CodeGe
https://github.com/zyn0217 created
https://github.com/llvm/llvm-project/pull/132697
This patch cherry-picks 032ad590d6, 868c89ff0 and 38d71c9bd onto the 20 release
branch.
The first patch addresses recently surfaced CTAD problems, which we believe it
would be nice to roll out the fix quickly,
llvmbot wrote:
@llvm/pr-subscribers-clang
Author: Younan Zhang (zyn0217)
Changes
This patch cherry-picks 032ad590d6, 868c89ff0 and 38d71c9bd onto the 20 release
branch.
The first patch addresses recently surfaced CTAD problems, which we believe it
would be nice to roll out the fix quick
https://github.com/zyn0217 milestoned
https://github.com/llvm/llvm-project/pull/132697
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https://github.com/Pierre-vh updated
https://github.com/llvm/llvm-project/pull/131624
>From d85d13bb1824c716d19179a1fbeca48f4ed37368 Mon Sep 17 00:00:00 2001
From: pvanhout
Date: Mon, 17 Mar 2025 13:54:59 +0100
Subject: [PATCH 1/3] [GlobalISel] Combine redundant sext_inreg
---
.../llvm/CodeGe
https://github.com/SixWeining edited
https://github.com/llvm/llvm-project/pull/123680
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