https://github.com/zyn0217 updated
https://github.com/llvm/llvm-project/pull/124231
>From c36dd4fcac367b206072b36ccc9be4106a22ec3b Mon Sep 17 00:00:00 2001
From: Younan Zhang
Date: Fri, 24 Jan 2025 13:52:37 +0800
Subject: [PATCH 1/2] Implement GCC's CWG 2369 heuristic
---
clang/include/clang/
https://github.com/wangleiat approved this pull request.
LGTM, thanks.
https://github.com/llvm/llvm-project/pull/122262
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-
github-actions[bot] wrote:
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
You can test this locally with the following command:
``bash
git-clang-format --diff 816bda32a6e9c52d93a06e6e19a5ac3fcc66
c36dd4fcac367b206072b36ccc9be4106a22ec3b --e
https://github.com/zyn0217 created
https://github.com/llvm/llvm-project/pull/124231
None
>From c36dd4fcac367b206072b36ccc9be4106a22ec3b Mon Sep 17 00:00:00 2001
From: Younan Zhang
Date: Fri, 24 Jan 2025 13:52:37 +0800
Subject: [PATCH] Implement GCC's CWG 2369 heuristic
---
clang/include/clan
@@ -1395,6 +1398,34 @@ void DAGTypeLegalizer::SplitVectorResult(SDNode *N,
unsigned ResNo) {
SetSplitVector(SDValue(N, ResNo), Lo, Hi);
}
+void DAGTypeLegalizer::SplitVecRes_ATOMIC_LOAD(AtomicSDNode *LD) {
+ SDLoc dl(LD);
+
+ EVT MemoryVT = LD->getMemoryVT();
+ unsigne
@@ -194,8 +194,8 @@ bool BaseIndexOffset::contains(const SelectionDAG &DAG,
int64_t BitSize,
return false;
}
-/// Parses tree in Ptr for base, index, offset addresses.
-static BaseIndexOffset matchLSNode(const LSBaseSDNode *N,
+template
+static BaseIndexOffset matchSDNode(
@@ -5907,6 +5910,82 @@ SDValue
DAGTypeLegalizer::WidenVecRes_INSERT_VECTOR_ELT(SDNode *N) {
N->getOperand(1), N->getOperand(2));
}
+static std::optional findMemType(SelectionDAG &DAG,
+ const TargetLowering &TLI, unsig
@@ -146,11 +149,138 @@ static cl::opt SplitThresholdForRegWithHint(
static RegisterRegAlloc greedyRegAlloc("greedy", "greedy register allocator",
createGreedyRegisterAllocator);
-char RAGreedy::ID = 0;
-char &llvm::RAGreedyID = RAGreedy::
https://github.com/arsenm edited
https://github.com/llvm/llvm-project/pull/119540
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/arsenm commented:
Missing test
https://github.com/llvm/llvm-project/pull/119540
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
@@ -146,11 +149,138 @@ static cl::opt SplitThresholdForRegWithHint(
static RegisterRegAlloc greedyRegAlloc("greedy", "greedy register allocator",
createGreedyRegisterAllocator);
-char RAGreedy::ID = 0;
-char &llvm::RAGreedyID = RAGreedy::
@@ -20,107 +20,172 @@
using namespace llvm;
-static cl::opt Mode(
+static cl::opt Mode(
"regalloc-enable-priority-advisor", cl::Hidden,
-cl::init(RegAllocPriorityAdvisorAnalysis::AdvisorMode::Default),
+cl::init(RegAllocPriorityAdvisorProvider::AdvisorMode::Defau
@@ -150,12 +139,37 @@ class ReleaseModePriorityAdvisorAnalysis final
InteractiveChannelBaseName + ".out",
InteractiveChannelBaseName + ".in");
}
-return std::make_unique(
-MF, RA, &getAnalysis().getSI(), Runner.get());
+assert(SI && "
@@ -357,3 +391,21 @@ DevelopmentModePriorityAdvisor::getPriority(const
LiveInterval &LI) const {
}
#endif // #ifdef LLVM_HAVE_TFLITE
+
+void RegAllocPriorityAdvisorAnalysis::initializeMLProvider(
+RegAllocPriorityAdvisorProvider::AdvisorMode Mode, LLVMContext &Ctx) {
+ i
@@ -20,107 +20,172 @@
using namespace llvm;
-static cl::opt Mode(
+static cl::opt Mode(
"regalloc-enable-priority-advisor", cl::Hidden,
-cl::init(RegAllocPriorityAdvisorAnalysis::AdvisorMode::Default),
+cl::init(RegAllocPriorityAdvisorProvider::AdvisorMode::Defau
@@ -68,20 +70,72 @@ class DummyPriorityAdvisor : public RegAllocPriorityAdvisor
{
unsigned getPriority(const LiveInterval &LI) const override;
};
-class RegAllocPriorityAdvisorAnalysis : public ImmutablePass {
+/// Common provider for getting the priority advisor and loggin
llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
Author: Matt Arsenault (arsenm)
Changes
Set the starting index in the constructor instead of treating
0 as a special case. There should also be no need for bounds
checking in the rewrite.
---
Full diff: https://github.com/llvm/llvm-projec
arsenm wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/124224?utm_source=stack-comment-downstack-mergeability-warning";
https://github.com/arsenm ready_for_review
https://github.com/llvm/llvm-project/pull/124224
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/arsenm created
https://github.com/llvm/llvm-project/pull/124224
Set the starting index in the constructor instead of treating
0 as a special case. There should also be no need for bounds
checking in the rewrite.
>From 5092973f8640de1323594a63338e20aee0a3fe89 Mon Sep 17 00:00:
@@ -89,6 +91,75 @@ class RootSignatureLexer {
}
};
+class RootSignatureParser {
+public:
+ RootSignatureParser(SmallVector &Elements,
+ const SmallVector &Tokens);
+
+ // Iterates over the provided tokens and constructs the in-memory
+ // representati
@@ -0,0 +1,140 @@
+//===- HLSLRootSignature.h - HLSL Root Signature helper objects
---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -148,6 +148,347 @@ bool RootSignatureLexer::LexToken(RootSignatureToken
&Result) {
return false;
}
+// Parser Definitions
+
+RootSignatureParser::RootSignatureParser(
+SmallVector &Elements,
+const SmallVector &Tokens)
+: Elements(Elements) {
+ CurTok = Toke
@@ -0,0 +1,140 @@
+//===- HLSLRootSignature.h - HLSL Root Signature helper objects
---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
https://github.com/inbelic converted_to_draft
https://github.com/llvm/llvm-project/pull/122982
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
inbelic wrote:
Sounds good, and I appreciate the feedback. I will restructure the changes to
be of smaller granularity, which will be better self-contained and directly
include their diagnostics testing.
https://github.com/llvm/llvm-project/pull/122982
_
https://github.com/llvm-beanz commented:
I think that the way you're breaking up this change is sub-optimal from a
review perspective. You've added a lot of code that partially handles parsing a
very complex root signature. The problem is that to complete this
implementation you're going to go
@@ -89,6 +91,72 @@ class RootSignatureLexer {
}
};
+class RootSignatureParser {
+public:
+ RootSignatureParser(SmallVector &Elements,
+ const SmallVector &Tokens);
+
+ // Iterates over the provided tokens and constructs the in-memory
+ // representati
https://github.com/llvm-beanz edited
https://github.com/llvm/llvm-project/pull/122982
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
@@ -0,0 +1,140 @@
+//===- HLSLRootSignature.h - HLSL Root Signature helper objects
---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
https://github.com/artempyanykh edited
https://github.com/llvm/llvm-project/pull/118629
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
Author: Vitaly Buka
Date: 2025-01-23T14:00:43-08:00
New Revision: 396698f10d6c3b5433320a28c314d33c6356ff03
URL:
https://github.com/llvm/llvm-project/commit/396698f10d6c3b5433320a28c314d33c6356ff03
DIFF:
https://github.com/llvm/llvm-project/commit/396698f10d6c3b5433320a28c314d33c6356ff03.diff
L
https://github.com/artempyanykh edited
https://github.com/llvm/llvm-project/pull/118630
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/artempyanykh edited
https://github.com/llvm/llvm-project/pull/118628
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
@@ -148,6 +148,333 @@ bool RootSignatureLexer::LexToken(RootSignatureToken
&Result) {
return false;
}
+// Parser Definitions
+
+RootSignatureParser::RootSignatureParser(
+SmallVector &Elements,
+const SmallVector &Tokens)
+: Elements(Elements) {
+ CurTok = Toke
https://github.com/artempyanykh edited
https://github.com/llvm/llvm-project/pull/118630
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/artempyanykh edited
https://github.com/llvm/llvm-project/pull/118629
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/artempyanykh edited
https://github.com/llvm/llvm-project/pull/118628
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
@@ -1,16 +1,21 @@
// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.3-library %s \
// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s
-// CHECK-DAG: @[[CB:.+]] = external constant { float }
+// RUN: %clang_cc1 -finclude-default-header -triple
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/123995
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
@@ -1109,74 +1109,38 @@ struct AAAMDWavesPerEU : public AAAMDSizeRangeAttribute
{
Function *F = getAssociatedFunction();
auto &InfoCache = static_cast(A.getInfoCache());
-auto TakeRange = [&](std::pair R) {
- auto [Min, Max] = R;
- ConstantRange Range(AP
https://github.com/kiranchandramohan approved this pull request.
LG.
The specification part has to be emitted in module files. But this is not
necessary for producing the TODOs.
https://github.com/llvm/llvm-project/pull/123397
___
llvm-branch-commits
@@ -488,44 +559,34 @@ void DataSharingProcessor::doPrivatize(const
semantics::Symbol *sym,
mlir::OpBuilder::InsertionGuard guard(firOpBuilder);
firOpBuilder.setInsertionPointToStart(moduleOp.getBody());
auto result = firOpBuilder.create(
-symLoc, uniquePriv
@@ -468,15 +505,49 @@ void DataSharingProcessor::doPrivatize(const
semantics::Symbol *sym,
lower::SymbolBox hsb = converter.lookupOneLevelUpSymbol(*sym);
assert(hsb && "Host symbol box not found");
- mlir::Type symType = hsb.getAddr().getType();
+ mlir::Value privVal =
https://github.com/tblah edited https://github.com/llvm/llvm-project/pull/124019
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
@@ -55,15 +55,19 @@ class MapsForPrivatizedSymbolsPass
std::underlying_type_t>(
llvm::omp::OpenMPOffloadMappingFlags::OMP_MAP_TO);
Operation *definingOp = var.getDefiningOp();
-auto declOp = llvm::dyn_cast_or_null(definingOp);
-assert(declOp &&
-
https://github.com/Meinersbur created
https://github.com/llvm/llvm-project/pull/124126
Remove the FLANG_INCLUDE_RUNTIME option which was replaced by
LLVM_ENABLE_RUNTIMES=flang-rt.
This PR does not (yet) include adding `LLVM_ENABLE_RUNTIMES=flang-rt`
implicitly. CMake command lines must be upd
https://github.com/Meinersbur updated
https://github.com/llvm/llvm-project/pull/121782
>From a3037ab5557dcc4a4deb5bb40f801ca9770e3854 Mon Sep 17 00:00:00 2001
From: Michael Kruse
Date: Mon, 6 Jan 2025 16:44:08 +0100
Subject: [PATCH 1/7] Add FLANG_RT_ENABLE_STATIC and FLANG_RT_ENABLE_SHARED
---
https://github.com/Meinersbur updated
https://github.com/llvm/llvm-project/pull/122336
>From dd3ac2e6d8d8d57cd639c25bea3b8d5c99a2f81e Mon Sep 17 00:00:00 2001
From: Michael Kruse
Date: Thu, 9 Jan 2025 15:58:48 +0100
Subject: [PATCH 1/9] Introduce FLANG_INCLUDE_RUNTIME
---
flang/CMakeLists.txt
https://github.com/Meinersbur updated
https://github.com/llvm/llvm-project/pull/122334
>From 74432e2d5d4916f09ee6f60a4d80f3f5a96f1b12 Mon Sep 17 00:00:00 2001
From: Michael Kruse
Date: Thu, 9 Jan 2025 11:31:23 +0100
Subject: [PATCH 1/3] Promote Testing lib
---
.../flang/Testing}/fp-testing.h
https://github.com/Meinersbur updated
https://github.com/llvm/llvm-project/pull/122341
>From c77098f90a5c20bdbce078a0ee3aec1fe53772e3 Mon Sep 17 00:00:00 2001
From: Michael Kruse
Date: Wed, 8 Jan 2025 11:23:02 +0100
Subject: [PATCH 1/5] clang-format to sort headers
---
flang/tools/f18-parse-d
@@ -1,7 +1,14 @@
-// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
-// RUN: dxil-pc-shadermodel6.3-library %s \
+// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.3-library %s \
// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s
@@ -1,16 +1,21 @@
// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.3-library %s \
// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s
-// CHECK-DAG: @[[CB:.+]] = external constant { float }
+// RUN: %clang_cc1 -finclude-default-header -triple
Author: Alexander Kornienko
Date: 2025-01-23T15:40:05+01:00
New Revision: 8573475d5cc1c40679a86d6992a42e5c564a1f23
URL:
https://github.com/llvm/llvm-project/commit/8573475d5cc1c40679a86d6992a42e5c564a1f23
DIFF:
https://github.com/llvm/llvm-project/commit/8573475d5cc1c40679a86d6992a42e5c564a1f23
https://github.com/petar-avramovic updated
https://github.com/llvm/llvm-project/pull/112866
>From d3f746c12fc0e741dfe754f19f394d770a22e84c Mon Sep 17 00:00:00 2001
From: Petar Avramovic
Date: Thu, 31 Oct 2024 14:10:57 +0100
Subject: [PATCH] MachineUniformityAnalysis: Improve isConstantOrUndefVa
https://github.com/petar-avramovic updated
https://github.com/llvm/llvm-project/pull/112866
>From d3f746c12fc0e741dfe754f19f394d770a22e84c Mon Sep 17 00:00:00 2001
From: Petar Avramovic
Date: Thu, 31 Oct 2024 14:10:57 +0100
Subject: [PATCH] MachineUniformityAnalysis: Improve isConstantOrUndefVa
https://github.com/petar-avramovic updated
https://github.com/llvm/llvm-project/pull/112882
>From 0adced1346e563e75aab408c2a948cdbd8c449c3 Mon Sep 17 00:00:00 2001
From: Petar Avramovic
Date: Thu, 23 Jan 2025 13:35:07 +0100
Subject: [PATCH] AMDGPU/GlobalISel: RegBankLegalize rules for load
Add
@@ -488,44 +559,34 @@ void DataSharingProcessor::doPrivatize(const
semantics::Symbol *sym,
mlir::OpBuilder::InsertionGuard guard(firOpBuilder);
firOpBuilder.setInsertionPointToStart(moduleOp.getBody());
auto result = firOpBuilder.create(
-symLoc, uniquePriv
paperchalice wrote:
> Will new codegen support disabling individual passes? Instead of having
> separate arguments like `-disable-machine-sink` we could do
> `-disable-passes=machine-sink`.
I created #76714, but disabling arbitrary passes is not we expect. Maybe we
could add an allowlist as a
@@ -34,52 +34,48 @@ def PrivateClauseOp : OpenMP_Op<"private",
[IsolatedFromAbove, RecipeInterface]>
let description = [{
This operation provides a declaration of how to implement the
[first]privatization of a variable. The dialect users should provide
-informati
optimisan wrote:
Will new codegen support disabling individual passes? Instead of having
separate arguments like `-disable-machine-sink` we could do
`-disable-passes=machine-sink`.
https://github.com/llvm/llvm-project/pull/116913
___
llvm-branch-com
https://github.com/ergawy edited
https://github.com/llvm/llvm-project/pull/124019
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/ergawy commented:
Thanks for the great work @tblah! I partially reviewed since this is a huge PR
(understandably). I will come back and continue reviewing the rest laster.
https://github.com/llvm/llvm-project/pull/124019
___
llvm-br
@@ -96,17 +149,118 @@ fir::ShapeShiftOp
Fortran::lower::omp::getShapeShift(fir::FirOpBuilder &builder,
return shapeShift;
}
+// Initialize box newBox using moldBox. These should both have the same type
and
+// be boxes containing derived types e.g.
+// fir.box>
+// fir.box
@@ -96,17 +149,118 @@ fir::ShapeShiftOp
Fortran::lower::omp::getShapeShift(fir::FirOpBuilder &builder,
return shapeShift;
}
+// Initialize box newBox using moldBox. These should both have the same type
and
+// be boxes containing derived types e.g.
+// fir.box>
+// fir.box
@@ -148,41 +309,113 @@ void
Fortran::lower::omp::populateByRefInitAndCleanupRegions(
builder.setInsertionPointToEnd(initBlock);
mlir::Value boxAlloca = allocatedPrivVarArg;
+
+moldArg = builder.loadIfRef(loc, moldArg);
+getLengthParameters(builder, loc, moldAr
@@ -34,52 +34,48 @@ def PrivateClauseOp : OpenMP_Op<"private",
[IsolatedFromAbove, RecipeInterface]>
let description = [{
This operation provides a declaration of how to implement the
[first]privatization of a variable. The dialect users should provide
-informati
@@ -468,15 +505,49 @@ void DataSharingProcessor::doPrivatize(const
semantics::Symbol *sym,
lower::SymbolBox hsb = converter.lookupOneLevelUpSymbol(*sym);
assert(hsb && "Host symbol box not found");
- mlir::Type symType = hsb.getAddr().getType();
+ mlir::Value privVal =
@@ -55,15 +55,19 @@ class MapsForPrivatizedSymbolsPass
std::underlying_type_t>(
llvm::omp::OpenMPOffloadMappingFlags::OMP_MAP_TO);
Operation *definingOp = var.getDefiningOp();
-auto declOp = llvm::dyn_cast_or_null(definingOp);
-assert(declOp &&
-
@@ -96,17 +149,118 @@ fir::ShapeShiftOp
Fortran::lower::omp::getShapeShift(fir::FirOpBuilder &builder,
return shapeShift;
}
+// Initialize box newBox using moldBox. These should both have the same type
and
+// be boxes containing derived types e.g.
+// fir.box>
+// fir.box
@@ -488,44 +559,34 @@ void DataSharingProcessor::doPrivatize(const
semantics::Symbol *sym,
mlir::OpBuilder::InsertionGuard guard(firOpBuilder);
firOpBuilder.setInsertionPointToStart(moduleOp.getBody());
auto result = firOpBuilder.create(
-symLoc, uniquePriv
https://github.com/ergawy edited
https://github.com/llvm/llvm-project/pull/124019
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
@@ -20,25 +20,42 @@ namespace mlir {
class Region;
} // namespace mlir
+namespace Fortran {
+namespace semantics {
+class Symbol;
+} // namespace semantics
+} // namespace Fortran
+
namespace fir {
class FirOpBuilder;
class ShapeShiftOp;
} // namespace fir
namespace For
@@ -132,7 +168,7 @@ void DataSharingProcessor::cloneSymbol(const
semantics::Symbol *sym) {
if (needInitClone()) {
Fortran::lower::initializeCloneAtRuntime(converter, *sym, symTable);
-callsInitClone = true;
+mightHaveReadMoldArg = true;
ergawy w
@@ -468,15 +505,49 @@ void DataSharingProcessor::doPrivatize(const
semantics::Symbol *sym,
lower::SymbolBox hsb = converter.lookupOneLevelUpSymbol(*sym);
assert(hsb && "Host symbol box not found");
- mlir::Type symType = hsb.getAddr().getType();
+ mlir::Value privVal =
@@ -468,15 +505,49 @@ void DataSharingProcessor::doPrivatize(const
semantics::Symbol *sym,
lower::SymbolBox hsb = converter.lookupOneLevelUpSymbol(*sym);
assert(hsb && "Host symbol box not found");
- mlir::Type symType = hsb.getAddr().getType();
+ mlir::Value privVal =
Author: Michael Buch
Date: 2025-01-23T11:27:19Z
New Revision: bb21661782242f931f3d04eb8fed9be792bd4ef8
URL:
https://github.com/llvm/llvm-project/commit/bb21661782242f931f3d04eb8fed9be792bd4ef8
DIFF:
https://github.com/llvm/llvm-project/commit/bb21661782242f931f3d04eb8fed9be792bd4ef8.diff
LOG:
https://github.com/tblah edited https://github.com/llvm/llvm-project/pull/124019
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
tblah wrote:
I'm not sure why the bot didn't run on this.
@llvm/pr-subscribers-flang-openmp
https://github.com/llvm/llvm-project/pull/124019
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman
https://github.com/tblah edited https://github.com/llvm/llvm-project/pull/124019
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
Author: Michael Buch
Date: 2025-01-23T11:19:37Z
New Revision: 21f62eaa7e28867b02d356a97a4fe134eb5d1f59
URL:
https://github.com/llvm/llvm-project/commit/21f62eaa7e28867b02d356a97a4fe134eb5d1f59
DIFF:
https://github.com/llvm/llvm-project/commit/21f62eaa7e28867b02d356a97a4fe134eb5d1f59.diff
LOG:
llvmbot wrote:
@llvm/pr-subscribers-backend-x86
Author: Matt Arsenault (arsenm)
Changes
This avoids dozens of regressions in a future patch. These
primarily manifested as assertions where we had copies of 64-bit
registers to 32-bit registers.
This is testable in principle with hand writte
arsenm wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/124098?utm_source=stack-comment-downstack-mergeability-warning";
https://github.com/arsenm ready_for_review
https://github.com/llvm/llvm-project/pull/124098
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/arsenm created
https://github.com/llvm/llvm-project/pull/124098
This avoids dozens of regressions in a future patch. These
primarily manifested as assertions where we had copies of 64-bit
registers to 32-bit registers.
This is testable in principle with hand written MIR, but
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/119540
>From 74007cb20fbf8508ca457fc30d693ffa4526b432 Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Wed, 11 Dec 2024 08:51:55 +
Subject: [PATCH 1/5] [CodeGen][NewPM] Port RegAllocGreedy to NPM
---
llvm/includ
https://github.com/optimisan edited
https://github.com/llvm/llvm-project/pull/119540
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
@@ -146,11 +149,137 @@ static cl::opt SplitThresholdForRegWithHint(
static RegisterRegAlloc greedyRegAlloc("greedy", "greedy register allocator",
createGreedyRegisterAllocator);
-char RAGreedy::ID = 0;
-char &llvm::RAGreedyID = RAGreedy::
https://github.com/nhaehnle approved this pull request.
https://github.com/llvm/llvm-project/pull/112866
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/nhaehnle approved this pull request.
https://github.com/llvm/llvm-project/pull/112864
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/118462
>From 0eae465092e76474a7e87f5617748d091a5d7ca3 Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Tue, 3 Dec 2024 10:12:36 +
Subject: [PATCH 1/6] [CodeGen][NewPM] Port RegAllocPriorityAdvisor analysis to
NPM
91 matches
Mail list logo