https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/114010
>From 23c24e06932a6a1c249693e7e837c8f9688b4e66 Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Tue, 29 Oct 2024 07:14:30 +
Subject: [PATCH 1/3] [CodeGen][NewPM] Port RegUsageInfoPropagation pass to NPM
--
github-actions[bot] wrote:
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
You can test this locally with the following command:
``bash
git-clang-format --diff 4025b13066786a370abb33cbc5e14388c7f2d091
9a4813f306f06ab57e9b2568e44056b2daaf59b5 --e
@@ -1644,9 +1652,36 @@ bool PeepholeOptimizer::optimizeRecurrence(MachineInstr
&PHI) {
return Changed;
}
-bool PeepholeOptimizer::runOnMachineFunction(MachineFunction &MF) {
+PreservedAnalyses
+PeepholeOptimizerPass::run(MachineFunction &MF,
+ Mach
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/116326
>From 269e1d821f4a1e14967bde977eff921d769f7fcf Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Mon, 11 Nov 2024 06:40:27 +
Subject: [PATCH] [CodeGen][NewPM] Port PeepholeOptimizer to NPM
---
llvm/include
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@@ -22505,6 +22506,57 @@ Value
*CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID,
return nullptr;
}
+Value *CodeGenFunction::EmitRISCVCpuIs(const CallExpr *E) {
+ const Expr *CPUExpr = E->getArg(0)->IgnoreParenCasts();
+ StringRef CPUStr = cast(CPUExpr)->getStri
optimisan wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/116326?utm_source=stack-comment-downstack-mergeability-warning
https://github.com/optimisan created
https://github.com/llvm/llvm-project/pull/116326
None
>From 9a4813f306f06ab57e9b2568e44056b2daaf59b5 Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Mon, 11 Nov 2024 06:40:27 +
Subject: [PATCH] [CodeGen][NewPM] Port PeepholeOptimizer to NPM
---
llvm/i
https://github.com/wangpc-pp updated
https://github.com/llvm/llvm-project/pull/116231
>From 9686a2c5c5276289e72d9098f497a9f246a1c457 Mon Sep 17 00:00:00 2001
From: Wang Pengcheng
Date: Thu, 14 Nov 2024 22:06:45 +0800
Subject: [PATCH 1/4] Remove stale CHECKs
Created using spr 1.3.6-beta.1
---
https://github.com/wangpc-pp updated
https://github.com/llvm/llvm-project/pull/116231
>From 9686a2c5c5276289e72d9098f497a9f246a1c457 Mon Sep 17 00:00:00 2001
From: Wang Pengcheng
Date: Thu, 14 Nov 2024 22:06:45 +0800
Subject: [PATCH 1/4] Remove stale CHECKs
Created using spr 1.3.6-beta.1
---
https://github.com/wangpc-pp updated
https://github.com/llvm/llvm-project/pull/116231
>From 9686a2c5c5276289e72d9098f497a9f246a1c457 Mon Sep 17 00:00:00 2001
From: Wang Pengcheng
Date: Thu, 14 Nov 2024 22:06:45 +0800
Subject: [PATCH 1/4] Remove stale CHECKs
Created using spr 1.3.6-beta.1
---
https://github.com/wangpc-pp updated
https://github.com/llvm/llvm-project/pull/116231
>From 9686a2c5c5276289e72d9098f497a9f246a1c457 Mon Sep 17 00:00:00 2001
From: Wang Pengcheng
Date: Thu, 14 Nov 2024 22:06:45 +0800
Subject: [PATCH 1/4] Remove stale CHECKs
Created using spr 1.3.6-beta.1
---
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/116311
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https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/114010
>From 72697434c2355f036f2f6abc3c1d33f2aecc8520 Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Tue, 29 Oct 2024 07:14:30 +
Subject: [PATCH 1/3] [CodeGen][NewPM] Port RegUsageInfoPropagation pass to NPM
--
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/113874
>From b691035f465b0cf76d602acb425196c50d39a7f8 Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Mon, 28 Oct 2024 06:22:49 +
Subject: [PATCH 1/5] [CodeGen][NewPM] Port RegUsageInfoCollector pass to NPM
---
optimisan wrote:
I see. I saw this kind of abstraction being used in Attributor so thought I'd
make it available here.
https://github.com/llvm/llvm-project/pull/116166
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:warning:
You can test this locally with the following command:
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git-clang-format --diff d6fb34c24c2d71a149bb4e7c4c9ada0a343d9313
b99a4f40b3d0ea2e13c473853c2dcb9be762ad60 --e
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llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
Author: Matt Arsenault (arsenm)
Changes
---
Full diff: https://github.com/llvm/llvm-project/pull/116309.diff
10 Files Affected:
- (modified) llvm/docs/AMDGPUUsage.rst (+2)
- (modified) llvm/lib/Target/AMDGPU/AMDGPU.td (+2-1)
- (modi
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/116309
>From 54f5e02ed77d9a990fe0cdb223609702879a1780 Mon Sep 17 00:00:00 2001
From: Pravin Jagtap
Date: Wed, 13 Dec 2023 00:27:03 -0500
Subject: [PATCH] AMDGPU: Increase the LDS size to support to 160 KB for gfx950
--
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/116308
>From 1eebc858ad7c42b9ef42adfac1a93aa79d7a80f0 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Wed, 22 May 2024 19:23:24 +0200
Subject: [PATCH] AMDGPU: Add subtarget features for minimum3/maximum3
instructio
https://github.com/arsenm created
https://github.com/llvm/llvm-project/pull/116312
Scheduling info and hazards are wrong and TBD.
>From 81f893e85b60bed1550deefaec946bf93eeba778 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Tue, 21 Nov 2023 10:03:19 +0900
Subject: [PATCH] AMDGPU: Add firs
arsenm wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/116311?utm_source=stack-comment-downstack-mergeability-warning";
arsenm wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/116310?utm_source=stack-comment-downstack-mergeability-warning";
https://github.com/arsenm ready_for_review
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:warning:
You can test this locally with the following command:
``bash
git-clang-format --diff d613fe2730831685287e7d2dfc62ff993d8b7a86
0451d01ded8d5669bf1b46071aeb1703484acac1 --e
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llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
Author: Matt Arsenault (arsenm)
Changes
Scheduling info and hazards are wrong and TBD.
---
Patch is 40.60 KiB, truncated to 20.00 KiB below, full version:
https://github.com/llvm/llvm-project/pull/116312.diff
16 Files Affected:
- (mo
llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
Author: Matt Arsenault (arsenm)
Changes
---
Full diff: https://github.com/llvm/llvm-project/pull/116311.diff
6 Files Affected:
- (modified) llvm/lib/Target/AMDGPU/AMDGPU.td (+11-1)
- (modified) llvm/lib/Target/AMDGPU/AMDGPUSubtarget.
https://github.com/arsenm ready_for_review
https://github.com/llvm/llvm-project/pull/116312
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arsenm wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/116312?utm_source=stack-comment-downstack-mergeability-warning";
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/116310
>From d613fe2730831685287e7d2dfc62ff993d8b7a86 Mon Sep 17 00:00:00 2001
From: Pravin Jagtap
Date: Tue, 16 Jan 2024 09:34:12 -0500
Subject: [PATCH] AMDGPU: Add v_prng_b32 instruction for gfx950
Rand num instructi
https://github.com/arsenm created
https://github.com/llvm/llvm-project/pull/116311
None
>From 0451d01ded8d5669bf1b46071aeb1703484acac1 Mon Sep 17 00:00:00 2001
From: Pravin Jagtap
Date: Wed, 31 Jan 2024 07:27:18 -0500
Subject: [PATCH] AMDGPU: Add V_CVT_F32_BF16 for gfx950
---
llvm/lib/Target
https://github.com/arsenm created
https://github.com/llvm/llvm-project/pull/116309
None
>From 99a8e969dd3b5564a457a1dd6250c2f83caebb1e Mon Sep 17 00:00:00 2001
From: Pravin Jagtap
Date: Wed, 13 Dec 2023 00:27:03 -0500
Subject: [PATCH] AMDGPU: Increase the LDS size to support to 160 KB for gfx9
https://github.com/arsenm ready_for_review
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llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
Author: Matt Arsenault (arsenm)
Changes
Rand num instruction for stochastic rounding.
---
Patch is 21.42 KiB, truncated to 20.00 KiB below, full version:
https://github.com/llvm/llvm-project/pull/116310.diff
16 Files Affected:
- (mod
llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
Author: Matt Arsenault (arsenm)
Changes
gfx12 and gfx950 managed to produce 3 different permutations of this feature.
gfx12 supports f32 and f16, and gfx950 supports f32 and v2f16. This piece only
adds the f32/f16 features gfx12, so it can
arsenm wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/116309?utm_source=stack-comment-downstack-mergeability-warning";
https://github.com/arsenm created
https://github.com/llvm/llvm-project/pull/116310
Rand num instruction for stochastic rounding.
>From e6ee621d1c606dde113429aef1e66e8017ff8e19 Mon Sep 17 00:00:00 2001
From: Pravin Jagtap
Date: Tue, 16 Jan 2024 09:34:12 -0500
Subject: [PATCH] AMDGPU: Add v_prng
arsenm wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/116308?utm_source=stack-comment-downstack-mergeability-warning";
https://github.com/arsenm created
https://github.com/llvm/llvm-project/pull/116308
gfx12 and gfx950 managed to produce 3 different permutations of this feature.
gfx12 supports f32 and f16, and gfx950 supports f32 and v2f16. This piece only
adds the f32/f16 features gfx12, so it can probably go d
Author: Joshua Batista
Date: 2024-11-14T17:08:30-08:00
New Revision: 110599f1ada1999c5c33c41928cec0ea6e438992
URL:
https://github.com/llvm/llvm-project/commit/110599f1ada1999c5c33c41928cec0ea6e438992
DIFF:
https://github.com/llvm/llvm-project/commit/110599f1ada1999c5c33c41928cec0ea6e438992.diff
https://github.com/efriedma-quic approved this pull request.
LGTM
I think this is safe for the branch:
Functionally, this should only affect Arm64EC targets, and this is important
for those targets.
The header modifications only add functions; nothing is removed or modified, so
there shouldn
https://github.com/dpaoliello edited
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llvmbot wrote:
@llvm/pr-subscribers-llvm-ir
Author: Daniel Paoliello (dpaoliello)
Changes
Arm64EC uses a special name mangling mode that adds `$$h` between the symbol
name and its type. In MSVC's name mangling `@` is used to separate the name and
type BUT it is also used for other purpos
https://github.com/dpaoliello edited
https://github.com/llvm/llvm-project/pull/116273
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https://github.com/dpaoliello created
https://github.com/llvm/llvm-project/pull/116273
Arm64EC uses a special name mangling mode that adds `$$h` between the symbol
name and its type. In MSVC's name mangling `@` is used to separate the name and
type BUT it is also used for other purposes, such
AreaZR wrote:
> The cherry-picks here fail to preserve authorship information.
Fixed!
https://github.com/llvm/llvm-project/pull/116097
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>From 3065aa94735784806f305b09f7812858fe16fdd5 Mon Sep 17 00:00:00 2001
From: Yingwei Zheng
Date: Fri, 8 Nov 2024 16:20:04 +0800
Subject: [PATCH] [InstCombine] Drop nsw in negation of select (#112893)
Closes htt
@@ -0,0 +1,112 @@
+; Test MIR printer and parser for type id field in call site info. Test that
+; it works well with/without --emit-call-site-info.
ilovepi wrote:
For informational/comment lines, its a common practice lots of the project to
prefix w/ extra comm
@@ -0,0 +1,39 @@
+; Tests that call site type ids can be extracted and set from type operand
+; bundles.
+
+; Verify the exact typeId value to ensure it is not garbage but the value
+; computed as the type id from the type operand bundle.
+; RUN: llc --call-graph-section -mtriple
@@ -0,0 +1,39 @@
+; Tests that call site type ids can be extracted and set from type operand
+; bundles.
+
+; Verify the exact typeId value to ensure it is not garbage but the value
+; computed as the type id from the type operand bundle.
+; RUN: llc --call-graph-section -mtriple
@@ -0,0 +1,39 @@
+; Tests that call site type ids can be extracted and set from type operand
+; bundles.
+
+; Verify the exact typeId value to ensure it is not garbage but the value
+; computed as the type id from the type operand bundle.
+; RUN: llc --call-graph-section -mtriple
@@ -0,0 +1,39 @@
+; Tests that call site type ids can be extracted and set from type operand
+; bundles.
+
+; Verify the exact typeId value to ensure it is not garbage but the value
+; computed as the type id from the type operand bundle.
+; RUN: llc --call-graph-section -mtriple
https://github.com/aeubanks requested changes to this pull request.
I'd really rather not do this. With the new pass manager transition for the
optimization pipeline, it was fine to not have this abstraction, and other
similar abstractions between the legacy/new pass manager (CallGraphUpdater)
@@ -22505,6 +22506,57 @@ Value
*CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID,
return nullptr;
}
+Value *CodeGenFunction::EmitRISCVCpuIs(const CallExpr *E) {
+ const Expr *CPUExpr = E->getArg(0)->IgnoreParenCasts();
+ StringRef CPUStr = cast(CPUExpr)->getStri
@@ -488,6 +490,38 @@ class LLVM_EXTERNAL_VISIBILITY MachineFunction {
/// Callee type id.
ConstantInt *TypeId = nullptr;
+
+CallSiteInfo() {}
+
+/// Extracts the numeric type id from the CallBase's type operand bundle,
+/// and sets TypeId. This is used as
dwblaikie wrote:
please separate out the APInt changes and include unit tests in a change just
to llvm separate from/before the mlir side of this
https://github.com/llvm/llvm-project/pull/116176
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Meinersbur wrote:
I am glad we are now discussing the CMake code. It seems that all reviewers are
fine with the changed file locations. This would allow me to rebase the PR
stack to main. This would resolve the `flang-new` issue and applying the patch
easier.
@jhuber6 Did you consider using G
@@ -508,3 +508,11 @@ bool RISCVTargetInfo::validateGlobalRegisterVariable(
}
return false;
}
+
+bool RISCVTargetInfo::validateCpuIs(StringRef CPUName) const {
+ llvm::Triple Triple = getTriple();
topperc wrote:
Unused variable in release build
https://gi
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https://github.com/llvm/llvm-project/pull/110217
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@@ -155,162 +50,131 @@ set(sources
product.cpp
pseudo-unit.cpp
ragged.cpp
- random.cpp
- reduce.cpp
- reduction.cpp
stat.cpp
- stop.cpp
sum.cpp
support.cpp
- temporary-stack.cpp
terminator.cpp
- time-intrinsic.cpp
tools.cpp
transformational.cpp
https://github.com/Meinersbur edited
https://github.com/llvm/llvm-project/pull/110217
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@@ -0,0 +1,210 @@
+#===-- CMakeLists.txt
--===#
+#
+# Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+# See https://llvm.org/LICENSE.txt for license information.
+# SPDX-License-Identifier: Apache-
@@ -1,55 +1,131 @@
-// RUN: %clang_cc1 -triple x86_64-pc-linux-gnu -emit-llvm < %s| FileCheck %s
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --version 5
+// RUN: %clang_cc1 -triple x86_64-pc-linux-gnu -emit-llvm %s -o - | FileCheck
%s
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/116166
>From 775f978efbc8ca5c9fa20778a4a807119601bffd Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Thu, 14 Nov 2024 05:57:01 +
Subject: [PATCH 1/2] [NewPM] Introduce MFAnalysisGetter for a common analysis
get
https://github.com/wangpc-pp updated
https://github.com/llvm/llvm-project/pull/116231
>From 9686a2c5c5276289e72d9098f497a9f246a1c457 Mon Sep 17 00:00:00 2001
From: Wang Pengcheng
Date: Thu, 14 Nov 2024 22:06:45 +0800
Subject: [PATCH 1/2] Remove stale CHECKs
Created using spr 1.3.6-beta.1
---
https://github.com/wangpc-pp updated
https://github.com/llvm/llvm-project/pull/116231
>From 9686a2c5c5276289e72d9098f497a9f246a1c457 Mon Sep 17 00:00:00 2001
From: Wang Pengcheng
Date: Thu, 14 Nov 2024 22:06:45 +0800
Subject: [PATCH 1/4] Remove stale CHECKs
Created using spr 1.3.6-beta.1
---
https://github.com/wangpc-pp updated
https://github.com/llvm/llvm-project/pull/116231
>From 9686a2c5c5276289e72d9098f497a9f246a1c457 Mon Sep 17 00:00:00 2001
From: Wang Pengcheng
Date: Thu, 14 Nov 2024 22:06:45 +0800
Subject: [PATCH 1/3] Remove stale CHECKs
Created using spr 1.3.6-beta.1
---
https://github.com/wangpc-pp updated
https://github.com/llvm/llvm-project/pull/116231
>From 9686a2c5c5276289e72d9098f497a9f246a1c457 Mon Sep 17 00:00:00 2001
From: Wang Pengcheng
Date: Thu, 14 Nov 2024 22:06:45 +0800
Subject: [PATCH] Remove stale CHECKs
Created using spr 1.3.6-beta.1
---
clan
llvmbot wrote:
@llvm/pr-subscribers-clang
Author: Pengcheng Wang (wangpc-pp)
Changes
We have defined `__riscv_cpu_model` variable in #101449. It contains
`mvendorid`, `marchid` and `mimpid` fields which are read via system
call `sys_riscv_hwprobe`.
We can support `__builtin_cpu_is` via co
llvmbot wrote:
@llvm/pr-subscribers-clang-codegen
Author: Pengcheng Wang (wangpc-pp)
Changes
We have defined `__riscv_cpu_model` variable in #101449. It contains
`mvendorid`, `marchid` and `mimpid` fields which are read via system
call `sys_riscv_hwprobe`.
We can support `__builtin_cpu_is
llvmbot wrote:
@llvm/pr-subscribers-backend-risc-v
Author: Pengcheng Wang (wangpc-pp)
Changes
We have defined `__riscv_cpu_model` variable in #101449. It contains
`mvendorid`, `marchid` and `mimpid` fields which are read via system
call `sys_riscv_hwprobe`.
We can support `__builtin_cpu_i
optimisan wrote:
### Merge activity
* **Nov 14, 8:37 AM EST**: A user started a stack merge that includes this pull
request via
[Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/113874).
https://github.com/llvm/llvm-project/pull/113874
__
https://github.com/wangpc-pp created
https://github.com/llvm/llvm-project/pull/116231
We have defined `__riscv_cpu_model` variable in #101449. It contains
`mvendorid`, `marchid` and `mimpid` fields which are read via system
call `sys_riscv_hwprobe`.
We can support `__builtin_cpu_is` via compari
Author: Akshat Oke
Date: 2024-11-14T19:30:05+05:30
New Revision: 0cbf819ea5cba324f25edf135eb3ca00b9aa8d5e
URL:
https://github.com/llvm/llvm-project/commit/0cbf819ea5cba324f25edf135eb3ca00b9aa8d5e
DIFF:
https://github.com/llvm/llvm-project/commit/0cbf819ea5cba324f25edf135eb3ca00b9aa8d5e.diff
LO
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/114010
>From f1fe912ed9e2adb02f39b89520f7aeaeff9200bf Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Tue, 29 Oct 2024 07:14:30 +
Subject: [PATCH 1/3] [CodeGen][NewPM] Port RegUsageInfoPropagation pass to NPM
--
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/113874
>From 0acfa8ac87af3ce10c958b0bd4428e1ccd8231a7 Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Mon, 28 Oct 2024 06:22:49 +
Subject: [PATCH 1/5] [CodeGen][NewPM] Port RegUsageInfoCollector pass to NPM
---
optimisan wrote:
### Merge activity
* **Nov 14, 8:37 AM EST**: A user started a stack merge that includes this pull
request via
[Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/114010).
https://github.com/llvm/llvm-project/pull/114010
__
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/115434
>From 790a6d06d2a84f7f5cc1d5fb043141515a7ca012 Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Wed, 30 Oct 2024 04:56:54 +
Subject: [PATCH 1/3] [CodeGen][NewPM] Port MachineSink to NPM
Targets can set the
https://github.com/skatrak created
https://github.com/llvm/llvm-project/pull/116219
This patch adds support for lowering OpenMP clauses and expressions attached to
constructs nested inside of a target region that need to be evaluated in the
host device. This is done through the use of the `Ope
skatrak wrote:
PR stack:
- #116048
- #116049
- #116050
- #116051
- #116052
- #116219
https://github.com/llvm/llvm-project/pull/116219
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llvmbot wrote:
@llvm/pr-subscribers-flang-fir-hlfir
@llvm/pr-subscribers-mlir
Author: Sergio Afonso (skatrak)
Changes
This patch adds support for lowering OpenMP clauses and expressions attached to
constructs nested inside of a target region that need to be evaluated in the
host device.
optimisan wrote:
Updated MachineSink to use this https://github.com/llvm/llvm-project/pull/115434
https://github.com/llvm/llvm-project/pull/116166
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https://github.com/tblah approved this pull request.
Looks great to me and this passes the testsuites I have available. Thanks again
for all of your work on this.
https://github.com/llvm/llvm-project/pull/101446
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ll
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/116166
>From e666834aea9e4c0eecd937de3a58baae93fec68a Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Thu, 14 Nov 2024 05:57:01 +
Subject: [PATCH 1/2] [NewPM] Introduce MFAnalysisGetter for a common analysis
get
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/115434
>From 8768c042fe8495c6de844b04a2c4f479fbcf5a14 Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Wed, 30 Oct 2024 04:56:54 +
Subject: [PATCH 1/3] [CodeGen][NewPM] Port MachineSink to NPM
Targets can set the
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/114745
>From 3e095aec1de85eafebf9825b10fa2d83615e7be2 Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Wed, 30 Oct 2024 04:59:30 +
Subject: [PATCH 1/2] [CodeGen][NewPM] Port MachineCycleInfo to NPM
---
.../llvm/
https://github.com/tblah approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/104748
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