[llvm-branch-commits] [clang] release/19.x: [clang-format] Don't insert a space between :: and * (#105043) (PR #105773)

https://github.com/owenca approved this pull request. https://github.com/llvm/llvm-project/pull/105773 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] release/19.x: [clang-format] Don't insert a space between :: and * (#105043) (PR #105773)

llvmbot wrote: @llvm/pr-subscribers-clang-format Author: None (llvmbot) Changes Backport 714033a6bf3a81b1350f969ddd83bcd9fbb703e8 Requested by: @owenca --- Full diff: https://github.com/llvm/llvm-project/pull/105773.diff 3 Files Affected: - (modified) clang/lib/Format/TokenAnnotator.c

[llvm-branch-commits] [clang] release/19.x: [clang-format] Don't insert a space between :: and * (#105043) (PR #105773)

llvmbot wrote: @owenca What do you think about merging this PR to the release branch? https://github.com/llvm/llvm-project/pull/105773 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listin

[llvm-branch-commits] [clang] release/19.x: [clang-format] Don't insert a space between :: and * (#105043) (PR #105773)

https://github.com/llvmbot created https://github.com/llvm/llvm-project/pull/105773 Backport 714033a6bf3a81b1350f969ddd83bcd9fbb703e8 Requested by: @owenca >From d23c3544162ed0d20d3e31f01d5ca7b23180eb3f Mon Sep 17 00:00:00 2001 From: Owen Pan Date: Thu, 22 Aug 2024 20:02:48 -0700 Subject: [PA

[llvm-branch-commits] [clang] release/19.x: [clang-format] Don't insert a space between :: and * (#105043) (PR #105773)

https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/105773 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] b051ebc - Revert "Revert "[Vectorize] Fix warnings" (#105771)"

Author: Vitaly Buka Date: 2024-08-22T20:03:14-07:00 New Revision: b051ebc7efb69953c6118b7f5615cc22e9636b7a URL: https://github.com/llvm/llvm-project/commit/b051ebc7efb69953c6118b7f5615cc22e9636b7a DIFF: https://github.com/llvm/llvm-project/commit/b051ebc7efb69953c6118b7f5615cc22e9636b7a.diff L

[llvm-branch-commits] [clang] 04376ec - Revert "Revert "[clang] Merge lifetimebound and GSL code paths for lifetime a…"

Author: Vitaly Buka Date: 2024-08-22T16:38:31-07:00 New Revision: 04376ece0618912d85a9a52a5f00f3eb3aa63c30 URL: https://github.com/llvm/llvm-project/commit/04376ece0618912d85a9a52a5f00f3eb3aa63c30 DIFF: https://github.com/llvm/llvm-project/commit/04376ece0618912d85a9a52a5f00f3eb3aa63c30.diff L

[llvm-branch-commits] [mlir] [mlir][sparse] unify block arguments order between iterate/coiterate operations. (PR #105567)

https://github.com/PeimingLiu edited https://github.com/llvm/llvm-project/pull/105567 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [mlir] [mlir][sparse] refactoring sparse_tensor.iterate lowering pattern implementation. (PR #105566)

https://github.com/PeimingLiu edited https://github.com/llvm/llvm-project/pull/105566 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [DataLayout][LangRef] Split non-integral and unstable pointer properties (PR #105735)

https://github.com/arichardson updated https://github.com/llvm/llvm-project/pull/105735 >From e4bd1181d160b8728e7d4158417a83e183bd1709 Mon Sep 17 00:00:00 2001 From: Alex Richardson Date: Thu, 22 Aug 2024 14:36:04 -0700 Subject: [PATCH] fix indentation in langref Created using spr 1.3.6-beta.1

[llvm-branch-commits] [DataLayout][LangRef] Split non-integral and unstable pointer properties (PR #105735)

https://github.com/arichardson converted_to_draft https://github.com/llvm/llvm-project/pull/105735 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [DataLayout][LangRef] Split non-integral and unstable pointer properties (PR #105735)

llvmbot wrote: @llvm/pr-subscribers-llvm-ir Author: Alexander Richardson (arichardson) Changes Theses are finer-grained versions of isNonIntegralAddressSpace() and isNonIntegralPointerType() where the current semantics prohibit introduction of both ptrtoint and inttoptr instructions. These

[llvm-branch-commits] [DataLayout][LangRef] Split non-integral and unstable pointer properties (PR #105735)

https://github.com/arichardson created https://github.com/llvm/llvm-project/pull/105735 Theses are finer-grained versions of isNonIntegralAddressSpace() and isNonIntegralPointerType() where the current semantics prohibit introduction of both ptrtoint and inttoptr instructions. These semantics ar

[llvm-branch-commits] [llvm] AArch64: Use consistent atomicrmw expansion for FP operations (PR #103702)

@@ -27056,21 +27056,35 @@ AArch64TargetLowering::shouldExpandAtomicLoadInIR(LoadInst *LI) const { : AtomicExpansionKind::LLSC; } +// Return true if the atomic operation expansion will lower to use a library +// call, and is thus ineligible to use

[llvm-branch-commits] [llvm] AArch64: Use consistent atomicrmw expansion for FP operations (PR #103702)

@@ -27056,21 +27056,35 @@ AArch64TargetLowering::shouldExpandAtomicLoadInIR(LoadInst *LI) const { : AtomicExpansionKind::LLSC; } +// Return true if the atomic operation expansion will lower to use a library +// call, and is thus ineligible to use

[llvm-branch-commits] [llvm] [MC][NFC] Reduce Address2ProbesMap size (PR #102904)

https://github.com/wlei-llvm approved this pull request. https://github.com/llvm/llvm-project/pull/102904 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [MC][NFC] Use vector for GUIDProbeFunctionMap (PR #102905)

https://github.com/wlei-llvm approved this pull request. LGTM, thanks. https://github.com/llvm/llvm-project/pull/102905 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-

[llvm-branch-commits] [llvm] [MC][NFC] Statically allocate storage for decoded pseudo probes and function records (PR #102789)

https://github.com/wlei-llvm approved this pull request. LGTM, thanks. https://github.com/llvm/llvm-project/pull/102789 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-

[llvm-branch-commits] [llvm] [LLVM][Coroutines] Create `.noalloc` variant of switch ABI coroutine ramp functions during CoroSplit (PR #99283)

https://github.com/yuxuanchen1997 edited https://github.com/llvm/llvm-project/pull/99283 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AArch64: Use consistent atomicrmw expansion for FP operations (PR #103702)

@@ -27056,21 +27056,35 @@ AArch64TargetLowering::shouldExpandAtomicLoadInIR(LoadInst *LI) const { : AtomicExpansionKind::LLSC; } +// Return true if the atomic operation expansion will lower to use a library +// call, and is thus ineligible to use

[llvm-branch-commits] [llvm] [LLVM][Coroutines] Transform "coro_elide_safe" calls to switch ABI coroutines to the `noalloc` variant (PR #99285)

https://github.com/yuxuanchen1997 edited https://github.com/llvm/llvm-project/pull/99285 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [LLVM][Coroutines] Transform "coro_elide_safe" calls to switch ABI coroutines to the `noalloc` variant (PR #99285)

https://github.com/yuxuanchen1997 edited https://github.com/llvm/llvm-project/pull/99285 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AArch64: Use consistent atomicrmw expansion for FP operations (PR #103702)

@@ -27056,21 +27056,35 @@ AArch64TargetLowering::shouldExpandAtomicLoadInIR(LoadInst *LI) const { : AtomicExpansionKind::LLSC; } +// Return true if the atomic operation expansion will lower to use a library +// call, and is thus ineligible to use

[llvm-branch-commits] [libc] [libc][math][c23] Add exp10m1f16 C23 math function (PR #105706)

overmighty wrote: Changes copied from https://github.com/llvm/llvm-project/pull/87992.diff. See #87992. https://github.com/llvm/llvm-project/pull/105706 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.

[llvm-branch-commits] [libc] [libc][math][c23] Add exp10m1f16 C23 math function (PR #105706)

llvmbot wrote: @llvm/pr-subscribers-libc Author: OverMighty (overmighty) Changes Part of #95250. --- Patch is 25.01 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/105706.diff 16 Files Affected: - (modified) libc/config/gpu/entrypoints.txt (

[llvm-branch-commits] [libc] [libc][math][c23] Add exp10m1f16 C23 math function (PR #105706)

https://github.com/overmighty created https://github.com/llvm/llvm-project/pull/105706 Part of #95250. >From 92629d814e5682fdd59510970bb7d30a6b705134 Mon Sep 17 00:00:00 2001 From: OverMighty Date: Thu, 22 Aug 2024 19:57:52 +0200 Subject: [PATCH] [libc][math][c23] Add exp10m1f16 C23 math funct

[llvm-branch-commits] [llvm] [LLVM][Coroutines] Create `.noalloc` variant of switch ABI coroutine ramp functions during CoroSplit (PR #99283)

@@ -2049,6 +2055,22 @@ the coroutine must reach the final suspend point when it get destroyed. This attribute only works for switched-resume coroutines now. +coro_must_elide +--- + +When a Call or Invoke instruction is marked with `coro_must_elide`, +CoroAnnotati

[llvm-branch-commits] [llvm] [LLVM][Coroutines] Transform "coro_must_elide" calls to switch ABI coroutines to the `noalloc` variant (PR #99285)

https://github.com/yuxuanchen1997 updated https://github.com/llvm/llvm-project/pull/99285 >From 17f5922762c0f5203cccda6f3d09ac1b2623078f Mon Sep 17 00:00:00 2001 From: Yuxuan Chen Date: Mon, 15 Jul 2024 15:01:39 -0700 Subject: [PATCH] add CoroAnnotationElidePass Summary: Test Plan: Reviewers

[llvm-branch-commits] [llvm] [LLVM][Coroutines] Create `.noalloc` variant of switch ABI coroutine ramp functions during CoroSplit (PR #99283)

https://github.com/yuxuanchen1997 updated https://github.com/llvm/llvm-project/pull/99283 >From 99d925c0aa2414bb791e94a2a8824e887dc2f367 Mon Sep 17 00:00:00 2001 From: Yuxuan Chen Date: Tue, 4 Jun 2024 23:22:00 -0700 Subject: [PATCH] [Clang] Introduce [[clang::coro_await_elidable]] --- llvm/d

[llvm-branch-commits] [llvm] [LLVM][Coroutines] Create `.noalloc` variant of switch ABI coroutine ramp functions during CoroSplit (PR #99283)

https://github.com/yuxuanchen1997 updated https://github.com/llvm/llvm-project/pull/99283 >From 05529de18e825c0357a4fdfbaeead577fc20cb91 Mon Sep 17 00:00:00 2001 From: Yuxuan Chen Date: Tue, 4 Jun 2024 23:22:00 -0700 Subject: [PATCH] [Clang] Introduce [[clang::coro_await_elidable]] --- llvm/d

[llvm-branch-commits] [llvm] [Driver] Add -Wa, options -mmapsyms={default, implicit} (PR #104542)

https://github.com/MaskRay updated https://github.com/llvm/llvm-project/pull/104542 >From 5a55a8f84d28a70560dec646abd35d84a3a38fe9 Mon Sep 17 00:00:00 2001 From: Fangrui Song Date: Thu, 15 Aug 2024 19:29:05 -0700 Subject: [PATCH] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20change?= =?UT

[llvm-branch-commits] [clang] Add release note about ABI implementation changes for _BitInt on Arm (PR #105659)

https://github.com/mgabka milestoned https://github.com/llvm/llvm-project/pull/105659 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] Add release note about ABI implementation changes for _BitInt on Arm (PR #105659)

https://github.com/paulwalker-arm approved this pull request. https://github.com/llvm/llvm-project/pull/105659 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [flang] [flang] Introduce custom loop nest generation for loops in workshare construct (PR #101445)

skatrak wrote: > wsloop expects its parent block to be a parallel block which all threads will > execute and all of those threads will share the work of the nested loop nest. Yes, the `omp.wsloop` binds to the current team (usually the innermost `omp.parallel` parent). It doesn't have to be th

[llvm-branch-commits] [clang] [AArch64][ARM] Add a release note about _BitInt (PR #101521)

mgabka wrote: @tru I created a new PR here with resolved conflicts, https://github.com/llvm/llvm-project/pull/105659 https://github.com/llvm/llvm-project/pull/101521 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://list

[llvm-branch-commits] [Driver] Add -Wa, options -mmapsyms={default, implicit} (PR #104542)

https://github.com/smithp35 approved this pull request. Thanks for adding the help. LGTM. https://github.com/llvm/llvm-project/pull/104542 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/li

[llvm-branch-commits] [clang] Add release note about ABI implementation changes for _BitInt on Arm (PR #105659)

llvmbot wrote: @llvm/pr-subscribers-clang Author: Maciej Gabka (mgabka) Changes Add release note that LLVM 19 _BitInt implementation is fully compliant with AAPCS32 and AAPCS64 when targeting Arm. --- Full diff: https://github.com/llvm/llvm-project/pull/105659.diff 1 Files Affected:

[llvm-branch-commits] [clang] Add release note about ABI implementation changes for _BitInt on Arm (PR #105659)

https://github.com/mgabka created https://github.com/llvm/llvm-project/pull/105659 Add release note that LLVM 19 _BitInt implementation is fully compliant with AAPCS32 and AAPCS64 when targeting Arm. >From 7fd1b940837e133dec047ac21d2dabf3917217af Mon Sep 17 00:00:00 2001 From: Maciej Gabka

[llvm-branch-commits] [flang] [flang] Lower omp.workshare to other omp constructs (PR #101446)

@@ -0,0 +1,446 @@ +//===- LowerWorkshare.cpp - special cases for bufferization ---===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0

[llvm-branch-commits] [flang] [flang] Lower omp.workshare to other omp constructs (PR #101446)

https://github.com/ivanradanov edited https://github.com/llvm/llvm-project/pull/101446 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [flang] [flang] Lower omp.workshare to other omp constructs (PR #101446)

@@ -0,0 +1,446 @@ +//===- LowerWorkshare.cpp - special cases for bufferization ---===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0

[llvm-branch-commits] [flang] [flang] Introduce custom loop nest generation for loops in workshare construct (PR #101445)

ivanradanov wrote: @skatrak I considered that as well, however, I did not like it because the semantics of the block that the operation is contained in is different. wsloop expects its parent block to be a parallel block which all threads will execute and all of those threads will share the w

[llvm-branch-commits] [mlir] [mlir][OpenMP][NFC] clean up optional reduction region parsing (PR #105644)

https://github.com/skatrak approved this pull request. Thank you, looks much better this way! https://github.com/llvm/llvm-project/pull/105644 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailma

[llvm-branch-commits] [flang] [flang] Introduce custom loop nest generation for loops in workshare construct (PR #101445)

skatrak wrote: > I am debating introducing a new operation workshare_loop_container which > exists only to "contain" a omp.loop_nest between lowering an elemental to > lowering the omp.workshare it is contained in. > > so we would have this state: > > ``` > omp.workshare { > omp.workshare_l

[llvm-branch-commits] [mlir] [mlir][OpenMP][NFC] clean up optional reduction region parsing (PR #105644)

llvmbot wrote: @llvm/pr-subscribers-mlir @llvm/pr-subscribers-mlir-openmp Author: Tom Eccles (tblah) Changes This can be handled in ODS instead of writing custom parsing/printing code. Thanks for the idea @skatrak --- Full diff: https://github.com/llvm/llvm-project/pull/105644.diff 2 F

[llvm-branch-commits] [mlir] [mlir][OpenMP][NFC] clean up optional reduction region parsing (PR #105644)

https://github.com/tblah created https://github.com/llvm/llvm-project/pull/105644 This can be handled in ODS instead of writing custom parsing/printing code. Thanks for the idea @skatrak >From 84f097c970c751ad6779ce6d09baad854568c4b3 Mon Sep 17 00:00:00 2001 From: Tom Eccles Date: Thu, 22 Aug

[llvm-branch-commits] [llvm] AArch64: Use consistent atomicrmw expansion for FP operations (PR #103702)

arsenm wrote: ping https://github.com/llvm/llvm-project/pull/103702 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [flang] [flang][omp] Emit omp.workshare in frontend (PR #101444)

https://github.com/skatrak approved this pull request. Thank you, LGTM as well. https://github.com/llvm/llvm-project/pull/101444 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llv

[llvm-branch-commits] [flang] [flang][omp] Emit omp.workshare in frontend (PR #101444)

@@ -1272,6 +1272,15 @@ static void genTaskwaitClauses(lower::AbstractConverter &converter, loc, llvm::omp::Directive::OMPD_taskwait); } +static void genWorkshareClauses(lower::AbstractConverter &converter, skatrak wrote: Ultra-nit: Move below `genTeams

[llvm-branch-commits] [flang] [flang][omp] Emit omp.workshare in frontend (PR #101444)

https://github.com/skatrak edited https://github.com/llvm/llvm-project/pull/101444 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [flang] [flang][OpenMP] use reduction alloc region (PR #102525)

https://github.com/tblah updated https://github.com/llvm/llvm-project/pull/102525 >From ee4a8e00d5c825ea3214199c460ea23af9c6ba6b Mon Sep 17 00:00:00 2001 From: Tom Eccles Date: Tue, 30 Jul 2024 10:56:36 + Subject: [PATCH] [flang][OpenMP] use reduction alloc region I removed the `*-hlfir*`

[llvm-branch-commits] [flang] [mlir] [flang][OpenMP] use reduction alloc region (PR #102525)

https://github.com/skatrak approved this pull request. Thanks for this work, it LGTM. https://github.com/llvm/llvm-project/pull/102525 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listin

[llvm-branch-commits] [mlir] [mlir][OpenMP] Convert reduction alloc region to LLVMIR (PR #102524)

https://github.com/tblah updated https://github.com/llvm/llvm-project/pull/102524 >From 9e37da3b2eaace309d3b68fa36384430b5dc97cd Mon Sep 17 00:00:00 2001 From: Tom Eccles Date: Wed, 31 Jul 2024 10:10:33 + Subject: [PATCH] [mlir][OpenMP] Convert reduction alloc region to LLVMIR The intentio

[llvm-branch-commits] [llvm] AMDGPU: Remove flat/global fmin/fmax intrinsics (PR #105642)

arsenm wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/105642?utm_source=stack-comment-downstack-mergeability-warning";

[llvm-branch-commits] [llvm] AMDGPU: Remove flat/global fmin/fmax intrinsics (PR #105642)

llvmbot wrote: @llvm/pr-subscribers-clang-codegen @llvm/pr-subscribers-clang Author: Matt Arsenault (arsenm) Changes These have been replaced with atomicrmw --- Patch is 89.93 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/105642.diff 18 Fil

[llvm-branch-commits] [llvm] AMDGPU: Remove flat/global fmin/fmax intrinsics (PR #105642)

https://github.com/arsenm ready_for_review https://github.com/llvm/llvm-project/pull/105642 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: Remove flat/global fmin/fmax intrinsics (PR #105642)

https://github.com/arsenm created https://github.com/llvm/llvm-project/pull/105642 These have been replaced with atomicrmw >From be7d2aef3110181609d70b7aec9a15409f18026d Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Fri, 28 Jun 2024 20:38:01 +0200 Subject: [PATCH] AMDGPU: Remove flat/glo

[llvm-branch-commits] [clang] release/19.x: [X86] Use correct fp immediate types in _mm_set_ss/sd (PR #105638)

https://github.com/phoebewang approved this pull request. LGTM, thanks! https://github.com/llvm/llvm-project/pull/105638 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch

[llvm-branch-commits] [clang] release/19.x: [X86] Use correct fp immediate types in _mm_set_ss/sd (PR #105638)

llvmbot wrote: @llvm/pr-subscribers-backend-x86 @llvm/pr-subscribers-clang Author: None (llvmbot) Changes Backport 3b49d274e6f16d1c8db5f4557eb7866a4bafffa5 6dcce422ca06601f2b00e85cc18c745ede245ca6 Requested by: @RKSimon --- Full diff: https://github.com/llvm/llvm-project/pull/105638.dif

[llvm-branch-commits] [clang] release/19.x: [X86] Use correct fp immediate types in _mm_set_ss/sd (PR #105638)

https://github.com/llvmbot created https://github.com/llvm/llvm-project/pull/105638 Backport 3b49d274e6f16d1c8db5f4557eb7866a4bafffa5 6dcce422ca06601f2b00e85cc18c745ede245ca6 Requested by: @RKSimon >From d089263a495098114432a40ddaef17ae90bf7352 Mon Sep 17 00:00:00 2001 From: Simon Pilgrim Da

[llvm-branch-commits] [clang] release/19.x: [X86] Use correct fp immediate types in _mm_set_ss/sd (PR #105638)

https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/105638 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [mlir] [mlir][OpenMP] Convert reduction alloc region to LLVMIR (PR #102524)

https://github.com/skatrak approved this pull request. Thank you, this LGTM. https://github.com/llvm/llvm-project/pull/102524 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-b

[llvm-branch-commits] [llvm] [AMDGPU] GFX12 VMEM loads can write VGPR results out of order (PR #105549)

jayfoad wrote: ### Merge activity * **Aug 22, 6:34 AM EDT**: @jayfoad started a stack merge that includes this pull request via [Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/105549). https://github.com/llvm/llvm-project/pull/105549 __

[llvm-branch-commits] [flang] [flang] Lower omp.workshare to other omp constructs (PR #101446)

@@ -0,0 +1,446 @@ +//===- LowerWorkshare.cpp - special cases for bufferization ---===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0

[llvm-branch-commits] [flang] [flang] Lower omp.workshare to other omp constructs (PR #101446)

https://github.com/tblah commented: Thank you for all of the updates. This looks good to me in general, although I have a few minor questions. Before merging please make sure you document in the commit message exactly what is and is not supported. Please could another reviewer take an in-dept

[llvm-branch-commits] [flang] [flang] Lower omp.workshare to other omp constructs (PR #101446)

@@ -0,0 +1,446 @@ +//===- LowerWorkshare.cpp - special cases for bufferization ---===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0

[llvm-branch-commits] [flang] [flang] Lower omp.workshare to other omp constructs (PR #101446)

https://github.com/tblah edited https://github.com/llvm/llvm-project/pull/101446 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU] GFX12 VMEM loads can write VGPR results out of order (PR #105549)

https://github.com/Pierre-vh approved this pull request. https://github.com/llvm/llvm-project/pull/105549 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU] GFX12 VMEM loads can write VGPR results out of order (PR #105549)

@@ -953,6 +953,12 @@ def FeatureRequiredExportPriority : SubtargetFeature<"required-export-priority", "Export priority must be explicitly manipulated on GFX11.5" >; +def FeatureVmemWriteVgprInOrder : SubtargetFeature<"vmem-write-vgpr-in-order", Pierre-vh wr

[llvm-branch-commits] [llvm] [AMDGPU] GFX12 VMEM loads can write VGPR results out of order (PR #105549)

https://github.com/jayfoad edited https://github.com/llvm/llvm-project/pull/105549 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU] GFX12 VMEM instructions can write VGPR results out of order (PR #105549)

@@ -4371,8 +4375,10 @@ define amdgpu_kernel void @global_sextload_v64i16_to_v64i32(ptr addrspace(1) %ou ; GCN-NOHSA-SI-NEXT:buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:48 ; GCN-NOHSA-SI-NEXT:buffer_store_dwordx4 v[4:7], off, s[0:3], 0 ; GCN-NOHSA-SI-NEXT:bu

[llvm-branch-commits] [llvm] [AMDGPU] GFX12 VMEM instructions can write VGPR results out of order (PR #105549)

@@ -754,13 +754,21 @@ define amdgpu_kernel void @constant_load_v16i16_align2(ptr addrspace(4) %ptr0) # ; GFX12-NEXT:global_load_u16 v6, v8, s[0:1] offset:8 ; GFX12-NEXT:global_load_u16 v5, v8, s[0:1] offset:4 ; GFX12-NEXT:global_load_u16 v4, v8, s[0:1] +; GFX12-NEX

[llvm-branch-commits] [llvm] [AMDGPU] GFX12 VMEM instructions can write VGPR results out of order (PR #105549)

@@ -953,6 +953,12 @@ def FeatureRequiredExportPriority : SubtargetFeature<"required-export-priority", "Export priority must be explicitly manipulated on GFX11.5" >; +def FeatureVmemWriteVgprInOrder : SubtargetFeature<"vmem-write-vgpr-in-order", jayfoad wrot

[llvm-branch-commits] [llvm] [AMDGPU] GFX12 VMEM instructions can write VGPR results out of order (PR #105549)

@@ -1778,11 +1778,12 @@ bool SIInsertWaitcnts::generateWaitcntInstBefore(MachineInstr &MI, if (IsVGPR) { // RAW always needs an s_waitcnt. WAW needs an s_waitcnt unless the // previous write and this write are the same type of VMEM -

[llvm-branch-commits] [llvm] release/19.x: [PowerPC] Respect endianness when bitcasting to fp128 (#95931) (PR #105623)

https://github.com/chenzheng1030 approved this pull request. LGTM. ( cherry pick is requested by myself :) ) https://github.com/llvm/llvm-project/pull/105623 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org

[llvm-branch-commits] [llvm] release/19.x: [DAGCombiner] Fix ReplaceAllUsesOfValueWith mutation bug in visitFREEZE (#104924) (PR #105627)

https://github.com/bjope approved this pull request. LG https://github.com/llvm/llvm-project/pull/105627 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [flang] [flang][omp] Emit omp.workshare in frontend (PR #101444)

https://github.com/tblah approved this pull request. LGTM, thanks https://github.com/llvm/llvm-project/pull/101444 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commi

[llvm-branch-commits] [flang] [flang] Introduce custom loop nest generation for loops in workshare construct (PR #101445)

https://github.com/ivanradanov updated https://github.com/llvm/llvm-project/pull/101445 >From d5fbe9c7482b87be295be03aafd5917dd7c17859 Mon Sep 17 00:00:00 2001 From: Ivan Radanov Ivanov Date: Thu, 22 Aug 2024 18:07:05 +0900 Subject: [PATCH] [flang] Introduce ws loop nest generation for HLFIR lo

[llvm-branch-commits] [flang] [flang][omp] Emit omp.workshare in frontend (PR #101444)

https://github.com/ivanradanov updated https://github.com/llvm/llvm-project/pull/101444 >From 0984407c261496c9dc53fdd2d4d5c2431dd90359 Mon Sep 17 00:00:00 2001 From: Ivan Radanov Ivanov Date: Wed, 31 Jul 2024 14:11:47 +0900 Subject: [PATCH 1/2] [flang][omp] Emit omp.workshare in frontend Fix l

[llvm-branch-commits] [flang] [mlir] [flang] Lower omp.workshare to other omp constructs (PR #101446)

https://github.com/ivanradanov updated https://github.com/llvm/llvm-project/pull/101446 >From 45a5069b5b783e0e1cd5fa0ba8f8098a980eb94e Mon Sep 17 00:00:00 2001 From: Ivan Radanov Ivanov Date: Thu, 22 Aug 2024 18:05:31 +0900 Subject: [PATCH 1/5] wrong replace --- mlir/test/Dialect/OpenMP/ops.m

[llvm-branch-commits] [flang] [WIP][flang] Introduce HLFIR lowerings to omp.workshare_loop_nest (PR #104748)

https://github.com/ivanradanov updated https://github.com/llvm/llvm-project/pull/104748 >From 45a5069b5b783e0e1cd5fa0ba8f8098a980eb94e Mon Sep 17 00:00:00 2001 From: Ivan Radanov Ivanov Date: Thu, 22 Aug 2024 18:05:31 +0900 Subject: [PATCH 1/6] wrong replace --- mlir/test/Dialect/OpenMP/ops.m

[llvm-branch-commits] [flang] [flang] Lower omp.workshare to other omp constructs (PR #101446)

llvmbot wrote: @llvm/pr-subscribers-flang-driver Author: Ivan R. Ivanov (ivanradanov) Changes 4/4 There are two points which need some discussion in this PR: 1. We need to make a value computed in a omp.single accessible in all threads of the omp.parallel region. This is achieved by al

[llvm-branch-commits] [flang] [flang][omp] Emit omp.workshare in frontend (PR #101444)

https://github.com/ivanradanov updated https://github.com/llvm/llvm-project/pull/101444 >From d4310a06639c6cd1565aac2d2bbfebffcf9e175d Mon Sep 17 00:00:00 2001 From: Ivan Radanov Ivanov Date: Wed, 31 Jul 2024 14:11:47 +0900 Subject: [PATCH 1/2] [flang][omp] Emit omp.workshare in frontend Fix l

[llvm-branch-commits] [flang] [flang] Introduce custom loop nest generation for loops in workshare construct (PR #101445)

https://github.com/ivanradanov updated https://github.com/llvm/llvm-project/pull/101445 >From c3ec4f1bd4a51139a10b1450e3e194a9270b7362 Mon Sep 17 00:00:00 2001 From: Ivan Radanov Ivanov Date: Wed, 31 Jul 2024 14:12:34 +0900 Subject: [PATCH] [flang] Introduce ws loop nest generation for HLFIR lo

[llvm-branch-commits] [flang] [mlir] [flang] Lower omp.workshare to other omp constructs (PR #101446)

https://github.com/ivanradanov updated https://github.com/llvm/llvm-project/pull/101446 >From d343f3a86f56864757ccdf889fd6897d9d9507e9 Mon Sep 17 00:00:00 2001 From: Ivan Radanov Ivanov Date: Wed, 31 Jul 2024 14:09:09 +0900 Subject: [PATCH 1/5] [MLIR][omp] Add omp.workshare op Add custom omp l

[llvm-branch-commits] [flang] [WIP][flang] Introduce HLFIR lowerings to omp.workshare_loop_nest (PR #104748)

https://github.com/ivanradanov updated https://github.com/llvm/llvm-project/pull/104748 >From d343f3a86f56864757ccdf889fd6897d9d9507e9 Mon Sep 17 00:00:00 2001 From: Ivan Radanov Ivanov Date: Wed, 31 Jul 2024 14:09:09 +0900 Subject: [PATCH 1/6] [MLIR][omp] Add omp.workshare op Add custom omp l

[llvm-branch-commits] [llvm] [AMDGPU] GFX12 VMEM instructions can write VGPR results out of order (PR #105549)

@@ -754,13 +754,21 @@ define amdgpu_kernel void @constant_load_v16i16_align2(ptr addrspace(4) %ptr0) # ; GFX12-NEXT:global_load_u16 v6, v8, s[0:1] offset:8 ; GFX12-NEXT:global_load_u16 v5, v8, s[0:1] offset:4 ; GFX12-NEXT:global_load_u16 v4, v8, s[0:1] +; GFX12-NEX

[llvm-branch-commits] [llvm] [AMDGPU] GFX12 VMEM instructions can write VGPR results out of order (PR #105549)

@@ -953,6 +953,12 @@ def FeatureRequiredExportPriority : SubtargetFeature<"required-export-priority", "Export priority must be explicitly manipulated on GFX11.5" >; +def FeatureVmemWriteVgprInOrder : SubtargetFeature<"vmem-write-vgpr-in-order", Pierre-vh wr

[llvm-branch-commits] [llvm] [AMDGPU] GFX12 VMEM instructions can write VGPR results out of order (PR #105549)

@@ -4371,8 +4375,10 @@ define amdgpu_kernel void @global_sextload_v64i16_to_v64i32(ptr addrspace(1) %ou ; GCN-NOHSA-SI-NEXT:buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:48 ; GCN-NOHSA-SI-NEXT:buffer_store_dwordx4 v[4:7], off, s[0:3], 0 ; GCN-NOHSA-SI-NEXT:bu

[llvm-branch-commits] [llvm] [AMDGPU] GFX12 VMEM instructions can write VGPR results out of order (PR #105549)

@@ -1778,11 +1778,12 @@ bool SIInsertWaitcnts::generateWaitcntInstBefore(MachineInstr &MI, if (IsVGPR) { // RAW always needs an s_waitcnt. WAW needs an s_waitcnt unless the // previous write and this write are the same type of VMEM -

[llvm-branch-commits] [llvm] release/19.x: [DAGCombiner] Fix ReplaceAllUsesOfValueWith mutation bug in visitFREEZE (#104924) (PR #105627)

llvmbot wrote: @llvm/pr-subscribers-backend-aarch64 @llvm/pr-subscribers-llvm-selectiondag Author: None (llvmbot) Changes Backport 278fc8efdf004a1959a31bb4c208df5ee733d5c8 Requested by: @nikic --- Full diff: https://github.com/llvm/llvm-project/pull/105627.diff 2 Files Affected: - (mo

[llvm-branch-commits] [llvm] release/19.x: [DAGCombiner] Fix ReplaceAllUsesOfValueWith mutation bug in visitFREEZE (#104924) (PR #105627)

llvmbot wrote: @dtcxzyw What do you think about merging this PR to the release branch? https://github.com/llvm/llvm-project/pull/105627 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listi

[llvm-branch-commits] [llvm] release/19.x: [DAGCombiner] Fix ReplaceAllUsesOfValueWith mutation bug in visitFREEZE (#104924) (PR #105627)

https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/105627 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] release/19.x: [DAGCombiner] Fix ReplaceAllUsesOfValueWith mutation bug in visitFREEZE (#104924) (PR #105627)

https://github.com/llvmbot created https://github.com/llvm/llvm-project/pull/105627 Backport 278fc8efdf004a1959a31bb4c208df5ee733d5c8 Requested by: @nikic >From a62081c66fcca6ad86b8713cc5c87fcc876532ac Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Bj=C3=B6rn=20Pettersson?= Date: Wed, 21 Aug 2024 1

[llvm-branch-commits] [llvm] [FixIrreducible] Use CycleInfo instead of a custom SCC traversal (PR #101386)

https://github.com/ssahasra reopened https://github.com/llvm/llvm-project/pull/101386 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [FixIrreducible] Use CycleInfo instead of a custom SCC traversal (PR #101386)

https://github.com/ssahasra closed https://github.com/llvm/llvm-project/pull/101386 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] release/19.x: [PowerPC] Respect endianness when bitcasting to fp128 (#95931) (PR #105623)

llvmbot wrote: @llvm/pr-subscribers-backend-powerpc Author: None (llvmbot) Changes Backport 408d82d352eb98e2d0a804c66d359cd7a49228fe Requested by: @chenzheng1030 --- Full diff: https://github.com/llvm/llvm-project/pull/105623.diff 2 Files Affected: - (modified) llvm/lib/Target/PowerPC

[llvm-branch-commits] [llvm] release/19.x: [PowerPC] Respect endianness when bitcasting to fp128 (#95931) (PR #105623)

llvmbot wrote: @chenzheng1030 What do you think about merging this PR to the release branch? https://github.com/llvm/llvm-project/pull/105623 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman

[llvm-branch-commits] [llvm] release/19.x: [PowerPC] Respect endianness when bitcasting to fp128 (#95931) (PR #105623)

https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/105623 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] release/19.x: [PowerPC] Respect endianness when bitcasting to fp128 (#95931) (PR #105623)

https://github.com/llvmbot created https://github.com/llvm/llvm-project/pull/105623 Backport 408d82d352eb98e2d0a804c66d359cd7a49228fe Requested by: @chenzheng1030 >From 31da8c38850660c0b0757beaf3a5de4c5372f026 Mon Sep 17 00:00:00 2001 From: Tim Gymnich Date: Thu, 8 Aug 2024 02:51:04 +0200 Sub

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